radeonsi: apply a tessellation bug workaround for SI

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 78c4528ae7709fbe94d917d034cfd60535b5dcf3)
[Emil Velikov: resolve trivial conflict]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
	src/gallium/drivers/radeonsi/si_state_draw.c

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 447acc1..592d9b9 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -154,6 +154,12 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
         */
        *num_patches = MIN2(*num_patches, 40);
 
+       /* SI bug workaround - limit LS-HS threadgroups to only one wave. */
+       if (sctx->b.chip_class == SI) {
+               unsigned one_wave = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp);
+               *num_patches = MIN2(*num_patches, one_wave);
+       }
+
        output_patch0_offset = input_patch_size * *num_patches;
        perpatch_output_offset = output_patch0_offset + pervertex_output_patch_size;