r600g: 128 bit formats require tile_type = 1 on cayman

Noticed by taiu on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Note: this is a candidate for the stable branches.

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 56a497b..b882516 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1174,6 +1174,11 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
                bankw = eg_bank_wh(bankw);
                bankh = eg_bank_wh(bankh);
        }
+       /* 128 bit formats require tile type = 1 */
+       if (rscreen->chip_class == CAYMAN) {
+               if (util_format_get_blocksize(state->format) >= 16)
+                       tile_type = 1;
+       }
        nbanks = eg_num_banks(rscreen->tiling_info.num_banks);
 
        if (texture->target == PIPE_TEXTURE_1D_ARRAY) {
@@ -1511,6 +1516,11 @@ static void evergreen_cb(struct r600_context *rctx, struct r600_pipe_state *rsta
                bankw = eg_bank_wh(bankw);
                bankh = eg_bank_wh(bankh);
        }
+       /* 128 bit formats require tile type = 1 */
+       if (rscreen->chip_class == CAYMAN) {
+               if (util_format_get_blocksize(surf->base.format) >= 16)
+                       tile_type = 1;
+       }
        nbanks = eg_num_banks(rscreen->tiling_info.num_banks);
        desc = util_format_description(surf->base.format);
        for (i = 0; i < 4; i++) {