amdgpu.c

   1 /*
   2  * Copyright 2016 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6 #ifdef DRV_AMDGPU
   7 #include <amdgpu.h>
   8 #include <amdgpu_drm.h>
   9 #include <errno.h>
  10 #include <stdio.h>
  11 #include <stdlib.h>
  12 #include <string.h>
  13 #include <sys/mman.h>
  14 #include <xf86drm.h>
  15
  16 #include "dri.h"
  17 #include "drv_priv.h"
  18 #include "helpers.h"
  19 #include "util.h"
  20
  21 #ifdef __ANDROID__
  22 #define DRI_PATH "/vendor/lib/dri/radeonsi_dri.so"
  23 #else
  24 #define DRI_PATH "/usr/lib64/dri/radeonsi_dri.so"
  25 #endif
  26
  27 #define TILE_TYPE_LINEAR 0
  28 /* DRI backend decides tiling in this case. */
  29 #define TILE_TYPE_DRI 1
  30
  31 struct amdgpu_priv {
  32         struct dri_driver dri;
  33         int drm_version;
  34 };
  35
  36 const static uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
  37                                                   DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
  38                                                   DRM_FORMAT_XRGB8888 };
  39
  40 const static uint32_t texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_NV21,
  41                                                    DRM_FORMAT_NV12, DRM_FORMAT_YVU420_ANDROID };
  42
  43 static int amdgpu_init(struct driver *drv)
  44 {
  45         struct amdgpu_priv *priv;
  46         drmVersionPtr drm_version;
  47         struct format_metadata metadata;
  48         uint64_t use_flags = BO_USE_RENDER_MASK;
  49
  50         priv = calloc(1, sizeof(struct amdgpu_priv));
  51         if (!priv)
  52                 return -ENOMEM;
  53
  54         drm_version = drmGetVersion(drv_get_fd(drv));
  55         if (!drm_version) {
  56                 free(priv);
  57                 return -ENODEV;
  58         }
  59
  60         priv->drm_version = drm_version->version_minor;
  61         drmFreeVersion(drm_version);
  62
  63         drv->priv = priv;
  64
  65         if (dri_init(drv, DRI_PATH, "radeonsi")) {
  66                 free(priv);
  67                 drv->priv = NULL;
  68                 return -ENODEV;
  69         }
  70
  71         metadata.tiling = TILE_TYPE_LINEAR;
  72         metadata.priority = 1;
  73         metadata.modifier = DRM_FORMAT_MOD_LINEAR;
  74
  75         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
  76                              &metadata, use_flags);
  77
  78         drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
  79                              &metadata, BO_USE_TEXTURE_MASK);
  80
  81         /* Linear formats supported by display. */
  82         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
  83         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
  84         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
  85
  86         /* YUV formats for camera and display. */
  87         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
  88                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT);
  89
  90         drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata, BO_USE_SCANOUT);
  91
  92         /*
  93          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
  94          * from camera.
  95          */
  96         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
  97                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
  98
  99         /*
 100          * The following formats will be allocated by the DRI backend and may be potentially tiled.
 101          * Since format modifier support hasn't been implemented fully yet, it's not
 102          * possible to enumerate the different types of buffers (like i915 can).
 103          */
 104         use_flags &= ~BO_USE_RENDERSCRIPT;
 105         use_flags &= ~BO_USE_SW_WRITE_OFTEN;
 106         use_flags &= ~BO_USE_SW_READ_OFTEN;
 107         use_flags &= ~BO_USE_LINEAR;
 108
 109         metadata.tiling = TILE_TYPE_DRI;
 110         metadata.priority = 2;
 111
 112         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 113                              &metadata, use_flags);
 114
 115         /* Potentially tiled formats supported by display. */
 116         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 117         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 118         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
 119         return 0;
 120 }
 121
 122 static void amdgpu_close(struct driver *drv)
 123 {
 124         dri_close(drv);
 125         free(drv->priv);
 126         drv->priv = NULL;
 127 }
 128
 129 static int amdgpu_create_bo(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 130                             uint64_t use_flags)
 131 {
 132         int ret;
 133         uint32_t plane, stride;
 134         struct combination *combo;
 135         union drm_amdgpu_gem_create gem_create;
 136         struct amdgpu_priv *priv = bo->drv->priv;
 137
 138         combo = drv_get_combination(bo->drv, format, use_flags);
 139         if (!combo)
 140                 return -EINVAL;
 141
 142         if (combo->metadata.tiling == TILE_TYPE_DRI)
 143                 return dri_bo_create(bo, width, height, format, use_flags);
 144
 145         stride = drv_stride_from_format(format, width, 0);
 146         if (format == DRM_FORMAT_YVU420_ANDROID)
 147                 stride = ALIGN(stride, 128);
 148         else
 149                 stride = ALIGN(stride, 64);
 150
 151         drv_bo_from_format(bo, stride, height, format);
 152
 153         memset(&gem_create, 0, sizeof(gem_create));
 154         gem_create.in.bo_size = bo->total_size;
 155         gem_create.in.alignment = 256;
 156         gem_create.in.domain_flags = 0;
 157
 158         if (use_flags & (BO_USE_LINEAR | BO_USE_SW))
 159                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
 160
 161         gem_create.in.domains = AMDGPU_GEM_DOMAIN_GTT;
 162         if (!(use_flags & (BO_USE_SW_READ_OFTEN | BO_USE_SCANOUT)))
 163                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC;
 164
 165         /* If drm_version >= 21 everything exposes explicit synchronization primitives
 166            and chromeos/arc++ will use them. Disable implicit synchronization. */
 167         if (priv->drm_version >= 21) {
 168                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
 169         }
 170
 171         /* Allocate the buffer with the preferred heap. */
 172         ret = drmCommandWriteRead(drv_get_fd(bo->drv), DRM_AMDGPU_GEM_CREATE, &gem_create,
 173                                   sizeof(gem_create));
 174         if (ret < 0)
 175                 return ret;
 176
 177         for (plane = 0; plane < bo->num_planes; plane++)
 178                 bo->handles[plane].u32 = gem_create.out.handle;
 179
 180         return 0;
 181 }
 182
 183 static int amdgpu_import_bo(struct bo *bo, struct drv_import_fd_data *data)
 184 {
 185         struct combination *combo;
 186         combo = drv_get_combination(bo->drv, data->format, data->use_flags);
 187         if (!combo)
 188                 return -EINVAL;
 189
 190         if (combo->metadata.tiling == TILE_TYPE_DRI)
 191                 return dri_bo_import(bo, data);
 192         else
 193                 return drv_prime_bo_import(bo, data);
 194 }
 195
 196 static int amdgpu_destroy_bo(struct bo *bo)
 197 {
 198         if (bo->priv)
 199                 return dri_bo_destroy(bo);
 200         else
 201                 return drv_gem_bo_destroy(bo);
 202 }
 203
 204 static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
 205 {
 206         int ret;
 207         union drm_amdgpu_gem_mmap gem_map;
 208
 209         if (bo->priv)
 210                 return dri_bo_map(bo, vma, plane, map_flags);
 211
 212         memset(&gem_map, 0, sizeof(gem_map));
 213         gem_map.in.handle = bo->handles[plane].u32;
 214
 215         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_AMDGPU_GEM_MMAP, &gem_map);
 216         if (ret) {
 217                 drv_log("DRM_IOCTL_AMDGPU_GEM_MMAP failed\n");
 218                 return MAP_FAILED;
 219         }
 220
 221         vma->length = bo->total_size;
 222
 223         return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
 224                     gem_map.out.addr_ptr);
 225 }
 226
 227 static int amdgpu_unmap_bo(struct bo *bo, struct vma *vma)
 228 {
 229         if (bo->priv)
 230                 return dri_bo_unmap(bo, vma);
 231         else
 232                 return munmap(vma->addr, vma->length);
 233 }
 234
 235 static uint32_t amdgpu_resolve_format(uint32_t format, uint64_t use_flags)
 236 {
 237         switch (format) {
 238         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 239                 /* Camera subsystem requires NV12. */
 240                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 241                         return DRM_FORMAT_NV12;
 242                 /*HACK: See b/28671744 */
 243                 return DRM_FORMAT_XBGR8888;
 244         case DRM_FORMAT_FLEX_YCbCr_420_888:
 245                 return DRM_FORMAT_NV12;
 246         default:
 247                 return format;
 248         }
 249 }
 250
 251 const struct backend backend_amdgpu = {
 252         .name = "amdgpu",
 253         .init = amdgpu_init,
 254         .close = amdgpu_close,
 255         .bo_create = amdgpu_create_bo,
 256         .bo_destroy = amdgpu_destroy_bo,
 257         .bo_import = amdgpu_import_bo,
 258         .bo_map = amdgpu_map_bo,
 259         .bo_unmap = amdgpu_unmap_bo,
 260         .resolve_format = amdgpu_resolve_format,
 261 };
 262
 263 #endif