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minigbm: add support for HAL_PIXEL_FORMAT_RGBA_FP16
[android-x86/external-minigbm.git] / amdgpu.c
1 /*
2  * Copyright 2016 The Chromium OS Authors. All rights reserved.
3  * Use of this source code is governed by a BSD-style license that can be
4  * found in the LICENSE file.
5  */
6 #ifdef DRV_AMDGPU
7 #include <amdgpu.h>
8 #include <amdgpu_drm.h>
9 #include <errno.h>
10 #include <stdio.h>
11 #include <stdlib.h>
12 #include <string.h>
13 #include <sys/mman.h>
14 #include <xf86drm.h>
15
16 #include "dri.h"
17 #include "drv_priv.h"
18 #include "helpers.h"
19 #include "util.h"
20
21 #ifdef __ANDROID__
22 #define DRI_PATH "/vendor/lib/dri/radeonsi_dri.so"
23 #else
24 #define DRI_PATH "/usr/lib64/dri/radeonsi_dri.so"
25 #endif
26
27 #define TILE_TYPE_LINEAR 0
28 /* DRI backend decides tiling in this case. */
29 #define TILE_TYPE_DRI 1
30
31 struct amdgpu_priv {
32         struct dri_driver dri;
33         int drm_version;
34 };
35
36 const static uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888,     DRM_FORMAT_ARGB8888,
37                                                   DRM_FORMAT_RGB565,       DRM_FORMAT_XBGR8888,
38                                                   DRM_FORMAT_XBGR16161616, DRM_FORMAT_XRGB8888 };
39
40 const static uint32_t texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_NV21,
41                                                    DRM_FORMAT_NV12, DRM_FORMAT_YVU420_ANDROID };
42
43 static int amdgpu_init(struct driver *drv)
44 {
45         struct amdgpu_priv *priv;
46         drmVersionPtr drm_version;
47         struct format_metadata metadata;
48         uint64_t use_flags = BO_USE_RENDER_MASK;
49
50         priv = calloc(1, sizeof(struct amdgpu_priv));
51         if (!priv)
52                 return -ENOMEM;
53
54         drm_version = drmGetVersion(drv_get_fd(drv));
55         if (!drm_version) {
56                 free(priv);
57                 return -ENODEV;
58         }
59
60         priv->drm_version = drm_version->version_minor;
61         drmFreeVersion(drm_version);
62
63         drv->priv = priv;
64
65         if (dri_init(drv, DRI_PATH, "radeonsi")) {
66                 free(priv);
67                 drv->priv = NULL;
68                 return -ENODEV;
69         }
70
71         metadata.tiling = TILE_TYPE_LINEAR;
72         metadata.priority = 1;
73         metadata.modifier = DRM_FORMAT_MOD_LINEAR;
74
75         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
76                              &metadata, use_flags);
77
78         drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
79                              &metadata, BO_USE_TEXTURE_MASK);
80
81         /* Linear formats supported by display. */
82         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
83         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
84         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
85
86         /* YUV formats for camera and display. */
87         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
88                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT);
89
90         drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata, BO_USE_SCANOUT);
91
92         /*
93          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
94          * from camera.
95          */
96         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
97                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
98
99         /*
100          * The following formats will be allocated by the DRI backend and may be potentially tiled.
101          * Since format modifier support hasn't been implemented fully yet, it's not
102          * possible to enumerate the different types of buffers (like i915 can).
103          */
104         use_flags &= ~BO_USE_RENDERSCRIPT;
105         use_flags &= ~BO_USE_SW_WRITE_OFTEN;
106         use_flags &= ~BO_USE_SW_READ_OFTEN;
107         use_flags &= ~BO_USE_LINEAR;
108
109         metadata.tiling = TILE_TYPE_DRI;
110         metadata.priority = 2;
111
112         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
113                              &metadata, use_flags);
114
115         /* Potentially tiled formats supported by display. */
116         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
117         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
118         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
119         return 0;
120 }
121
122 static void amdgpu_close(struct driver *drv)
123 {
124         dri_close(drv);
125         free(drv->priv);
126         drv->priv = NULL;
127 }
128
129 static int amdgpu_create_bo(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
130                             uint64_t use_flags)
131 {
132         int ret;
133         uint32_t plane, stride;
134         struct combination *combo;
135         union drm_amdgpu_gem_create gem_create;
136         struct amdgpu_priv *priv = bo->drv->priv;
137
138         combo = drv_get_combination(bo->drv, format, use_flags);
139         if (!combo)
140                 return -EINVAL;
141
142         if (combo->metadata.tiling == TILE_TYPE_DRI)
143                 return dri_bo_create(bo, width, height, format, use_flags);
144
145         stride = drv_stride_from_format(format, width, 0);
146         if (format == DRM_FORMAT_YVU420_ANDROID)
147                 stride = ALIGN(stride, 128);
148         else
149                 stride = ALIGN(stride, 64);
150
151         drv_bo_from_format(bo, stride, height, format);
152
153         memset(&gem_create, 0, sizeof(gem_create));
154         gem_create.in.bo_size = bo->total_size;
155         gem_create.in.alignment = 256;
156         gem_create.in.domain_flags = 0;
157
158         if (use_flags & (BO_USE_LINEAR | BO_USE_SW))
159                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
160
161         if (use_flags & (BO_USE_SCANOUT | BO_USE_CURSOR)) {
162                 /* TODO(dbehr) do not use VRAM after we enable display VM */
163                 gem_create.in.domains = AMDGPU_GEM_DOMAIN_VRAM;
164         } else {
165                 gem_create.in.domains = AMDGPU_GEM_DOMAIN_GTT;
166                 if (!(use_flags & BO_USE_SW_READ_OFTEN))
167                         gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC;
168         }
169
170         /* If drm_version >= 21 everything exposes explicit synchronization primitives
171            and chromeos/arc++ will use them. Disable implicit synchronization. */
172         if (priv->drm_version >= 21) {
173                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
174         }
175
176         /* Allocate the buffer with the preferred heap. */
177         ret = drmCommandWriteRead(drv_get_fd(bo->drv), DRM_AMDGPU_GEM_CREATE, &gem_create,
178                                   sizeof(gem_create));
179         if (ret < 0)
180                 return ret;
181
182         for (plane = 0; plane < bo->num_planes; plane++)
183                 bo->handles[plane].u32 = gem_create.out.handle;
184
185         return 0;
186 }
187
188 static int amdgpu_import_bo(struct bo *bo, struct drv_import_fd_data *data)
189 {
190         struct combination *combo;
191         combo = drv_get_combination(bo->drv, data->format, data->use_flags);
192         if (!combo)
193                 return -EINVAL;
194
195         if (combo->metadata.tiling == TILE_TYPE_DRI)
196                 return dri_bo_import(bo, data);
197         else
198                 return drv_prime_bo_import(bo, data);
199 }
200
201 static int amdgpu_destroy_bo(struct bo *bo)
202 {
203         if (bo->priv)
204                 return dri_bo_destroy(bo);
205         else
206                 return drv_gem_bo_destroy(bo);
207 }
208
209 static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
210 {
211         int ret;
212         union drm_amdgpu_gem_mmap gem_map;
213
214         if (bo->priv)
215                 return dri_bo_map(bo, vma, plane, map_flags);
216
217         memset(&gem_map, 0, sizeof(gem_map));
218         gem_map.in.handle = bo->handles[plane].u32;
219
220         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_AMDGPU_GEM_MMAP, &gem_map);
221         if (ret) {
222                 drv_log("DRM_IOCTL_AMDGPU_GEM_MMAP failed\n");
223                 return MAP_FAILED;
224         }
225
226         vma->length = bo->total_size;
227
228         return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
229                     gem_map.out.addr_ptr);
230 }
231
232 static int amdgpu_unmap_bo(struct bo *bo, struct vma *vma)
233 {
234         if (bo->priv)
235                 return dri_bo_unmap(bo, vma);
236         else
237                 return munmap(vma->addr, vma->length);
238 }
239
240 static uint32_t amdgpu_resolve_format(uint32_t format, uint64_t use_flags)
241 {
242         switch (format) {
243         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
244                 /* Camera subsystem requires NV12. */
245                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
246                         return DRM_FORMAT_NV12;
247                 /*HACK: See b/28671744 */
248                 return DRM_FORMAT_XBGR8888;
249         case DRM_FORMAT_FLEX_YCbCr_420_888:
250                 return DRM_FORMAT_NV12;
251         default:
252                 return format;
253         }
254 }
255
256 const struct backend backend_amdgpu = {
257         .name = "amdgpu",
258         .init = amdgpu_init,
259         .close = amdgpu_close,
260         .bo_create = amdgpu_create_bo,
261         .bo_destroy = amdgpu_destroy_bo,
262         .bo_import = amdgpu_import_bo,
263         .bo_map = amdgpu_map_bo,
264         .bo_unmap = amdgpu_unmap_bo,
265         .resolve_format = amdgpu_resolve_format,
266 };
267
268 #endif