amdgpu.c

   1 /*
   2  * Copyright 2016 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6 #ifdef DRV_AMDGPU
   7 #include <amdgpu.h>
   8 #include <amdgpu_drm.h>
   9 #include <errno.h>
  10 #include <stdio.h>
  11 #include <stdlib.h>
  12 #include <string.h>
  13 #include <sys/mman.h>
  14 #include <xf86drm.h>
  15
  16 #include "dri.h"
  17 #include "drv_priv.h"
  18 #include "helpers.h"
  19 #include "util.h"
  20
  21 #ifdef __ANDROID__
  22 #define DRI_PATH "/vendor/lib/dri/radeonsi_dri.so"
  23 #else
  24 #define DRI_PATH "/usr/lib64/dri/radeonsi_dri.so"
  25 #endif
  26
  27 #define TILE_TYPE_LINEAR 0
  28 /* DRI backend decides tiling in this case. */
  29 #define TILE_TYPE_DRI 1
  30
  31 struct amdgpu_priv {
  32         struct dri_driver dri;
  33         int drm_version;
  34 };
  35
  36 const static uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
  37                                                   DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
  38                                                   DRM_FORMAT_XRGB8888 };
  39
  40 const static uint32_t texture_source_formats[] = { DRM_FORMAT_BGR888, DRM_FORMAT_GR88,
  41                                                    DRM_FORMAT_R8,     DRM_FORMAT_NV21,
  42                                                    DRM_FORMAT_NV12,   DRM_FORMAT_YVU420_ANDROID };
  43
  44 static int amdgpu_init(struct driver *drv)
  45 {
  46         struct amdgpu_priv *priv;
  47         drmVersionPtr drm_version;
  48         struct format_metadata metadata;
  49         uint64_t use_flags = BO_USE_RENDER_MASK;
  50
  51         priv = calloc(1, sizeof(struct amdgpu_priv));
  52         if (!priv)
  53                 return -ENOMEM;
  54
  55         drm_version = drmGetVersion(drv_get_fd(drv));
  56         if (!drm_version) {
  57                 free(priv);
  58                 return -ENODEV;
  59         }
  60
  61         priv->drm_version = drm_version->version_minor;
  62         drmFreeVersion(drm_version);
  63
  64         drv->priv = priv;
  65
  66         if (dri_init(drv, DRI_PATH, "radeonsi")) {
  67                 free(priv);
  68                 drv->priv = NULL;
  69                 return -ENODEV;
  70         }
  71
  72         metadata.tiling = TILE_TYPE_LINEAR;
  73         metadata.priority = 1;
  74         metadata.modifier = DRM_FORMAT_MOD_LINEAR;
  75
  76         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
  77                              &metadata, use_flags);
  78
  79         drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
  80                              &metadata, BO_USE_TEXTURE_MASK);
  81
  82         /* Linear formats supported by display. */
  83         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
  84         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
  85         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
  86
  87         /* YUV formats for camera and display. */
  88         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
  89                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT);
  90
  91         drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata, BO_USE_SCANOUT);
  92
  93         /*
  94          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
  95          * from camera.
  96          */
  97         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
  98                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
  99
 100         /*
 101          * The following formats will be allocated by the DRI backend and may be potentially tiled.
 102          * Since format modifier support hasn't been implemented fully yet, it's not
 103          * possible to enumerate the different types of buffers (like i915 can).
 104          */
 105         use_flags &= ~BO_USE_RENDERSCRIPT;
 106         use_flags &= ~BO_USE_SW_WRITE_OFTEN;
 107         use_flags &= ~BO_USE_SW_READ_OFTEN;
 108         use_flags &= ~BO_USE_LINEAR;
 109
 110         metadata.tiling = TILE_TYPE_DRI;
 111         metadata.priority = 2;
 112
 113         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 114                              &metadata, use_flags);
 115
 116         /* Potentially tiled formats supported by display. */
 117         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 118         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 119         drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &metadata, BO_USE_SCANOUT);
 120         return 0;
 121 }
 122
 123 static void amdgpu_close(struct driver *drv)
 124 {
 125         dri_close(drv);
 126         free(drv->priv);
 127         drv->priv = NULL;
 128 }
 129
 130 static int amdgpu_create_bo(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 131                             uint64_t use_flags)
 132 {
 133         int ret;
 134         uint32_t plane, stride;
 135         struct combination *combo;
 136         union drm_amdgpu_gem_create gem_create;
 137         struct amdgpu_priv *priv = bo->drv->priv;
 138
 139         combo = drv_get_combination(bo->drv, format, use_flags);
 140         if (!combo)
 141                 return -EINVAL;
 142
 143         if (combo->metadata.tiling == TILE_TYPE_DRI)
 144                 return dri_bo_create(bo, width, height, format, use_flags);
 145
 146         stride = drv_stride_from_format(format, width, 0);
 147         if (format == DRM_FORMAT_YVU420_ANDROID)
 148                 stride = ALIGN(stride, 128);
 149         else
 150                 stride = ALIGN(stride, 64);
 151
 152         drv_bo_from_format(bo, stride, height, format);
 153
 154         memset(&gem_create, 0, sizeof(gem_create));
 155         gem_create.in.bo_size = bo->total_size;
 156         gem_create.in.alignment = 256;
 157         gem_create.in.domain_flags = 0;
 158
 159         if (use_flags & (BO_USE_LINEAR | BO_USE_SW))
 160                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
 161
 162         gem_create.in.domains = AMDGPU_GEM_DOMAIN_GTT;
 163         if (!(use_flags & (BO_USE_SW_READ_OFTEN | BO_USE_SCANOUT)))
 164                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC;
 165
 166         /* If drm_version >= 21 everything exposes explicit synchronization primitives
 167            and chromeos/arc++ will use them. Disable implicit synchronization. */
 168         if (priv->drm_version >= 21) {
 169                 gem_create.in.domain_flags |= AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
 170         }
 171
 172         /* Allocate the buffer with the preferred heap. */
 173         ret = drmCommandWriteRead(drv_get_fd(bo->drv), DRM_AMDGPU_GEM_CREATE, &gem_create,
 174                                   sizeof(gem_create));
 175         if (ret < 0)
 176                 return ret;
 177
 178         for (plane = 0; plane < bo->num_planes; plane++)
 179                 bo->handles[plane].u32 = gem_create.out.handle;
 180
 181         return 0;
 182 }
 183
 184 static int amdgpu_import_bo(struct bo *bo, struct drv_import_fd_data *data)
 185 {
 186         struct combination *combo;
 187         combo = drv_get_combination(bo->drv, data->format, data->use_flags);
 188         if (!combo)
 189                 return -EINVAL;
 190
 191         if (combo->metadata.tiling == TILE_TYPE_DRI)
 192                 return dri_bo_import(bo, data);
 193         else
 194                 return drv_prime_bo_import(bo, data);
 195 }
 196
 197 static int amdgpu_destroy_bo(struct bo *bo)
 198 {
 199         if (bo->priv)
 200                 return dri_bo_destroy(bo);
 201         else
 202                 return drv_gem_bo_destroy(bo);
 203 }
 204
 205 static void *amdgpu_map_bo(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
 206 {
 207         int ret;
 208         union drm_amdgpu_gem_mmap gem_map;
 209
 210         if (bo->priv)
 211                 return dri_bo_map(bo, vma, plane, map_flags);
 212
 213         memset(&gem_map, 0, sizeof(gem_map));
 214         gem_map.in.handle = bo->handles[plane].u32;
 215
 216         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_AMDGPU_GEM_MMAP, &gem_map);
 217         if (ret) {
 218                 drv_log("DRM_IOCTL_AMDGPU_GEM_MMAP failed\n");
 219                 return MAP_FAILED;
 220         }
 221
 222         vma->length = bo->total_size;
 223
 224         return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
 225                     gem_map.out.addr_ptr);
 226 }
 227
 228 static int amdgpu_unmap_bo(struct bo *bo, struct vma *vma)
 229 {
 230         if (bo->priv)
 231                 return dri_bo_unmap(bo, vma);
 232         else
 233                 return munmap(vma->addr, vma->length);
 234 }
 235
 236 static uint32_t amdgpu_resolve_format(uint32_t format, uint64_t use_flags)
 237 {
 238         switch (format) {
 239         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 240                 /* Camera subsystem requires NV12. */
 241                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 242                         return DRM_FORMAT_NV12;
 243                 /*HACK: See b/28671744 */
 244                 return DRM_FORMAT_XBGR8888;
 245         case DRM_FORMAT_FLEX_YCbCr_420_888:
 246                 return DRM_FORMAT_NV12;
 247         default:
 248                 return format;
 249         }
 250 }
 251
 252 const struct backend backend_amdgpu = {
 253         .name = "amdgpu",
 254         .init = amdgpu_init,
 255         .close = amdgpu_close,
 256         .bo_create = amdgpu_create_bo,
 257         .bo_destroy = amdgpu_destroy_bo,
 258         .bo_import = amdgpu_import_bo,
 259         .bo_map = amdgpu_map_bo,
 260         .bo_unmap = amdgpu_unmap_bo,
 261         .resolve_format = amdgpu_resolve_format,
 262 };
 263
 264 #endif