i915.c

   1 /*
   2  * Copyright 2014 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6
   7 #ifdef DRV_I915
   8
   9 #include <errno.h>
  10 #include <i915_drm.h>
  11 #include <stdio.h>
  12 #include <string.h>
  13 #include <sys/mman.h>
  14 #include <xf86drm.h>
  15
  16 #include "drv_priv.h"
  17 #include "helpers.h"
  18 #include "util.h"
  19
  20 #define I915_CACHELINE_SIZE 64
  21 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
  22
  23 static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555,
  24                                                   DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
  25                                                   DRM_FORMAT_XBGR2101010, DRM_FORMAT_XBGR8888,
  26                                                   DRM_FORMAT_XRGB1555, DRM_FORMAT_XRGB2101010,
  27                                                   DRM_FORMAT_XRGB8888 };
  28
  29 static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
  30                                                             DRM_FORMAT_R8, DRM_FORMAT_UYVY,
  31                                                             DRM_FORMAT_YUYV };
  32
  33 static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
  34
  35 struct i915_device {
  36         uint32_t gen;
  37         int32_t has_llc;
  38 };
  39
  40 static uint32_t i915_get_gen(int device_id)
  41 {
  42         const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
  43                                       0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
  44         unsigned i;
  45         for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
  46                 if (gen3_ids[i] == device_id)
  47                         return 3;
  48
  49         return 4;
  50 }
  51
  52 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
  53 {
  54         uint32_t i;
  55         struct combination *combo;
  56
  57         /*
  58          * Older hardware can't scanout Y-tiled formats. Newer devices can, and
  59          * report this functionality via format modifiers.
  60          */
  61         for (i = 0; i < drv->combos.size; i++) {
  62                 combo = &drv->combos.data[i];
  63                 if (combo->format != item->format)
  64                         continue;
  65
  66                 if (item->modifier == DRM_FORMAT_MOD_INVALID &&
  67                     combo->metadata.tiling == I915_TILING_X) {
  68                         /*
  69                          * FIXME: drv_query_kms() does not report the available modifiers
  70                          * yet, but we know that all hardware can scanout from X-tiled
  71                          * buffers, so let's add this to our combinations, except for
  72                          * cursor, which must not be tiled.
  73                          */
  74                         combo->use_flags |= item->use_flags & ~BO_USE_CURSOR;
  75                 }
  76
  77                 if (combo->metadata.modifier == item->modifier)
  78                         combo->use_flags |= item->use_flags;
  79         }
  80
  81         return 0;
  82 }
  83
  84 static int i915_add_combinations(struct driver *drv)
  85 {
  86         int ret;
  87         uint32_t i, num_items;
  88         struct kms_item *items;
  89         struct format_metadata metadata;
  90         uint64_t render_use_flags, texture_use_flags;
  91
  92         render_use_flags = BO_USE_RENDER_MASK;
  93         texture_use_flags = BO_USE_TEXTURE_MASK;
  94
  95         metadata.tiling = I915_TILING_NONE;
  96         metadata.priority = 1;
  97         metadata.modifier = DRM_FORMAT_MOD_LINEAR;
  98
  99         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 100                                    &metadata, render_use_flags);
 101         if (ret)
 102                 return ret;
 103
 104         ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
 105                                    &metadata, texture_use_flags);
 106         if (ret)
 107                 return ret;
 108
 109         ret = drv_add_combinations(drv, tileable_texture_source_formats,
 110                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 111                                    texture_use_flags);
 112         if (ret)
 113                 return ret;
 114
 115         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 116         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 117
 118         /* IPU3 camera ISP supports only NV12 output. */
 119         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
 120                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
 121         /*
 122          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
 123          * from camera.
 124          */
 125         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
 126                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
 127
 128         render_use_flags &= ~BO_USE_RENDERSCRIPT;
 129         render_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
 130         render_use_flags &= ~BO_USE_SW_READ_OFTEN;
 131         render_use_flags &= ~BO_USE_LINEAR;
 132
 133         texture_use_flags &= ~BO_USE_RENDERSCRIPT;
 134         texture_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
 135         texture_use_flags &= ~BO_USE_SW_READ_OFTEN;
 136         texture_use_flags &= ~BO_USE_LINEAR;
 137
 138         metadata.tiling = I915_TILING_X;
 139         metadata.priority = 2;
 140         metadata.modifier = I915_FORMAT_MOD_X_TILED;
 141
 142         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 143                                    &metadata, render_use_flags);
 144         if (ret)
 145                 return ret;
 146
 147         ret = drv_add_combinations(drv, tileable_texture_source_formats,
 148                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 149                                    texture_use_flags);
 150         if (ret)
 151                 return ret;
 152
 153         metadata.tiling = I915_TILING_Y;
 154         metadata.priority = 3;
 155         metadata.modifier = I915_FORMAT_MOD_Y_TILED;
 156
 157         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 158                                    &metadata, render_use_flags);
 159         if (ret)
 160                 return ret;
 161
 162         ret = drv_add_combinations(drv, tileable_texture_source_formats,
 163                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 164                                    texture_use_flags);
 165         if (ret)
 166                 return ret;
 167
 168         items = drv_query_kms(drv, &num_items);
 169         if (!items || !num_items)
 170                 return 0;
 171
 172         for (i = 0; i < num_items; i++) {
 173                 ret = i915_add_kms_item(drv, &items[i]);
 174                 if (ret) {
 175                         free(items);
 176                         return ret;
 177                 }
 178         }
 179
 180         free(items);
 181         return 0;
 182 }
 183
 184 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
 185                                  uint32_t *aligned_height)
 186 {
 187         struct i915_device *i915 = bo->drv->priv;
 188         uint32_t horizontal_alignment = 4;
 189         uint32_t vertical_alignment = 4;
 190
 191         switch (tiling) {
 192         default:
 193         case I915_TILING_NONE:
 194                 horizontal_alignment = 64;
 195                 break;
 196
 197         case I915_TILING_X:
 198                 horizontal_alignment = 512;
 199                 vertical_alignment = 8;
 200                 break;
 201
 202         case I915_TILING_Y:
 203                 if (i915->gen == 3) {
 204                         horizontal_alignment = 512;
 205                         vertical_alignment = 8;
 206                 } else {
 207                         horizontal_alignment = 128;
 208                         vertical_alignment = 32;
 209                 }
 210                 break;
 211         }
 212
 213         /*
 214          * The alignment calculated above is based on the full size luma plane and to have chroma
 215          * planes properly aligned with subsampled formats, we need to multiply luma alignment by
 216          * subsampling factor.
 217          */
 218         switch (bo->format) {
 219         case DRM_FORMAT_YVU420_ANDROID:
 220         case DRM_FORMAT_YVU420:
 221                 horizontal_alignment *= 2;
 222         /* Fall through */
 223         case DRM_FORMAT_NV12:
 224                 vertical_alignment *= 2;
 225                 break;
 226         }
 227
 228         *aligned_height = ALIGN(bo->height, vertical_alignment);
 229         if (i915->gen > 3) {
 230                 *stride = ALIGN(*stride, horizontal_alignment);
 231         } else {
 232                 while (*stride > horizontal_alignment)
 233                         horizontal_alignment <<= 1;
 234
 235                 *stride = horizontal_alignment;
 236         }
 237
 238         if (i915->gen <= 3 && *stride > 8192)
 239                 return -EINVAL;
 240
 241         return 0;
 242 }
 243
 244 static void i915_clflush(void *start, size_t size)
 245 {
 246         void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
 247         void *end = (void *)((uintptr_t)start + size);
 248
 249         __builtin_ia32_mfence();
 250         while (p < end) {
 251                 __builtin_ia32_clflush(p);
 252                 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
 253         }
 254 }
 255
 256 static int i915_init(struct driver *drv)
 257 {
 258         int ret;
 259         int device_id;
 260         struct i915_device *i915;
 261         drm_i915_getparam_t get_param;
 262
 263         i915 = calloc(1, sizeof(*i915));
 264         if (!i915)
 265                 return -ENOMEM;
 266
 267         memset(&get_param, 0, sizeof(get_param));
 268         get_param.param = I915_PARAM_CHIPSET_ID;
 269         get_param.value = &device_id;
 270         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
 271         if (ret) {
 272                 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
 273                 free(i915);
 274                 return -EINVAL;
 275         }
 276
 277         i915->gen = i915_get_gen(device_id);
 278
 279         memset(&get_param, 0, sizeof(get_param));
 280         get_param.param = I915_PARAM_HAS_LLC;
 281         get_param.value = &i915->has_llc;
 282         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
 283         if (ret) {
 284                 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
 285                 free(i915);
 286                 return -EINVAL;
 287         }
 288
 289         drv->priv = i915;
 290
 291         return i915_add_combinations(drv);
 292 }
 293
 294 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 295                           uint64_t use_flags)
 296 {
 297         int ret;
 298         size_t plane;
 299         uint32_t stride;
 300         struct drm_i915_gem_create gem_create;
 301         struct drm_i915_gem_set_tiling gem_set_tiling;
 302         struct combination *combo;
 303
 304         combo = drv_get_combination(bo->drv, format, use_flags);
 305         if (!combo)
 306                 return -EINVAL;
 307
 308         bo->tiling = combo->metadata.tiling;
 309
 310         stride = drv_stride_from_format(format, width, 0);
 311
 312         ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
 313         if (ret)
 314                 return ret;
 315
 316         /*
 317          * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep
 318          * total size as with aligned height to ensure enough padding space after each plane to
 319          * satisfy GPU alignment requirements.
 320          *
 321          * We do it by first calling drv_bo_from_format() with aligned height and
 322          * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates
 323          * and then calling it again with requested parameters.
 324          *
 325          * This relies on the fact that i965 driver uses separate surfaces for each plane and
 326          * contents of padding bytes is not affected, as it is only used to satisfy GPU cache
 327          * requests.
 328          *
 329          * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside
 330          * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8.
 331          */
 332         if (format == DRM_FORMAT_YVU420_ANDROID) {
 333                 uint32_t unaligned_height = bo->height;
 334                 size_t total_size;
 335
 336                 drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420);
 337                 total_size = bo->total_size;
 338                 drv_bo_from_format(bo, stride, unaligned_height, format);
 339                 bo->total_size = total_size;
 340         } else {
 341                 drv_bo_from_format(bo, stride, height, format);
 342         }
 343
 344         /*
 345          * Quoting Mesa ISL library:
 346          *
 347          *    - For linear surfaces, additional padding of 64 bytes is required at
 348          *      the bottom of the surface. This is in addition to the padding
 349          *      required above.
 350          */
 351         if (bo->tiling == I915_TILING_NONE)
 352                 bo->total_size += 64;
 353
 354         memset(&gem_create, 0, sizeof(gem_create));
 355         gem_create.size = bo->total_size;
 356
 357         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
 358         if (ret) {
 359                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
 360                         gem_create.size);
 361                 return ret;
 362         }
 363
 364         for (plane = 0; plane < bo->num_planes; plane++)
 365                 bo->handles[plane].u32 = gem_create.handle;
 366
 367         memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
 368         gem_set_tiling.handle = bo->handles[0].u32;
 369         gem_set_tiling.tiling_mode = bo->tiling;
 370         gem_set_tiling.stride = bo->strides[0];
 371
 372         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
 373         if (ret) {
 374                 struct drm_gem_close gem_close;
 375                 memset(&gem_close, 0, sizeof(gem_close));
 376                 gem_close.handle = bo->handles[0].u32;
 377                 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
 378
 379                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
 380                 return -errno;
 381         }
 382
 383         return 0;
 384 }
 385
 386 static void i915_close(struct driver *drv)
 387 {
 388         free(drv->priv);
 389         drv->priv = NULL;
 390 }
 391
 392 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
 393 {
 394         int ret;
 395         struct drm_i915_gem_get_tiling gem_get_tiling;
 396
 397         ret = drv_prime_bo_import(bo, data);
 398         if (ret)
 399                 return ret;
 400
 401         /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
 402         memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
 403         gem_get_tiling.handle = bo->handles[0].u32;
 404
 405         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
 406         if (ret) {
 407                 drv_gem_bo_destroy(bo);
 408                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
 409                 return ret;
 410         }
 411
 412         bo->tiling = gem_get_tiling.tiling_mode;
 413         return 0;
 414 }
 415
 416 static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, uint32_t map_flags)
 417 {
 418         int ret;
 419         void *addr;
 420
 421         if (bo->tiling == I915_TILING_NONE) {
 422                 struct drm_i915_gem_mmap gem_map;
 423                 memset(&gem_map, 0, sizeof(gem_map));
 424
 425                 if ((bo->use_flags & BO_USE_SCANOUT) && !(bo->use_flags & BO_USE_RENDERSCRIPT))
 426                         gem_map.flags = I915_MMAP_WC;
 427
 428                 gem_map.handle = bo->handles[0].u32;
 429                 gem_map.offset = 0;
 430                 gem_map.size = bo->total_size;
 431
 432                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
 433                 if (ret) {
 434                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
 435                         return MAP_FAILED;
 436                 }
 437
 438                 addr = (void *)(uintptr_t)gem_map.addr_ptr;
 439         } else {
 440                 struct drm_i915_gem_mmap_gtt gem_map;
 441                 memset(&gem_map, 0, sizeof(gem_map));
 442
 443                 gem_map.handle = bo->handles[0].u32;
 444
 445                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
 446                 if (ret) {
 447                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
 448                         return MAP_FAILED;
 449                 }
 450
 451                 addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
 452                             gem_map.offset);
 453         }
 454
 455         if (addr == MAP_FAILED) {
 456                 fprintf(stderr, "drv: i915 GEM mmap failed\n");
 457                 return addr;
 458         }
 459
 460         data->length = bo->total_size;
 461         return addr;
 462 }
 463
 464 static int i915_bo_invalidate(struct bo *bo, struct map_info *data)
 465 {
 466         int ret;
 467         struct drm_i915_gem_set_domain set_domain;
 468
 469         memset(&set_domain, 0, sizeof(set_domain));
 470         set_domain.handle = bo->handles[0].u32;
 471         if (bo->tiling == I915_TILING_NONE) {
 472                 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
 473                 if (data->map_flags & BO_MAP_WRITE)
 474                         set_domain.write_domain = I915_GEM_DOMAIN_CPU;
 475         } else {
 476                 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
 477                 if (data->map_flags & BO_MAP_WRITE)
 478                         set_domain.write_domain = I915_GEM_DOMAIN_GTT;
 479         }
 480
 481         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
 482         if (ret) {
 483                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret);
 484                 return ret;
 485         }
 486
 487         return 0;
 488 }
 489
 490 static int i915_bo_flush(struct bo *bo, struct map_info *data)
 491 {
 492         struct i915_device *i915 = bo->drv->priv;
 493         if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
 494                 i915_clflush(data->addr, data->length);
 495
 496         return 0;
 497 }
 498
 499 static uint32_t i915_resolve_format(uint32_t format, uint64_t use_flags)
 500 {
 501         switch (format) {
 502         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 503                 /* KBL camera subsystem requires NV12. */
 504                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 505                         return DRM_FORMAT_NV12;
 506                 /*HACK: See b/28671744 */
 507                 return DRM_FORMAT_XBGR8888;
 508         case DRM_FORMAT_FLEX_YCbCr_420_888:
 509                 /* KBL camera subsystem requires NV12. */
 510                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 511                         return DRM_FORMAT_NV12;
 512                 return DRM_FORMAT_YVU420;
 513         default:
 514                 return format;
 515         }
 516 }
 517
 518 struct backend backend_i915 = {
 519         .name = "i915",
 520         .init = i915_init,
 521         .close = i915_close,
 522         .bo_create = i915_bo_create,
 523         .bo_destroy = drv_gem_bo_destroy,
 524         .bo_import = i915_bo_import,
 525         .bo_map = i915_bo_map,
 526         .bo_unmap = drv_bo_munmap,
 527         .bo_invalidate = i915_bo_invalidate,
 528         .bo_flush = i915_bo_flush,
 529         .resolve_format = i915_resolve_format,
 530 };
 531
 532 #endif