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[android-x86/external-minigbm.git] / i915.c
1 /*
2  * Copyright 2014 The Chromium OS Authors. All rights reserved.
3  * Use of this source code is governed by a BSD-style license that can be
4  * found in the LICENSE file.
5  */
6
7 #ifdef DRV_I915
8
9 #include <errno.h>
10 #include <i915_drm.h>
11 #include <stdio.h>
12 #include <string.h>
13 #include <sys/mman.h>
14 #include <xf86drm.h>
15
16 #include "drv_priv.h"
17 #include "helpers.h"
18 #include "util.h"
19
20 #define I915_CACHELINE_SIZE 64
21 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
22
23 static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
24                                                   DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
25                                                   DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
26                                                   DRM_FORMAT_XRGB8888 };
27
28 static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
29                                                             DRM_FORMAT_R8, DRM_FORMAT_UYVY,
30                                                             DRM_FORMAT_YUYV };
31
32 static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
33
34 struct i915_device {
35         uint32_t gen;
36         int32_t has_llc;
37 };
38
39 static uint32_t i915_get_gen(int device_id)
40 {
41         const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
42                                       0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
43         unsigned i;
44         for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
45                 if (gen3_ids[i] == device_id)
46                         return 3;
47
48         return 4;
49 }
50
51 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
52 {
53         uint32_t i;
54         struct combination *combo;
55
56         /*
57          * Older hardware can't scanout Y-tiled formats. Newer devices can, and
58          * report this functionality via format modifiers.
59          */
60         for (i = 0; i < drv->backend->combos.size; i++) {
61                 combo = &drv->backend->combos.data[i];
62                 if (combo->format == item->format) {
63                         if ((combo->metadata.tiling == I915_TILING_Y &&
64                              item->modifier == I915_FORMAT_MOD_Y_TILED) ||
65                             (combo->metadata.tiling == I915_TILING_X &&
66                              item->modifier == I915_FORMAT_MOD_X_TILED)) {
67                                 combo->metadata.modifier = item->modifier;
68                                 combo->usage |= item->usage;
69                         } else if (combo->metadata.tiling != I915_TILING_Y) {
70                                 combo->usage |= item->usage;
71                         }
72                 }
73         }
74
75         return 0;
76 }
77
78 static int i915_add_combinations(struct driver *drv)
79 {
80         int ret;
81         uint32_t i, num_items;
82         struct kms_item *items;
83         struct format_metadata metadata;
84         uint64_t render_flags, texture_flags;
85
86         render_flags = BO_USE_RENDER_MASK;
87         texture_flags = BO_USE_TEXTURE_MASK;
88
89         metadata.tiling = I915_TILING_NONE;
90         metadata.priority = 1;
91         metadata.modifier = DRM_FORMAT_MOD_NONE;
92
93         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
94                                    &metadata, render_flags);
95         if (ret)
96                 return ret;
97
98         ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
99                                    &metadata, texture_flags);
100         if (ret)
101                 return ret;
102
103         ret = drv_add_combinations(drv, tileable_texture_source_formats,
104                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
105                                    texture_flags);
106         if (ret)
107                 return ret;
108
109         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
110         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
111
112         render_flags &= ~BO_USE_SW_WRITE_OFTEN;
113         render_flags &= ~BO_USE_SW_READ_OFTEN;
114         render_flags &= ~BO_USE_LINEAR;
115
116         texture_flags &= ~BO_USE_SW_WRITE_OFTEN;
117         texture_flags &= ~BO_USE_SW_READ_OFTEN;
118         texture_flags &= ~BO_USE_LINEAR;
119
120         metadata.tiling = I915_TILING_X;
121         metadata.priority = 2;
122
123         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
124                                    &metadata, render_flags);
125         if (ret)
126                 return ret;
127
128         ret = drv_add_combinations(drv, tileable_texture_source_formats,
129                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
130                                    texture_flags);
131         if (ret)
132                 return ret;
133
134         metadata.tiling = I915_TILING_Y;
135         metadata.priority = 3;
136
137         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
138                                    &metadata, render_flags);
139         if (ret)
140                 return ret;
141
142         ret = drv_add_combinations(drv, tileable_texture_source_formats,
143                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
144                                    texture_flags);
145         if (ret)
146                 return ret;
147
148         items = drv_query_kms(drv, &num_items);
149         if (!items || !num_items)
150                 return 0;
151
152         for (i = 0; i < num_items; i++) {
153                 ret = i915_add_kms_item(drv, &items[i]);
154                 if (ret) {
155                         free(items);
156                         return ret;
157                 }
158         }
159
160         free(items);
161         return 0;
162 }
163
164 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
165                                  uint32_t *aligned_height)
166 {
167         struct i915_device *i915 = bo->drv->priv;
168         uint32_t horizontal_alignment = 4;
169         uint32_t vertical_alignment = 4;
170
171         switch (tiling) {
172         default:
173         case I915_TILING_NONE:
174                 horizontal_alignment = 64;
175                 break;
176
177         case I915_TILING_X:
178                 horizontal_alignment = 512;
179                 vertical_alignment = 8;
180                 break;
181
182         case I915_TILING_Y:
183                 if (i915->gen == 3) {
184                         horizontal_alignment = 512;
185                         vertical_alignment = 8;
186                 } else {
187                         horizontal_alignment = 128;
188                         vertical_alignment = 32;
189                 }
190                 break;
191         }
192
193         *aligned_height = ALIGN(bo->height, vertical_alignment);
194         if (i915->gen > 3) {
195                 *stride = ALIGN(*stride, horizontal_alignment);
196         } else {
197                 while (*stride > horizontal_alignment)
198                         horizontal_alignment <<= 1;
199
200                 *stride = horizontal_alignment;
201         }
202
203         if (i915->gen <= 3 && *stride > 8192)
204                 return -EINVAL;
205
206         return 0;
207 }
208
209 static void i915_clflush(void *start, size_t size)
210 {
211         void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
212         void *end = (void *)((uintptr_t)start + size);
213
214         __builtin_ia32_mfence();
215         while (p < end) {
216                 __builtin_ia32_clflush(p);
217                 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
218         }
219 }
220
221 static int i915_init(struct driver *drv)
222 {
223         int ret;
224         int device_id;
225         struct i915_device *i915;
226         drm_i915_getparam_t get_param;
227
228         i915 = calloc(1, sizeof(*i915));
229         if (!i915)
230                 return -ENOMEM;
231
232         memset(&get_param, 0, sizeof(get_param));
233         get_param.param = I915_PARAM_CHIPSET_ID;
234         get_param.value = &device_id;
235         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
236         if (ret) {
237                 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
238                 free(i915);
239                 return -EINVAL;
240         }
241
242         i915->gen = i915_get_gen(device_id);
243
244         memset(&get_param, 0, sizeof(get_param));
245         get_param.param = I915_PARAM_HAS_LLC;
246         get_param.value = &i915->has_llc;
247         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
248         if (ret) {
249                 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
250                 free(i915);
251                 return -EINVAL;
252         }
253
254         drv->priv = i915;
255
256         return i915_add_combinations(drv);
257 }
258
259 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
260                           uint32_t flags)
261 {
262         int ret;
263         size_t plane;
264         uint32_t stride;
265         struct drm_i915_gem_create gem_create;
266         struct drm_i915_gem_set_tiling gem_set_tiling;
267
268         if (flags & (BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
269                 bo->tiling = I915_TILING_NONE;
270         else if (flags & BO_USE_SCANOUT)
271                 bo->tiling = I915_TILING_X;
272         else
273                 bo->tiling = I915_TILING_Y;
274
275         if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
276                 bo->tiling = I915_TILING_NONE;
277
278         stride = drv_stride_from_format(format, width, 0);
279
280         ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
281         if (ret)
282                 return ret;
283
284         /*
285          * Align the Y plane to 128 bytes so the chroma planes would be aligned
286          * to 64 byte boundaries. This is an Intel HW requirement.
287          */
288         if (format == DRM_FORMAT_YVU420)
289                 stride = ALIGN(stride, 128);
290
291         /*
292          * HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned.
293          */
294         if (format == DRM_FORMAT_YVU420_ANDROID)
295                 height = bo->height;
296
297         drv_bo_from_format(bo, stride, height, format);
298
299         memset(&gem_create, 0, sizeof(gem_create));
300         gem_create.size = bo->total_size;
301
302         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
303         if (ret) {
304                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
305                         gem_create.size);
306                 return ret;
307         }
308
309         for (plane = 0; plane < bo->num_planes; plane++)
310                 bo->handles[plane].u32 = gem_create.handle;
311
312         memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
313         gem_set_tiling.handle = bo->handles[0].u32;
314         gem_set_tiling.tiling_mode = bo->tiling;
315         gem_set_tiling.stride = bo->strides[0];
316
317         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
318         if (ret) {
319                 struct drm_gem_close gem_close;
320                 memset(&gem_close, 0, sizeof(gem_close));
321                 gem_close.handle = bo->handles[0].u32;
322                 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
323
324                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
325                 return -errno;
326         }
327
328         return 0;
329 }
330
331 static void i915_close(struct driver *drv)
332 {
333         free(drv->priv);
334         drv->priv = NULL;
335 }
336
337 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
338 {
339         int ret;
340         struct drm_i915_gem_get_tiling gem_get_tiling;
341
342         ret = drv_prime_bo_import(bo, data);
343         if (ret)
344                 return ret;
345
346         /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
347         memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
348         gem_get_tiling.handle = bo->handles[0].u32;
349
350         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
351         if (ret) {
352                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
353                 return ret;
354         }
355
356         bo->tiling = gem_get_tiling.tiling_mode;
357         return 0;
358 }
359
360 static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
361 {
362         int ret;
363         void *addr;
364         struct drm_i915_gem_set_domain set_domain;
365
366         memset(&set_domain, 0, sizeof(set_domain));
367         set_domain.handle = bo->handles[0].u32;
368         if (bo->tiling == I915_TILING_NONE) {
369                 struct drm_i915_gem_mmap gem_map;
370                 memset(&gem_map, 0, sizeof(gem_map));
371
372                 gem_map.handle = bo->handles[0].u32;
373                 gem_map.offset = 0;
374                 gem_map.size = bo->total_size;
375
376                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
377                 if (ret) {
378                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
379                         return MAP_FAILED;
380                 }
381
382                 addr = (void *)(uintptr_t)gem_map.addr_ptr;
383                 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
384                 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
385
386         } else {
387                 struct drm_i915_gem_mmap_gtt gem_map;
388                 memset(&gem_map, 0, sizeof(gem_map));
389
390                 gem_map.handle = bo->handles[0].u32;
391
392                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
393                 if (ret) {
394                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
395                         return MAP_FAILED;
396                 }
397
398                 addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
399                             gem_map.offset);
400
401                 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
402                 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
403         }
404
405         if (addr == MAP_FAILED) {
406                 fprintf(stderr, "drv: i915 GEM mmap failed\n");
407                 return addr;
408         }
409
410         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
411         if (ret) {
412                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
413                 return MAP_FAILED;
414         }
415
416         data->length = bo->total_size;
417         return addr;
418 }
419
420 static int i915_bo_unmap(struct bo *bo, struct map_info *data)
421 {
422         struct i915_device *i915 = bo->drv->priv;
423         if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
424                 i915_clflush(data->addr, data->length);
425
426         return munmap(data->addr, data->length);
427 }
428
429 static uint32_t i915_resolve_format(uint32_t format)
430 {
431         switch (format) {
432         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
433                 /*HACK: See b/28671744 */
434                 return DRM_FORMAT_XBGR8888;
435         case DRM_FORMAT_FLEX_YCbCr_420_888:
436                 return DRM_FORMAT_YVU420;
437         default:
438                 return format;
439         }
440 }
441
442 struct backend backend_i915 = {
443         .name = "i915",
444         .init = i915_init,
445         .close = i915_close,
446         .bo_create = i915_bo_create,
447         .bo_destroy = drv_gem_bo_destroy,
448         .bo_import = i915_bo_import,
449         .bo_map = i915_bo_map,
450         .bo_unmap = i915_bo_unmap,
451         .resolve_format = i915_resolve_format,
452 };
453
454 #endif