2 * Copyright 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
21 #define I915_CACHELINE_SIZE 64
22 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
24 static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555,
25 DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
26 DRM_FORMAT_XBGR2101010, DRM_FORMAT_XBGR8888,
27 DRM_FORMAT_XBGR16161616, DRM_FORMAT_XRGB1555,
28 DRM_FORMAT_XRGB2101010, DRM_FORMAT_XRGB8888 };
30 static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8,
31 DRM_FORMAT_UYVY, DRM_FORMAT_YUYV };
33 static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID,
41 static uint32_t i915_get_gen(int device_id)
43 const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
44 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
46 for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
47 if (gen3_ids[i] == device_id)
54 * We allow allocation of ARGB formats for SCANOUT if the corresponding XRGB
55 * formats supports it. It's up to the caller (chrome ozone) to ultimately not
56 * scan out ARGB if the display controller only supports XRGB, but we'll allow
57 * the allocation of the bo here.
59 static bool format_compatible(const struct combination *combo, uint32_t format)
61 if (combo->format == format)
65 case DRM_FORMAT_XRGB8888:
66 return combo->format == DRM_FORMAT_ARGB8888;
67 case DRM_FORMAT_XBGR8888:
68 return combo->format == DRM_FORMAT_ABGR8888;
69 case DRM_FORMAT_RGBX8888:
70 return combo->format == DRM_FORMAT_RGBA8888;
71 case DRM_FORMAT_BGRX8888:
72 return combo->format == DRM_FORMAT_BGRA8888;
78 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
81 struct combination *combo;
84 * Older hardware can't scanout Y-tiled formats. Newer devices can, and
85 * report this functionality via format modifiers.
87 for (i = 0; i < drv_array_size(drv->combos); i++) {
88 combo = (struct combination *)drv_array_at_idx(drv->combos, i);
89 if (!format_compatible(combo, item->format))
92 if (item->modifier == DRM_FORMAT_MOD_LINEAR &&
93 combo->metadata.tiling == I915_TILING_X) {
95 * FIXME: drv_query_kms() does not report the available modifiers
96 * yet, but we know that all hardware can scanout from X-tiled
97 * buffers, so let's add this to our combinations, except for
98 * cursor, which must not be tiled.
100 combo->use_flags |= item->use_flags & ~BO_USE_CURSOR;
103 if (combo->metadata.modifier == item->modifier)
104 combo->use_flags |= item->use_flags;
110 static int i915_add_combinations(struct driver *drv)
114 struct drv_array *kms_items;
115 struct format_metadata metadata;
116 uint64_t render_use_flags, texture_use_flags;
118 render_use_flags = BO_USE_RENDER_MASK;
119 texture_use_flags = BO_USE_TEXTURE_MASK;
121 metadata.tiling = I915_TILING_NONE;
122 metadata.priority = 1;
123 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
125 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
126 &metadata, render_use_flags);
128 drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
129 &metadata, texture_use_flags);
131 drv_add_combinations(drv, tileable_texture_source_formats,
132 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
135 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
136 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
138 /* IPU3 camera ISP supports only NV12 output. */
139 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
140 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
142 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
145 drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
146 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
148 render_use_flags &= ~BO_USE_RENDERSCRIPT;
149 render_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
150 render_use_flags &= ~BO_USE_SW_READ_OFTEN;
151 render_use_flags &= ~BO_USE_LINEAR;
153 texture_use_flags &= ~BO_USE_RENDERSCRIPT;
154 texture_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
155 texture_use_flags &= ~BO_USE_SW_READ_OFTEN;
156 texture_use_flags &= ~BO_USE_LINEAR;
158 metadata.tiling = I915_TILING_X;
159 metadata.priority = 2;
160 metadata.modifier = I915_FORMAT_MOD_X_TILED;
162 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
163 &metadata, render_use_flags);
165 drv_add_combinations(drv, tileable_texture_source_formats,
166 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
169 metadata.tiling = I915_TILING_Y;
170 metadata.priority = 3;
171 metadata.modifier = I915_FORMAT_MOD_Y_TILED;
173 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
174 &metadata, render_use_flags);
176 drv_add_combinations(drv, tileable_texture_source_formats,
177 ARRAY_SIZE(tileable_texture_source_formats), &metadata,
180 kms_items = drv_query_kms(drv);
184 for (i = 0; i < drv_array_size(kms_items); i++) {
185 ret = i915_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i));
187 drv_array_destroy(kms_items);
192 drv_array_destroy(kms_items);
196 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
197 uint32_t *aligned_height)
199 struct i915_device *i915 = bo->drv->priv;
200 uint32_t horizontal_alignment = 4;
201 uint32_t vertical_alignment = 4;
205 case I915_TILING_NONE:
206 horizontal_alignment = 64;
210 horizontal_alignment = 512;
211 vertical_alignment = 8;
215 if (i915->gen == 3) {
216 horizontal_alignment = 512;
217 vertical_alignment = 8;
219 horizontal_alignment = 128;
220 vertical_alignment = 32;
226 * The alignment calculated above is based on the full size luma plane and to have chroma
227 * planes properly aligned with subsampled formats, we need to multiply luma alignment by
228 * subsampling factor.
230 switch (bo->format) {
231 case DRM_FORMAT_YVU420_ANDROID:
232 case DRM_FORMAT_YVU420:
233 horizontal_alignment *= 2;
235 case DRM_FORMAT_NV12:
236 vertical_alignment *= 2;
240 *aligned_height = ALIGN(bo->height, vertical_alignment);
242 *stride = ALIGN(*stride, horizontal_alignment);
244 while (*stride > horizontal_alignment)
245 horizontal_alignment <<= 1;
247 *stride = horizontal_alignment;
250 if (i915->gen <= 3 && *stride > 8192)
256 static void i915_clflush(void *start, size_t size)
258 void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
259 void *end = (void *)((uintptr_t)start + size);
261 __builtin_ia32_mfence();
263 __builtin_ia32_clflush(p);
264 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
268 static int i915_init(struct driver *drv)
272 struct i915_device *i915;
273 drm_i915_getparam_t get_param;
275 i915 = calloc(1, sizeof(*i915));
279 memset(&get_param, 0, sizeof(get_param));
280 get_param.param = I915_PARAM_CHIPSET_ID;
281 get_param.value = &device_id;
282 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
284 drv_log("Failed to get I915_PARAM_CHIPSET_ID\n");
289 i915->gen = i915_get_gen(device_id);
291 memset(&get_param, 0, sizeof(get_param));
292 get_param.param = I915_PARAM_HAS_LLC;
293 get_param.value = &i915->has_llc;
294 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
296 drv_log("Failed to get I915_PARAM_HAS_LLC\n");
303 return i915_add_combinations(drv);
306 static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height,
307 uint32_t format, uint64_t modifier)
312 struct drm_i915_gem_create gem_create;
313 struct drm_i915_gem_set_tiling gem_set_tiling;
316 case DRM_FORMAT_MOD_LINEAR:
317 bo->tiling = I915_TILING_NONE;
319 case I915_FORMAT_MOD_X_TILED:
320 bo->tiling = I915_TILING_X;
322 case I915_FORMAT_MOD_Y_TILED:
323 bo->tiling = I915_TILING_Y;
327 bo->format_modifiers[0] = modifier;
329 stride = drv_stride_from_format(format, width, 0);
331 ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
336 * HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned.
338 if (format == DRM_FORMAT_YVU420_ANDROID)
341 drv_bo_from_format(bo, stride, height, format);
343 memset(&gem_create, 0, sizeof(gem_create));
344 gem_create.size = bo->total_size;
346 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
348 drv_log("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size);
352 for (plane = 0; plane < bo->num_planes; plane++)
353 bo->handles[plane].u32 = gem_create.handle;
355 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
356 gem_set_tiling.handle = bo->handles[0].u32;
357 gem_set_tiling.tiling_mode = bo->tiling;
358 gem_set_tiling.stride = bo->strides[0];
360 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
362 struct drm_gem_close gem_close;
363 memset(&gem_close, 0, sizeof(gem_close));
364 gem_close.handle = bo->handles[0].u32;
365 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
367 drv_log("DRM_IOCTL_I915_GEM_SET_TILING failed with %d\n", errno);
374 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
377 struct combination *combo;
379 combo = drv_get_combination(bo->drv, format, use_flags);
383 return i915_bo_create_for_modifier(bo, width, height, format, combo->metadata.modifier);
386 static int i915_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
387 uint32_t format, const uint64_t *modifiers, uint32_t count)
389 static const uint64_t modifier_order[] = {
390 I915_FORMAT_MOD_Y_TILED,
391 I915_FORMAT_MOD_X_TILED,
392 DRM_FORMAT_MOD_LINEAR,
396 modifier = drv_pick_modifier(modifiers, count, modifier_order, ARRAY_SIZE(modifier_order));
398 return i915_bo_create_for_modifier(bo, width, height, format, modifier);
401 static void i915_close(struct driver *drv)
407 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
410 struct drm_i915_gem_get_tiling gem_get_tiling;
412 ret = drv_prime_bo_import(bo, data);
416 /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
417 memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
418 gem_get_tiling.handle = bo->handles[0].u32;
420 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
422 drv_gem_bo_destroy(bo);
423 drv_log("DRM_IOCTL_I915_GEM_GET_TILING failed.\n");
427 bo->tiling = gem_get_tiling.tiling_mode;
431 static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
436 if (bo->tiling == I915_TILING_NONE) {
437 struct drm_i915_gem_mmap gem_map;
438 memset(&gem_map, 0, sizeof(gem_map));
440 if ((bo->use_flags & BO_USE_SCANOUT) && !(bo->use_flags & BO_USE_RENDERSCRIPT))
441 gem_map.flags = I915_MMAP_WC;
443 gem_map.handle = bo->handles[0].u32;
445 gem_map.size = bo->total_size;
447 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
449 drv_log("DRM_IOCTL_I915_GEM_MMAP failed\n");
453 addr = (void *)(uintptr_t)gem_map.addr_ptr;
455 struct drm_i915_gem_mmap_gtt gem_map;
456 memset(&gem_map, 0, sizeof(gem_map));
458 gem_map.handle = bo->handles[0].u32;
460 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
462 drv_log("DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
466 addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
470 if (addr == MAP_FAILED) {
471 drv_log("i915 GEM mmap failed\n");
475 vma->length = bo->total_size;
479 static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
482 struct drm_i915_gem_set_domain set_domain;
484 memset(&set_domain, 0, sizeof(set_domain));
485 set_domain.handle = bo->handles[0].u32;
486 if (bo->tiling == I915_TILING_NONE) {
487 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
488 if (mapping->vma->map_flags & BO_MAP_WRITE)
489 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
491 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
492 if (mapping->vma->map_flags & BO_MAP_WRITE)
493 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
496 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
498 drv_log("DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret);
505 static int i915_bo_flush(struct bo *bo, struct mapping *mapping)
507 struct i915_device *i915 = bo->drv->priv;
508 if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
509 i915_clflush(mapping->vma->addr, mapping->vma->length);
514 static uint32_t i915_resolve_format(uint32_t format, uint64_t use_flags)
517 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
518 /* KBL camera subsystem requires NV12. */
519 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
520 return DRM_FORMAT_NV12;
521 /*HACK: See b/28671744 */
522 return DRM_FORMAT_XBGR8888;
523 case DRM_FORMAT_FLEX_YCbCr_420_888:
525 * KBL camera subsystem requires NV12. Our other use cases
527 * - Hardware video supports NV12,
528 * - USB Camera HALv3 supports NV12,
529 * - USB Camera HALv1 doesn't use this format.
530 * Moreover, NV12 is preferred for video, due to overlay
533 return DRM_FORMAT_NV12;
539 const struct backend backend_i915 = {
543 .bo_create = i915_bo_create,
544 .bo_create_with_modifiers = i915_bo_create_with_modifiers,
545 .bo_destroy = drv_gem_bo_destroy,
546 .bo_import = i915_bo_import,
547 .bo_map = i915_bo_map,
548 .bo_unmap = drv_bo_munmap,
549 .bo_invalidate = i915_bo_invalidate,
550 .bo_flush = i915_bo_flush,
551 .resolve_format = i915_resolve_format,