2 * Copyright 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
11 #include <intel_bufmgr.h>
20 static const uint32_t tileable_formats[] = {
21 DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
22 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
23 DRM_FORMAT_XRGB8888, DRM_FORMAT_UYVY, DRM_FORMAT_YUYV
26 static const uint32_t linear_only_formats[] = {
27 DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_YVU420,
28 DRM_FORMAT_YVU420_ANDROID
34 drm_intel_bufmgr *mgr;
40 drm_intel_bo *ibos[DRV_MAX_PLANES];
43 static int get_gen(int device_id)
45 const uint16_t gen3_ids[] = {0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
46 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011};
48 for(i = 0; i < ARRAY_SIZE(gen3_ids); i++)
49 if (gen3_ids[i] == device_id)
55 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
58 struct combination *combo;
61 * Older hardware can't scanout Y-tiled formats. Newer devices can, and
62 * report this functionality via format modifiers.
64 for (i = 0; i < drv->backend->combos.size; i++) {
65 combo = &drv->backend->combos.data[i];
66 if (combo->format == item->format) {
67 if ((combo->metadata.tiling == I915_TILING_Y &&
68 item->modifier == I915_FORMAT_MOD_Y_TILED) ||
69 (combo->metadata.tiling == I915_TILING_X &&
70 item->modifier == I915_FORMAT_MOD_X_TILED)) {
71 combo->metadata.modifier = item->modifier;
72 combo->usage |= item->usage;
73 } else if (combo->metadata.tiling != I915_TILING_Y) {
74 combo->usage |= item->usage;
82 static int i915_add_combinations(struct driver *drv)
85 uint32_t i, num_items;
86 struct kms_item *items;
87 struct format_metadata metadata;
88 uint64_t flags = BO_COMMON_USE_MASK;
90 metadata.tiling = I915_TILING_NONE;
91 metadata.priority = 1;
92 metadata.modifier = DRM_FORMAT_MOD_NONE;
94 ret = drv_add_combinations(drv, linear_only_formats,
95 ARRAY_SIZE(linear_only_formats), &metadata,
100 ret = drv_add_combinations(drv, tileable_formats,
101 ARRAY_SIZE(tileable_formats), &metadata,
106 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata,
107 BO_USE_CURSOR | BO_USE_SCANOUT);
108 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata,
109 BO_USE_CURSOR | BO_USE_SCANOUT);
111 flags &= ~BO_USE_SW_WRITE_OFTEN;
112 flags &= ~BO_USE_SW_READ_OFTEN;
113 flags &= ~BO_USE_LINEAR;
115 metadata.tiling = I915_TILING_X;
116 metadata.priority = 2;
118 ret = drv_add_combinations(drv, tileable_formats,
119 ARRAY_SIZE(tileable_formats), &metadata,
124 metadata.tiling = I915_TILING_Y;
125 metadata.priority = 3;
127 ret = drv_add_combinations(drv, tileable_formats,
128 ARRAY_SIZE(tileable_formats), &metadata,
133 items = drv_query_kms(drv, &num_items);
134 if (!items || !num_items)
137 for (i = 0; i < num_items; i++) {
138 ret = i915_add_kms_item(drv, &items[i]);
149 static void i915_align_dimensions(struct driver *drv, uint32_t tiling_mode,
150 uint32_t *width, uint32_t *height, int bpp)
152 struct i915_device *i915_dev = (struct i915_device *)drv->priv;
153 uint32_t width_alignment = 4, height_alignment = 4;
155 switch (tiling_mode) {
157 case I915_TILING_NONE:
158 width_alignment = 64 / bpp;
162 width_alignment = 512 / bpp;
163 height_alignment = 8;
167 if (i915_dev->gen == 3) {
168 width_alignment = 512 / bpp;
169 height_alignment = 8;
171 width_alignment = 128 / bpp;
172 height_alignment = 32;
177 if (i915_dev->gen > 3) {
178 *width = ALIGN(*width, width_alignment);
179 *height = ALIGN(*height, height_alignment);
182 for (w = width_alignment; w < *width; w <<= 1)
185 *height = ALIGN(*height, height_alignment);
189 static int i915_verify_dimensions(struct driver *drv, uint32_t stride,
192 struct i915_device *i915_dev = (struct i915_device *)drv->priv;
193 if (i915_dev->gen <= 3 && stride > 8192)
199 static int i915_init(struct driver *drv)
201 struct i915_device *i915_dev;
202 drm_i915_getparam_t get_param;
206 i915_dev = calloc(1, sizeof(*i915_dev));
210 memset(&get_param, 0, sizeof(get_param));
211 get_param.param = I915_PARAM_CHIPSET_ID;
212 get_param.value = &device_id;
213 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
215 fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
220 i915_dev->gen = get_gen(device_id);
223 i915_dev->mgr = drm_intel_bufmgr_gem_init(drv->fd, 16 * 1024);
224 if (!i915_dev->mgr) {
225 fprintf(stderr, "drv: drm_intel_bufmgr_gem_init failed\n");
230 drv->priv = i915_dev;
232 return i915_add_combinations(drv);
235 static void i915_close(struct driver *drv)
237 struct i915_device *i915_dev = drv->priv;
238 drm_intel_bufmgr_destroy(i915_dev->mgr);
243 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height,
244 uint32_t format, uint32_t flags)
249 uint32_t tiling_mode;
250 struct i915_bo *i915_bo;
252 int bpp = drv_stride_from_format(format, 1, 0);
253 struct i915_device *i915_dev = (struct i915_device *)bo->drv->priv;
255 if (flags & (BO_USE_CURSOR | BO_USE_LINEAR |
256 BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
257 tiling_mode = I915_TILING_NONE;
258 else if (flags & BO_USE_SCANOUT)
259 tiling_mode = I915_TILING_X;
261 tiling_mode = I915_TILING_Y;
264 * Align the Y plane to 128 bytes so the chroma planes would be aligned
265 * to 64 byte boundaries. This is an Intel HW requirement.
267 if (format == DRM_FORMAT_YVU420 ||
268 format == DRM_FORMAT_YVU420_ANDROID) {
269 width = ALIGN(width, 128);
270 tiling_mode = I915_TILING_NONE;
273 i915_align_dimensions(bo->drv, tiling_mode, &width, &height, bpp);
274 drv_bo_from_format(bo, width, height, format);
276 if (!i915_verify_dimensions(bo->drv, bo->strides[0], height))
279 snprintf(name, sizeof(name), "i915-buffer-%u", i915_dev->count);
282 i915_bo = calloc(1, sizeof(*i915_bo));
288 i915_bo->ibos[0] = drm_intel_bo_alloc(i915_dev->mgr, name,
290 if (!i915_bo->ibos[0]) {
291 fprintf(stderr, "drv: drm_intel_bo_alloc failed");
297 for (plane = 0; plane < bo->num_planes; plane++) {
299 drm_intel_bo_reference(i915_bo->ibos[0]);
301 bo->handles[plane].u32 = i915_bo->ibos[0]->handle;
302 i915_bo->ibos[plane] = i915_bo->ibos[0];
305 bo->tiling = tiling_mode;
307 ret = drm_intel_bo_set_tiling(i915_bo->ibos[0], &bo->tiling,
310 if (ret || bo->tiling != tiling_mode) {
311 fprintf(stderr, "drv: drm_intel_gem_bo_set_tiling failed "
312 "errno=%x, stride=%x\n", errno, bo->strides[0]);
313 /* Calls i915 bo destroy. */
314 bo->drv->backend->bo_destroy(bo);
321 static int i915_bo_destroy(struct bo *bo)
324 struct i915_bo *i915_bo = bo->priv;
326 for (plane = 0; plane < bo->num_planes; plane++)
327 drm_intel_bo_unreference(i915_bo->ibos[plane]);
335 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
339 struct i915_bo *i915_bo;
340 struct i915_device *i915_dev = bo->drv->priv;
342 i915_bo = calloc(1, sizeof(*i915_bo));
349 * When self-importing, libdrm_intel increments the reference count
350 * on the drm_intel_bo. It also returns the same drm_intel_bo per GEM
351 * handle. Thus, we don't need to increase the reference count
352 * (i.e, drv_increment_reference_count) when importing with this
355 for (plane = 0; plane < bo->num_planes; plane++) {
357 i915_bo->ibos[plane] = drm_intel_bo_gem_create_from_prime(i915_dev->mgr,
358 data->fds[plane], data->sizes[plane]);
360 if (!i915_bo->ibos[plane]) {
362 * Need to call GEM close on planes that were opened,
363 * if any. Adjust the num_planes variable to be the
364 * plane that failed, so GEM close will be called on
365 * planes before that plane.
367 bo->num_planes = plane;
369 fprintf(stderr, "drv: i915: failed to import failed");
373 bo->handles[plane].u32 = i915_bo->ibos[plane]->handle;
376 if (drm_intel_bo_get_tiling(i915_bo->ibos[0], &bo->tiling,
378 fprintf(stderr, "drv: drm_intel_bo_get_tiling failed");
386 static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
389 struct i915_bo *i915_bo = bo->priv;
391 if (bo->tiling == I915_TILING_NONE)
392 /* TODO(gsingh): use bo_map flags to determine if we should
395 ret = drm_intel_bo_map(i915_bo->ibos[0], 1);
397 ret = drm_intel_gem_bo_map_gtt(i915_bo->ibos[0]);
400 fprintf(stderr, "drv: i915_bo_map failed.");
404 return i915_bo->ibos[0]->virtual;
407 static int i915_bo_unmap(struct bo *bo, struct map_info *data)
410 struct i915_bo *i915_bo = bo->priv;
412 if (bo->tiling == I915_TILING_NONE)
413 ret = drm_intel_bo_unmap(i915_bo->ibos[0]);
415 ret = drm_intel_gem_bo_unmap_gtt(i915_bo->ibos[0]);
420 static uint32_t i915_resolve_format(uint32_t format)
423 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
424 /*HACK: See b/28671744 */
425 return DRM_FORMAT_XBGR8888;
426 case DRM_FORMAT_FLEX_YCbCr_420_888:
427 return DRM_FORMAT_YVU420_ANDROID;
433 struct backend backend_i915 =
438 .bo_create = i915_bo_create,
439 .bo_destroy = i915_bo_destroy,
440 .bo_import = i915_bo_import,
441 .bo_map = i915_bo_map,
442 .bo_unmap = i915_bo_unmap,
443 .resolve_format = i915_resolve_format,