i915.c

   1 /*
   2  * Copyright 2014 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6
   7 #ifdef DRV_I915
   8
   9 #include <errno.h>
  10 #include <i915_drm.h>
  11 #include <stdio.h>
  12 #include <string.h>
  13 #include <sys/mman.h>
  14 #include <xf86drm.h>
  15
  16 #include "drv_priv.h"
  17 #include "helpers.h"
  18 #include "util.h"
  19
  20 #define I915_CACHELINE_SIZE 64
  21 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
  22
  23 static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888,    DRM_FORMAT_ARGB1555,
  24                                                   DRM_FORMAT_ARGB8888,    DRM_FORMAT_RGB565,
  25                                                   DRM_FORMAT_XBGR2101010, DRM_FORMAT_XBGR8888,
  26                                                   DRM_FORMAT_XRGB1555,    DRM_FORMAT_XRGB2101010,
  27                                                   DRM_FORMAT_XRGB8888 };
  28
  29 static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
  30                                                             DRM_FORMAT_R8, DRM_FORMAT_UYVY,
  31                                                             DRM_FORMAT_YUYV };
  32
  33 static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
  34
  35 struct i915_device {
  36         uint32_t gen;
  37         int32_t has_llc;
  38 };
  39
  40 static uint32_t i915_get_gen(int device_id)
  41 {
  42         const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
  43                                       0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
  44         unsigned i;
  45         for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
  46                 if (gen3_ids[i] == device_id)
  47                         return 3;
  48
  49         return 4;
  50 }
  51
  52 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
  53 {
  54         uint32_t i;
  55         struct combination *combo;
  56
  57         /*
  58          * Older hardware can't scanout Y-tiled formats. Newer devices can, and
  59          * report this functionality via format modifiers.
  60          */
  61         for (i = 0; i < drv_array_size(drv->combos); i++) {
  62                 combo = (struct combination *)drv_array_at_idx(drv->combos, i);
  63                 if (combo->format != item->format)
  64                         continue;
  65
  66                 if (item->modifier == DRM_FORMAT_MOD_LINEAR &&
  67                     combo->metadata.tiling == I915_TILING_X) {
  68                         /*
  69                          * FIXME: drv_query_kms() does not report the available modifiers
  70                          * yet, but we know that all hardware can scanout from X-tiled
  71                          * buffers, so let's add this to our combinations, except for
  72                          * cursor, which must not be tiled.
  73                          */
  74                         combo->use_flags |= item->use_flags & ~BO_USE_CURSOR;
  75                 }
  76
  77                 if (combo->metadata.modifier == item->modifier)
  78                         combo->use_flags |= item->use_flags;
  79         }
  80
  81         return 0;
  82 }
  83
  84 static int i915_add_combinations(struct driver *drv)
  85 {
  86         int ret;
  87         uint32_t i;
  88         struct drv_array *kms_items;
  89         struct format_metadata metadata;
  90         uint64_t render_use_flags, texture_use_flags;
  91
  92         render_use_flags = BO_USE_RENDER_MASK;
  93         texture_use_flags = BO_USE_TEXTURE_MASK;
  94
  95         metadata.tiling = I915_TILING_NONE;
  96         metadata.priority = 1;
  97         metadata.modifier = DRM_FORMAT_MOD_LINEAR;
  98
  99         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 100                              &metadata, render_use_flags);
 101
 102         drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
 103                              &metadata, texture_use_flags);
 104
 105         drv_add_combinations(drv, tileable_texture_source_formats,
 106                              ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 107                              texture_use_flags);
 108
 109         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 110         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 111
 112         /* IPU3 camera ISP supports only NV12 output. */
 113         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
 114                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
 115         /*
 116          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
 117          * from camera.
 118          */
 119         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
 120                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
 121
 122         render_use_flags &= ~BO_USE_RENDERSCRIPT;
 123         render_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
 124         render_use_flags &= ~BO_USE_SW_READ_OFTEN;
 125         render_use_flags &= ~BO_USE_LINEAR;
 126
 127         texture_use_flags &= ~BO_USE_RENDERSCRIPT;
 128         texture_use_flags &= ~BO_USE_SW_WRITE_OFTEN;
 129         texture_use_flags &= ~BO_USE_SW_READ_OFTEN;
 130         texture_use_flags &= ~BO_USE_LINEAR;
 131
 132         metadata.tiling = I915_TILING_X;
 133         metadata.priority = 2;
 134         metadata.modifier = I915_FORMAT_MOD_X_TILED;
 135
 136         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 137                              &metadata, render_use_flags);
 138
 139         drv_add_combinations(drv, tileable_texture_source_formats,
 140                              ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 141                              texture_use_flags);
 142
 143         metadata.tiling = I915_TILING_Y;
 144         metadata.priority = 3;
 145         metadata.modifier = I915_FORMAT_MOD_Y_TILED;
 146
 147         drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 148                              &metadata, render_use_flags);
 149
 150         drv_add_combinations(drv, tileable_texture_source_formats,
 151                              ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 152                              texture_use_flags);
 153
 154         kms_items = drv_query_kms(drv);
 155         if (!kms_items)
 156                 return 0;
 157
 158         for (i = 0; i < drv_array_size(kms_items); i++) {
 159                 ret = i915_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i));
 160                 if (ret) {
 161                         drv_array_destroy(kms_items);
 162                         return ret;
 163                 }
 164         }
 165
 166         drv_array_destroy(kms_items);
 167         return 0;
 168 }
 169
 170 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
 171                                  uint32_t *aligned_height)
 172 {
 173         struct i915_device *i915 = bo->drv->priv;
 174         uint32_t horizontal_alignment = 4;
 175         uint32_t vertical_alignment = 4;
 176
 177         switch (tiling) {
 178         default:
 179         case I915_TILING_NONE:
 180                 horizontal_alignment = 64;
 181                 break;
 182
 183         case I915_TILING_X:
 184                 horizontal_alignment = 512;
 185                 vertical_alignment = 8;
 186                 break;
 187
 188         case I915_TILING_Y:
 189                 if (i915->gen == 3) {
 190                         horizontal_alignment = 512;
 191                         vertical_alignment = 8;
 192                 } else {
 193                         horizontal_alignment = 128;
 194                         vertical_alignment = 32;
 195                 }
 196                 break;
 197         }
 198
 199         /*
 200          * The alignment calculated above is based on the full size luma plane and to have chroma
 201          * planes properly aligned with subsampled formats, we need to multiply luma alignment by
 202          * subsampling factor.
 203          */
 204         switch (bo->format) {
 205         case DRM_FORMAT_YVU420_ANDROID:
 206         case DRM_FORMAT_YVU420:
 207                 horizontal_alignment *= 2;
 208         /* Fall through */
 209         case DRM_FORMAT_NV12:
 210                 vertical_alignment *= 2;
 211                 break;
 212         }
 213
 214         *aligned_height = ALIGN(bo->height, vertical_alignment);
 215         if (i915->gen > 3) {
 216                 *stride = ALIGN(*stride, horizontal_alignment);
 217         } else {
 218                 while (*stride > horizontal_alignment)
 219                         horizontal_alignment <<= 1;
 220
 221                 *stride = horizontal_alignment;
 222         }
 223
 224         if (i915->gen <= 3 && *stride > 8192)
 225                 return -EINVAL;
 226
 227         return 0;
 228 }
 229
 230 static void i915_clflush(void *start, size_t size)
 231 {
 232         void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
 233         void *end = (void *)((uintptr_t)start + size);
 234
 235         __builtin_ia32_mfence();
 236         while (p < end) {
 237                 __builtin_ia32_clflush(p);
 238                 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
 239         }
 240 }
 241
 242 static int i915_init(struct driver *drv)
 243 {
 244         int ret;
 245         int device_id;
 246         struct i915_device *i915;
 247         drm_i915_getparam_t get_param;
 248
 249         i915 = calloc(1, sizeof(*i915));
 250         if (!i915)
 251                 return -ENOMEM;
 252
 253         memset(&get_param, 0, sizeof(get_param));
 254         get_param.param = I915_PARAM_CHIPSET_ID;
 255         get_param.value = &device_id;
 256         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
 257         if (ret) {
 258                 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
 259                 free(i915);
 260                 return -EINVAL;
 261         }
 262
 263         i915->gen = i915_get_gen(device_id);
 264
 265         memset(&get_param, 0, sizeof(get_param));
 266         get_param.param = I915_PARAM_HAS_LLC;
 267         get_param.value = &i915->has_llc;
 268         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
 269         if (ret) {
 270                 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
 271                 free(i915);
 272                 return -EINVAL;
 273         }
 274
 275         drv->priv = i915;
 276
 277         return i915_add_combinations(drv);
 278 }
 279
 280 static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height,
 281                                        uint32_t format, uint64_t modifier)
 282 {
 283         int ret;
 284         size_t plane;
 285         uint32_t stride;
 286         struct drm_i915_gem_create gem_create;
 287         struct drm_i915_gem_set_tiling gem_set_tiling;
 288
 289         switch (modifier) {
 290         case DRM_FORMAT_MOD_LINEAR:
 291                 bo->tiling = I915_TILING_NONE;
 292                 break;
 293         case I915_FORMAT_MOD_X_TILED:
 294                 bo->tiling = I915_TILING_X;
 295                 break;
 296         case I915_FORMAT_MOD_Y_TILED:
 297                 bo->tiling = I915_TILING_Y;
 298                 break;
 299         }
 300
 301         stride = drv_stride_from_format(format, width, 0);
 302
 303         ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
 304         if (ret)
 305                 return ret;
 306
 307         /*
 308          * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep
 309          * total size as with aligned height to ensure enough padding space after each plane to
 310          * satisfy GPU alignment requirements.
 311          *
 312          * We do it by first calling drv_bo_from_format() with aligned height and
 313          * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates
 314          * and then calling it again with requested parameters.
 315          *
 316          * This relies on the fact that i965 driver uses separate surfaces for each plane and
 317          * contents of padding bytes is not affected, as it is only used to satisfy GPU cache
 318          * requests.
 319          *
 320          * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside
 321          * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8.
 322          */
 323         if (format == DRM_FORMAT_YVU420_ANDROID) {
 324                 uint32_t unaligned_height = bo->height;
 325                 size_t total_size;
 326
 327                 drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420);
 328                 total_size = bo->total_size;
 329                 drv_bo_from_format(bo, stride, unaligned_height, format);
 330                 bo->total_size = total_size;
 331         } else {
 332                 drv_bo_from_format(bo, stride, height, format);
 333         }
 334
 335         /*
 336          * Quoting Mesa ISL library:
 337          *
 338          *    - For linear surfaces, additional padding of 64 bytes is required at
 339          *      the bottom of the surface. This is in addition to the padding
 340          *      required above.
 341          */
 342         if (bo->tiling == I915_TILING_NONE)
 343                 bo->total_size += 64;
 344
 345         memset(&gem_create, 0, sizeof(gem_create));
 346         gem_create.size = bo->total_size;
 347
 348         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
 349         if (ret) {
 350                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
 351                         gem_create.size);
 352                 return ret;
 353         }
 354
 355         for (plane = 0; plane < bo->num_planes; plane++)
 356                 bo->handles[plane].u32 = gem_create.handle;
 357
 358         memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
 359         gem_set_tiling.handle = bo->handles[0].u32;
 360         gem_set_tiling.tiling_mode = bo->tiling;
 361         gem_set_tiling.stride = bo->strides[0];
 362
 363         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
 364         if (ret) {
 365                 struct drm_gem_close gem_close;
 366                 memset(&gem_close, 0, sizeof(gem_close));
 367                 gem_close.handle = bo->handles[0].u32;
 368                 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
 369
 370                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
 371                 return -errno;
 372         }
 373
 374         return 0;
 375 }
 376
 377 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 378                           uint64_t use_flags)
 379 {
 380         struct combination *combo;
 381
 382         combo = drv_get_combination(bo->drv, format, use_flags);
 383         if (!combo)
 384                 return -EINVAL;
 385
 386         return i915_bo_create_for_modifier(bo, width, height, format, combo->metadata.modifier);
 387 }
 388
 389 static int i915_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
 390                                          uint32_t format, const uint64_t *modifiers, uint32_t count)
 391 {
 392         static const uint64_t modifier_order[] = {
 393                 I915_FORMAT_MOD_Y_TILED,
 394                 I915_FORMAT_MOD_X_TILED,
 395                 DRM_FORMAT_MOD_LINEAR,
 396         };
 397         uint64_t modifier;
 398
 399         modifier = drv_pick_modifier(modifiers, count, modifier_order, ARRAY_SIZE(modifier_order));
 400
 401         bo->format_modifiers[0] = modifier;
 402
 403         return i915_bo_create_for_modifier(bo, width, height, format, modifier);
 404 }
 405
 406 static void i915_close(struct driver *drv)
 407 {
 408         free(drv->priv);
 409         drv->priv = NULL;
 410 }
 411
 412 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
 413 {
 414         int ret;
 415         struct drm_i915_gem_get_tiling gem_get_tiling;
 416
 417         ret = drv_prime_bo_import(bo, data);
 418         if (ret)
 419                 return ret;
 420
 421         /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
 422         memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
 423         gem_get_tiling.handle = bo->handles[0].u32;
 424
 425         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
 426         if (ret) {
 427                 drv_gem_bo_destroy(bo);
 428                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
 429                 return ret;
 430         }
 431
 432         bo->tiling = gem_get_tiling.tiling_mode;
 433         return 0;
 434 }
 435
 436 static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
 437 {
 438         int ret;
 439         void *addr;
 440
 441         if (bo->tiling == I915_TILING_NONE) {
 442                 struct drm_i915_gem_mmap gem_map;
 443                 memset(&gem_map, 0, sizeof(gem_map));
 444
 445                 if ((bo->use_flags & BO_USE_SCANOUT) && !(bo->use_flags & BO_USE_RENDERSCRIPT))
 446                         gem_map.flags = I915_MMAP_WC;
 447
 448                 gem_map.handle = bo->handles[0].u32;
 449                 gem_map.offset = 0;
 450                 gem_map.size = bo->total_size;
 451
 452                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
 453                 if (ret) {
 454                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
 455                         return MAP_FAILED;
 456                 }
 457
 458                 addr = (void *)(uintptr_t)gem_map.addr_ptr;
 459         } else {
 460                 struct drm_i915_gem_mmap_gtt gem_map;
 461                 memset(&gem_map, 0, sizeof(gem_map));
 462
 463                 gem_map.handle = bo->handles[0].u32;
 464
 465                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
 466                 if (ret) {
 467                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
 468                         return MAP_FAILED;
 469                 }
 470
 471                 addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
 472                             gem_map.offset);
 473         }
 474
 475         if (addr == MAP_FAILED) {
 476                 fprintf(stderr, "drv: i915 GEM mmap failed\n");
 477                 return addr;
 478         }
 479
 480         vma->length = bo->total_size;
 481         return addr;
 482 }
 483
 484 static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
 485 {
 486         int ret;
 487         struct drm_i915_gem_set_domain set_domain;
 488
 489         memset(&set_domain, 0, sizeof(set_domain));
 490         set_domain.handle = bo->handles[0].u32;
 491         if (bo->tiling == I915_TILING_NONE) {
 492                 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
 493                 if (mapping->vma->map_flags & BO_MAP_WRITE)
 494                         set_domain.write_domain = I915_GEM_DOMAIN_CPU;
 495         } else {
 496                 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
 497                 if (mapping->vma->map_flags & BO_MAP_WRITE)
 498                         set_domain.write_domain = I915_GEM_DOMAIN_GTT;
 499         }
 500
 501         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
 502         if (ret) {
 503                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret);
 504                 return ret;
 505         }
 506
 507         return 0;
 508 }
 509
 510 static int i915_bo_flush(struct bo *bo, struct mapping *mapping)
 511 {
 512         struct i915_device *i915 = bo->drv->priv;
 513         if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
 514                 i915_clflush(mapping->vma->addr, mapping->vma->length);
 515
 516         return 0;
 517 }
 518
 519 static uint32_t i915_resolve_format(uint32_t format, uint64_t use_flags)
 520 {
 521         switch (format) {
 522         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 523                 /* KBL camera subsystem requires NV12. */
 524                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 525                         return DRM_FORMAT_NV12;
 526                 /*HACK: See b/28671744 */
 527                 return DRM_FORMAT_XBGR8888;
 528         case DRM_FORMAT_FLEX_YCbCr_420_888:
 529                 /* KBL camera subsystem requires NV12. */
 530                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 531                         return DRM_FORMAT_NV12;
 532                 return DRM_FORMAT_YVU420;
 533         default:
 534                 return format;
 535         }
 536 }
 537
 538 const struct backend backend_i915 = {
 539         .name = "i915",
 540         .init = i915_init,
 541         .close = i915_close,
 542         .bo_create = i915_bo_create,
 543         .bo_create_with_modifiers = i915_bo_create_with_modifiers,
 544         .bo_destroy = drv_gem_bo_destroy,
 545         .bo_import = i915_bo_import,
 546         .bo_map = i915_bo_map,
 547         .bo_unmap = drv_bo_munmap,
 548         .bo_invalidate = i915_bo_invalidate,
 549         .bo_flush = i915_bo_flush,
 550         .resolve_format = i915_resolve_format,
 551 };
 552
 553 #endif