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minigbm: cros_gralloc: support GRALLOC_MODULE_API_VERSION_0_3
[android-x86/external-minigbm.git] / i915.c
1 /*
2  * Copyright 2014 The Chromium OS Authors. All rights reserved.
3  * Use of this source code is governed by a BSD-style license that can be
4  * found in the LICENSE file.
5  */
6
7 #ifdef DRV_I915
8
9 #include <errno.h>
10 #include <i915_drm.h>
11 #include <stdio.h>
12 #include <string.h>
13 #include <sys/mman.h>
14 #include <xf86drm.h>
15
16 #include "drv_priv.h"
17 #include "helpers.h"
18 #include "util.h"
19
20 #define I915_CACHELINE_SIZE 64
21 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
22
23 static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
24                                                   DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
25                                                   DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
26                                                   DRM_FORMAT_XRGB8888 };
27
28 static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
29                                                             DRM_FORMAT_R8, DRM_FORMAT_UYVY,
30                                                             DRM_FORMAT_YUYV };
31
32 static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
33
34 struct i915_device {
35         uint32_t gen;
36         int32_t has_llc;
37 };
38
39 static uint32_t i915_get_gen(int device_id)
40 {
41         const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
42                                       0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
43         unsigned i;
44         for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
45                 if (gen3_ids[i] == device_id)
46                         return 3;
47
48         return 4;
49 }
50
51 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
52 {
53         uint32_t i;
54         struct combination *combo;
55
56         /*
57          * Older hardware can't scanout Y-tiled formats. Newer devices can, and
58          * report this functionality via format modifiers.
59          */
60         for (i = 0; i < drv->backend->combos.size; i++) {
61                 combo = &drv->backend->combos.data[i];
62                 if (combo->format != item->format)
63                         continue;
64
65                 if (item->modifier == DRM_FORMAT_MOD_NONE &&
66                     combo->metadata.tiling == I915_TILING_X) {
67                         /*
68                          * FIXME: drv_query_kms() does not report the available modifiers
69                          * yet, but we know that all hardware can scanout from X-tiled
70                          * buffers, so let's add this to our combinations, except for
71                          * cursor, which must not be tiled.
72                          */
73                         combo->usage |= item->usage & ~BO_USE_CURSOR;
74                 }
75
76                 if (combo->metadata.modifier == item->modifier)
77                         combo->usage |= item->usage;
78         }
79
80         return 0;
81 }
82
83 static int i915_add_combinations(struct driver *drv)
84 {
85         int ret;
86         uint32_t i, num_items;
87         struct kms_item *items;
88         struct format_metadata metadata;
89         uint64_t render_flags, texture_flags;
90
91         render_flags = BO_USE_RENDER_MASK;
92         texture_flags = BO_USE_TEXTURE_MASK;
93
94         metadata.tiling = I915_TILING_NONE;
95         metadata.priority = 1;
96         metadata.modifier = DRM_FORMAT_MOD_NONE;
97
98         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
99                                    &metadata, render_flags);
100         if (ret)
101                 return ret;
102
103         ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
104                                    &metadata, texture_flags);
105         if (ret)
106                 return ret;
107
108         ret = drv_add_combinations(drv, tileable_texture_source_formats,
109                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
110                                    texture_flags);
111         if (ret)
112                 return ret;
113
114         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
115         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
116
117         /* IPU3 camera ISP supports only NV12 output. */
118         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
119                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
120         /*
121          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
122          * from camera.
123          */
124         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
125                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
126
127         render_flags &= ~BO_USE_SW_WRITE_OFTEN;
128         render_flags &= ~BO_USE_SW_READ_OFTEN;
129         render_flags &= ~BO_USE_LINEAR;
130
131         texture_flags &= ~BO_USE_SW_WRITE_OFTEN;
132         texture_flags &= ~BO_USE_SW_READ_OFTEN;
133         texture_flags &= ~BO_USE_LINEAR;
134
135         metadata.tiling = I915_TILING_X;
136         metadata.priority = 2;
137         metadata.modifier = I915_FORMAT_MOD_X_TILED;
138
139         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
140                                    &metadata, render_flags);
141         if (ret)
142                 return ret;
143
144         ret = drv_add_combinations(drv, tileable_texture_source_formats,
145                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
146                                    texture_flags);
147         if (ret)
148                 return ret;
149
150         metadata.tiling = I915_TILING_Y;
151         metadata.priority = 3;
152         metadata.modifier = I915_FORMAT_MOD_Y_TILED;
153
154         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
155                                    &metadata, render_flags);
156         if (ret)
157                 return ret;
158
159         ret = drv_add_combinations(drv, tileable_texture_source_formats,
160                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
161                                    texture_flags);
162         if (ret)
163                 return ret;
164
165         items = drv_query_kms(drv, &num_items);
166         if (!items || !num_items)
167                 return 0;
168
169         for (i = 0; i < num_items; i++) {
170                 ret = i915_add_kms_item(drv, &items[i]);
171                 if (ret) {
172                         free(items);
173                         return ret;
174                 }
175         }
176
177         free(items);
178         return 0;
179 }
180
181 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
182                                  uint32_t *aligned_height)
183 {
184         struct i915_device *i915 = bo->drv->priv;
185         uint32_t horizontal_alignment = 4;
186         uint32_t vertical_alignment = 4;
187
188         switch (tiling) {
189         default:
190         case I915_TILING_NONE:
191                 horizontal_alignment = 64;
192                 break;
193
194         case I915_TILING_X:
195                 horizontal_alignment = 512;
196                 vertical_alignment = 8;
197                 break;
198
199         case I915_TILING_Y:
200                 if (i915->gen == 3) {
201                         horizontal_alignment = 512;
202                         vertical_alignment = 8;
203                 } else {
204                         horizontal_alignment = 128;
205                         vertical_alignment = 32;
206                 }
207                 break;
208         }
209
210         *aligned_height = ALIGN(bo->height, vertical_alignment);
211         if (i915->gen > 3) {
212                 *stride = ALIGN(*stride, horizontal_alignment);
213         } else {
214                 while (*stride > horizontal_alignment)
215                         horizontal_alignment <<= 1;
216
217                 *stride = horizontal_alignment;
218         }
219
220         if (i915->gen <= 3 && *stride > 8192)
221                 return -EINVAL;
222
223         return 0;
224 }
225
226 static void i915_clflush(void *start, size_t size)
227 {
228         void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
229         void *end = (void *)((uintptr_t)start + size);
230
231         __builtin_ia32_mfence();
232         while (p < end) {
233                 __builtin_ia32_clflush(p);
234                 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
235         }
236 }
237
238 static int i915_init(struct driver *drv)
239 {
240         int ret;
241         int device_id;
242         struct i915_device *i915;
243         drm_i915_getparam_t get_param;
244
245         i915 = calloc(1, sizeof(*i915));
246         if (!i915)
247                 return -ENOMEM;
248
249         memset(&get_param, 0, sizeof(get_param));
250         get_param.param = I915_PARAM_CHIPSET_ID;
251         get_param.value = &device_id;
252         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
253         if (ret) {
254                 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
255                 free(i915);
256                 return -EINVAL;
257         }
258
259         i915->gen = i915_get_gen(device_id);
260
261         memset(&get_param, 0, sizeof(get_param));
262         get_param.param = I915_PARAM_HAS_LLC;
263         get_param.value = &i915->has_llc;
264         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
265         if (ret) {
266                 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
267                 free(i915);
268                 return -EINVAL;
269         }
270
271         drv->priv = i915;
272
273         return i915_add_combinations(drv);
274 }
275
276 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
277                           uint32_t flags)
278 {
279         int ret;
280         size_t plane;
281         uint32_t stride;
282         struct drm_i915_gem_create gem_create;
283         struct drm_i915_gem_set_tiling gem_set_tiling;
284         struct combination *combo;
285
286         combo = drv_get_combination(bo->drv, format, flags);
287         if (!combo)
288                 return -EINVAL;
289
290         bo->tiling = combo->metadata.tiling;
291
292         stride = drv_stride_from_format(format, width, 0);
293
294         ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
295         if (ret)
296                 return ret;
297
298         /*
299          * Align the Y plane to 128 bytes so the chroma planes would be aligned
300          * to 64 byte boundaries. This is an Intel HW requirement.
301          */
302         if (format == DRM_FORMAT_YVU420)
303                 stride = ALIGN(stride, 128);
304
305         /*
306          * HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned.
307          */
308         if (format == DRM_FORMAT_YVU420_ANDROID)
309                 height = bo->height;
310
311         drv_bo_from_format(bo, stride, height, format);
312
313         /*
314          * Quoting Mesa ISL library:
315          *
316          *    - For linear surfaces, additional padding of 64 bytes is required at
317          *      the bottom of the surface. This is in addition to the padding
318          *      required above.
319          */
320         if (bo->tiling == I915_TILING_NONE)
321                 bo->total_size += 64;
322
323         memset(&gem_create, 0, sizeof(gem_create));
324         gem_create.size = bo->total_size;
325
326         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
327         if (ret) {
328                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
329                         gem_create.size);
330                 return ret;
331         }
332
333         for (plane = 0; plane < bo->num_planes; plane++)
334                 bo->handles[plane].u32 = gem_create.handle;
335
336         memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
337         gem_set_tiling.handle = bo->handles[0].u32;
338         gem_set_tiling.tiling_mode = bo->tiling;
339         gem_set_tiling.stride = bo->strides[0];
340
341         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
342         if (ret) {
343                 struct drm_gem_close gem_close;
344                 memset(&gem_close, 0, sizeof(gem_close));
345                 gem_close.handle = bo->handles[0].u32;
346                 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
347
348                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
349                 return -errno;
350         }
351
352         return 0;
353 }
354
355 static void i915_close(struct driver *drv)
356 {
357         free(drv->priv);
358         drv->priv = NULL;
359 }
360
361 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
362 {
363         int ret;
364         struct drm_i915_gem_get_tiling gem_get_tiling;
365
366         ret = drv_prime_bo_import(bo, data);
367         if (ret)
368                 return ret;
369
370         /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
371         memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
372         gem_get_tiling.handle = bo->handles[0].u32;
373
374         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
375         if (ret) {
376                 drv_gem_bo_destroy(bo);
377                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
378                 return ret;
379         }
380
381         bo->tiling = gem_get_tiling.tiling_mode;
382         return 0;
383 }
384
385 static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, int prot)
386 {
387         int ret;
388         void *addr;
389         struct drm_i915_gem_set_domain set_domain;
390
391         memset(&set_domain, 0, sizeof(set_domain));
392         set_domain.handle = bo->handles[0].u32;
393         if (bo->tiling == I915_TILING_NONE) {
394                 struct drm_i915_gem_mmap gem_map;
395                 memset(&gem_map, 0, sizeof(gem_map));
396
397                 gem_map.handle = bo->handles[0].u32;
398                 gem_map.offset = 0;
399                 gem_map.size = bo->total_size;
400
401                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
402                 if (ret) {
403                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
404                         return MAP_FAILED;
405                 }
406
407                 addr = (void *)(uintptr_t)gem_map.addr_ptr;
408                 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
409                 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
410
411         } else {
412                 struct drm_i915_gem_mmap_gtt gem_map;
413                 memset(&gem_map, 0, sizeof(gem_map));
414
415                 gem_map.handle = bo->handles[0].u32;
416
417                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
418                 if (ret) {
419                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
420                         return MAP_FAILED;
421                 }
422
423                 addr = mmap(0, bo->total_size, prot, MAP_SHARED, bo->drv->fd, gem_map.offset);
424                 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
425                 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
426         }
427
428         if (addr == MAP_FAILED) {
429                 fprintf(stderr, "drv: i915 GEM mmap failed\n");
430                 return addr;
431         }
432
433         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
434         if (ret) {
435                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
436                 return MAP_FAILED;
437         }
438
439         data->length = bo->total_size;
440         return addr;
441 }
442
443 static int i915_bo_unmap(struct bo *bo, struct map_info *data)
444 {
445         struct i915_device *i915 = bo->drv->priv;
446         if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
447                 i915_clflush(data->addr, data->length);
448
449         return munmap(data->addr, data->length);
450 }
451
452 static uint32_t i915_resolve_format(uint32_t format, uint64_t usage)
453 {
454         switch (format) {
455         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
456                 /* KBL camera subsystem requires NV12. */
457                 if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
458                         return DRM_FORMAT_NV12;
459                 /*HACK: See b/28671744 */
460                 return DRM_FORMAT_XBGR8888;
461         case DRM_FORMAT_FLEX_YCbCr_420_888:
462                 /* KBL camera subsystem requires NV12. */
463                 if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
464                         return DRM_FORMAT_NV12;
465                 return DRM_FORMAT_YVU420;
466         default:
467                 return format;
468         }
469 }
470
471 struct backend backend_i915 = {
472         .name = "i915",
473         .init = i915_init,
474         .close = i915_close,
475         .bo_create = i915_bo_create,
476         .bo_destroy = drv_gem_bo_destroy,
477         .bo_import = i915_bo_import,
478         .bo_map = i915_bo_map,
479         .bo_unmap = i915_bo_unmap,
480         .resolve_format = i915_resolve_format,
481 };
482
483 #endif