i915.c

   1 /*
   2  * Copyright 2014 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6
   7 #ifdef DRV_I915
   8
   9 #include <errno.h>
  10 #include <i915_drm.h>
  11 #include <stdio.h>
  12 #include <string.h>
  13 #include <sys/mman.h>
  14 #include <xf86drm.h>
  15
  16 #include "drv_priv.h"
  17 #include "helpers.h"
  18 #include "util.h"
  19
  20 #define I915_CACHELINE_SIZE 64
  21 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
  22
  23 static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
  24                                                   DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
  25                                                   DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
  26                                                   DRM_FORMAT_XRGB8888 };
  27
  28 static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
  29                                                             DRM_FORMAT_R8, DRM_FORMAT_UYVY,
  30                                                             DRM_FORMAT_YUYV };
  31
  32 static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
  33
  34 struct i915_device {
  35         uint32_t gen;
  36         int32_t has_llc;
  37 };
  38
  39 static uint32_t i915_get_gen(int device_id)
  40 {
  41         const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
  42                                       0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
  43         unsigned i;
  44         for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
  45                 if (gen3_ids[i] == device_id)
  46                         return 3;
  47
  48         return 4;
  49 }
  50
  51 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
  52 {
  53         uint32_t i;
  54         struct combination *combo;
  55
  56         /*
  57          * Older hardware can't scanout Y-tiled formats. Newer devices can, and
  58          * report this functionality via format modifiers.
  59          */
  60         for (i = 0; i < drv->backend->combos.size; i++) {
  61                 combo = &drv->backend->combos.data[i];
  62                 if (combo->format != item->format)
  63                         continue;
  64
  65                 if (item->modifier == DRM_FORMAT_MOD_NONE &&
  66                     combo->metadata.tiling == I915_TILING_X) {
  67                         /*
  68                          * FIXME: drv_query_kms() does not report the available modifiers
  69                          * yet, but we know that all hardware can scanout from X-tiled
  70                          * buffers, so let's add this to our combinations, except for
  71                          * cursor, which must not be tiled.
  72                          */
  73                         combo->usage |= item->usage & ~BO_USE_CURSOR;
  74                 }
  75
  76                 if (combo->metadata.modifier == item->modifier)
  77                         combo->usage |= item->usage;
  78         }
  79
  80         return 0;
  81 }
  82
  83 static int i915_add_combinations(struct driver *drv)
  84 {
  85         int ret;
  86         uint32_t i, num_items;
  87         struct kms_item *items;
  88         struct format_metadata metadata;
  89         uint64_t render_flags, texture_flags;
  90
  91         render_flags = BO_USE_RENDER_MASK;
  92         texture_flags = BO_USE_TEXTURE_MASK;
  93
  94         metadata.tiling = I915_TILING_NONE;
  95         metadata.priority = 1;
  96         metadata.modifier = DRM_FORMAT_MOD_NONE;
  97
  98         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
  99                                    &metadata, render_flags);
 100         if (ret)
 101                 return ret;
 102
 103         ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
 104                                    &metadata, texture_flags);
 105         if (ret)
 106                 return ret;
 107
 108         ret = drv_add_combinations(drv, tileable_texture_source_formats,
 109                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 110                                    texture_flags);
 111         if (ret)
 112                 return ret;
 113
 114         drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 115         drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
 116
 117         /* IPU3 camera ISP supports only NV12 output. */
 118         drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
 119                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
 120         /*
 121          * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
 122          * from camera.
 123          */
 124         drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
 125                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
 126
 127         render_flags &= ~BO_USE_RENDERSCRIPT;
 128         render_flags &= ~BO_USE_SW_WRITE_OFTEN;
 129         render_flags &= ~BO_USE_SW_READ_OFTEN;
 130         render_flags &= ~BO_USE_LINEAR;
 131
 132         texture_flags &= ~BO_USE_RENDERSCRIPT;
 133         texture_flags &= ~BO_USE_SW_WRITE_OFTEN;
 134         texture_flags &= ~BO_USE_SW_READ_OFTEN;
 135         texture_flags &= ~BO_USE_LINEAR;
 136
 137         metadata.tiling = I915_TILING_X;
 138         metadata.priority = 2;
 139         metadata.modifier = I915_FORMAT_MOD_X_TILED;
 140
 141         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 142                                    &metadata, render_flags);
 143         if (ret)
 144                 return ret;
 145
 146         ret = drv_add_combinations(drv, tileable_texture_source_formats,
 147                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 148                                    texture_flags);
 149         if (ret)
 150                 return ret;
 151
 152         metadata.tiling = I915_TILING_Y;
 153         metadata.priority = 3;
 154         metadata.modifier = I915_FORMAT_MOD_Y_TILED;
 155
 156         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
 157                                    &metadata, render_flags);
 158         if (ret)
 159                 return ret;
 160
 161         ret = drv_add_combinations(drv, tileable_texture_source_formats,
 162                                    ARRAY_SIZE(tileable_texture_source_formats), &metadata,
 163                                    texture_flags);
 164         if (ret)
 165                 return ret;
 166
 167         items = drv_query_kms(drv, &num_items);
 168         if (!items || !num_items)
 169                 return 0;
 170
 171         for (i = 0; i < num_items; i++) {
 172                 ret = i915_add_kms_item(drv, &items[i]);
 173                 if (ret) {
 174                         free(items);
 175                         return ret;
 176                 }
 177         }
 178
 179         free(items);
 180         return 0;
 181 }
 182
 183 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
 184                                  uint32_t *aligned_height)
 185 {
 186         struct i915_device *i915 = bo->drv->priv;
 187         uint32_t horizontal_alignment = 4;
 188         uint32_t vertical_alignment = 4;
 189
 190         switch (tiling) {
 191         default:
 192         case I915_TILING_NONE:
 193                 horizontal_alignment = 64;
 194                 break;
 195
 196         case I915_TILING_X:
 197                 horizontal_alignment = 512;
 198                 vertical_alignment = 8;
 199                 break;
 200
 201         case I915_TILING_Y:
 202                 if (i915->gen == 3) {
 203                         horizontal_alignment = 512;
 204                         vertical_alignment = 8;
 205                 } else {
 206                         horizontal_alignment = 128;
 207                         vertical_alignment = 32;
 208                 }
 209                 break;
 210         }
 211
 212         /*
 213          * The alignment calculated above is based on the full size luma plane and to have chroma
 214          * planes properly aligned with subsampled formats, we need to multiply luma alignment by
 215          * subsampling factor.
 216          */
 217         switch (bo->format) {
 218         case DRM_FORMAT_YVU420_ANDROID:
 219         case DRM_FORMAT_YVU420:
 220                 horizontal_alignment *= 2;
 221                 /* Fall through */
 222         case DRM_FORMAT_NV12:
 223                 vertical_alignment *= 2;
 224                 break;
 225         }
 226
 227         *aligned_height = ALIGN(bo->height, vertical_alignment);
 228         if (i915->gen > 3) {
 229                 *stride = ALIGN(*stride, horizontal_alignment);
 230         } else {
 231                 while (*stride > horizontal_alignment)
 232                         horizontal_alignment <<= 1;
 233
 234                 *stride = horizontal_alignment;
 235         }
 236
 237         if (i915->gen <= 3 && *stride > 8192)
 238                 return -EINVAL;
 239
 240         return 0;
 241 }
 242
 243 static void i915_clflush(void *start, size_t size)
 244 {
 245         void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
 246         void *end = (void *)((uintptr_t)start + size);
 247
 248         __builtin_ia32_mfence();
 249         while (p < end) {
 250                 __builtin_ia32_clflush(p);
 251                 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
 252         }
 253 }
 254
 255 static int i915_init(struct driver *drv)
 256 {
 257         int ret;
 258         int device_id;
 259         struct i915_device *i915;
 260         drm_i915_getparam_t get_param;
 261
 262         i915 = calloc(1, sizeof(*i915));
 263         if (!i915)
 264                 return -ENOMEM;
 265
 266         memset(&get_param, 0, sizeof(get_param));
 267         get_param.param = I915_PARAM_CHIPSET_ID;
 268         get_param.value = &device_id;
 269         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
 270         if (ret) {
 271                 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
 272                 free(i915);
 273                 return -EINVAL;
 274         }
 275
 276         i915->gen = i915_get_gen(device_id);
 277
 278         memset(&get_param, 0, sizeof(get_param));
 279         get_param.param = I915_PARAM_HAS_LLC;
 280         get_param.value = &i915->has_llc;
 281         ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
 282         if (ret) {
 283                 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
 284                 free(i915);
 285                 return -EINVAL;
 286         }
 287
 288         drv->priv = i915;
 289
 290         return i915_add_combinations(drv);
 291 }
 292
 293 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 294                           uint32_t flags)
 295 {
 296         int ret;
 297         size_t plane;
 298         uint32_t stride;
 299         struct drm_i915_gem_create gem_create;
 300         struct drm_i915_gem_set_tiling gem_set_tiling;
 301         struct combination *combo;
 302
 303         combo = drv_get_combination(bo->drv, format, flags);
 304         if (!combo)
 305                 return -EINVAL;
 306
 307         bo->tiling = combo->metadata.tiling;
 308
 309         stride = drv_stride_from_format(format, width, 0);
 310
 311         ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
 312         if (ret)
 313                 return ret;
 314
 315         /*
 316          * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep
 317          * total size as with aligned height to ensure enough padding space after each plane to
 318          * satisfy GPU alignment requirements.
 319          *
 320          * We do it by first calling drv_bo_from_format() with aligned height and
 321          * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates
 322          * and then calling it again with requested parameters.
 323          *
 324          * This relies on the fact that i965 driver uses separate surfaces for each plane and
 325          * contents of padding bytes is not affected, as it is only used to satisfy GPU cache
 326          * requests.
 327          *
 328          * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside
 329          * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8.
 330          */
 331         if (format == DRM_FORMAT_YVU420_ANDROID) {
 332                 uint32_t unaligned_height = bo->height;
 333                 size_t total_size;
 334
 335                 drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420);
 336                 total_size = bo->total_size;
 337                 drv_bo_from_format(bo, stride, unaligned_height, format);
 338                 bo->total_size = total_size;
 339         } else {
 340                 drv_bo_from_format(bo, stride, height, format);
 341         }
 342
 343         /*
 344          * Quoting Mesa ISL library:
 345          *
 346          *    - For linear surfaces, additional padding of 64 bytes is required at
 347          *      the bottom of the surface. This is in addition to the padding
 348          *      required above.
 349          */
 350         if (bo->tiling == I915_TILING_NONE)
 351                 bo->total_size += 64;
 352
 353         memset(&gem_create, 0, sizeof(gem_create));
 354         gem_create.size = bo->total_size;
 355
 356         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
 357         if (ret) {
 358                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
 359                         gem_create.size);
 360                 return ret;
 361         }
 362
 363         for (plane = 0; plane < bo->num_planes; plane++)
 364                 bo->handles[plane].u32 = gem_create.handle;
 365
 366         memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
 367         gem_set_tiling.handle = bo->handles[0].u32;
 368         gem_set_tiling.tiling_mode = bo->tiling;
 369         gem_set_tiling.stride = bo->strides[0];
 370
 371         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
 372         if (ret) {
 373                 struct drm_gem_close gem_close;
 374                 memset(&gem_close, 0, sizeof(gem_close));
 375                 gem_close.handle = bo->handles[0].u32;
 376                 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
 377
 378                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
 379                 return -errno;
 380         }
 381
 382         return 0;
 383 }
 384
 385 static void i915_close(struct driver *drv)
 386 {
 387         free(drv->priv);
 388         drv->priv = NULL;
 389 }
 390
 391 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
 392 {
 393         int ret;
 394         struct drm_i915_gem_get_tiling gem_get_tiling;
 395
 396         ret = drv_prime_bo_import(bo, data);
 397         if (ret)
 398                 return ret;
 399
 400         /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
 401         memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
 402         gem_get_tiling.handle = bo->handles[0].u32;
 403
 404         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
 405         if (ret) {
 406                 drv_gem_bo_destroy(bo);
 407                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
 408                 return ret;
 409         }
 410
 411         bo->tiling = gem_get_tiling.tiling_mode;
 412         return 0;
 413 }
 414
 415 static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, int prot)
 416 {
 417         int ret;
 418         void *addr;
 419         struct drm_i915_gem_set_domain set_domain;
 420
 421         memset(&set_domain, 0, sizeof(set_domain));
 422         set_domain.handle = bo->handles[0].u32;
 423         if (bo->tiling == I915_TILING_NONE) {
 424                 struct drm_i915_gem_mmap gem_map;
 425                 memset(&gem_map, 0, sizeof(gem_map));
 426
 427                 gem_map.handle = bo->handles[0].u32;
 428                 gem_map.offset = 0;
 429                 gem_map.size = bo->total_size;
 430
 431                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
 432                 if (ret) {
 433                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
 434                         return MAP_FAILED;
 435                 }
 436
 437                 addr = (void *)(uintptr_t)gem_map.addr_ptr;
 438                 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
 439                 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
 440
 441         } else {
 442                 struct drm_i915_gem_mmap_gtt gem_map;
 443                 memset(&gem_map, 0, sizeof(gem_map));
 444
 445                 gem_map.handle = bo->handles[0].u32;
 446
 447                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
 448                 if (ret) {
 449                         fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
 450                         return MAP_FAILED;
 451                 }
 452
 453                 addr = mmap(0, bo->total_size, prot, MAP_SHARED, bo->drv->fd, gem_map.offset);
 454                 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
 455                 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
 456         }
 457
 458         if (addr == MAP_FAILED) {
 459                 fprintf(stderr, "drv: i915 GEM mmap failed\n");
 460                 return addr;
 461         }
 462
 463         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
 464         if (ret) {
 465                 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
 466                 return MAP_FAILED;
 467         }
 468
 469         data->length = bo->total_size;
 470         return addr;
 471 }
 472
 473 static int i915_bo_unmap(struct bo *bo, struct map_info *data)
 474 {
 475         struct i915_device *i915 = bo->drv->priv;
 476         if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
 477                 i915_clflush(data->addr, data->length);
 478
 479         return munmap(data->addr, data->length);
 480 }
 481
 482 static uint32_t i915_resolve_format(uint32_t format, uint64_t usage)
 483 {
 484         switch (format) {
 485         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 486                 /* KBL camera subsystem requires NV12. */
 487                 if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 488                         return DRM_FORMAT_NV12;
 489                 /*HACK: See b/28671744 */
 490                 return DRM_FORMAT_XBGR8888;
 491         case DRM_FORMAT_FLEX_YCbCr_420_888:
 492                 /* KBL camera subsystem requires NV12. */
 493                 if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 494                         return DRM_FORMAT_NV12;
 495                 return DRM_FORMAT_YVU420;
 496         default:
 497                 return format;
 498         }
 499 }
 500
 501 struct backend backend_i915 = {
 502         .name = "i915",
 503         .init = i915_init,
 504         .close = i915_close,
 505         .bo_create = i915_bo_create,
 506         .bo_destroy = drv_gem_bo_destroy,
 507         .bo_import = i915_bo_import,
 508         .bo_map = i915_bo_map,
 509         .bo_unmap = i915_bo_unmap,
 510         .resolve_format = i915_resolve_format,
 511 };
 512
 513 #endif