rockchip.c

   1 /*
   2  * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6
   7 #ifdef DRV_ROCKCHIP
   8
   9 #include <assert.h>
  10 #include <errno.h>
  11 #include <stdio.h>
  12 #include <string.h>
  13 #include <sys/mman.h>
  14 #include <xf86drm.h>
  15 #include <rockchip_drm.h>
  16
  17 #include "drv_priv.h"
  18 #include "helpers.h"
  19 #include "util.h"
  20
  21 static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height,
  22                               uint32_t format, uint32_t flags)
  23 {
  24         int ret;
  25         size_t plane;
  26         struct drm_rockchip_gem_create gem_create;
  27
  28         if (format == DRV_FORMAT_NV12) {
  29                 width = ALIGN(width, 4);
  30                 height = ALIGN(height, 4);
  31         }
  32
  33         drv_bo_from_format(bo, width, height, format);
  34
  35         memset(&gem_create, 0, sizeof(gem_create));
  36         gem_create.size = bo->offsets[bo->num_planes - 1] +
  37                           bo->sizes[bo->num_planes - 1];
  38
  39         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE,
  40                            &gem_create);
  41
  42         if (ret) {
  43                 fprintf(stderr, "drv: DRM_IOCTL_ROCKCHIP_GEM_CREATE failed "
  44                                 "(size=%llu)\n", gem_create.size);
  45                 return ret;
  46         }
  47
  48         for (plane = 0; plane < bo->num_planes; plane++)
  49                 bo->handles[plane].u32 = gem_create.handle;
  50
  51         return 0;
  52 }
  53
  54 static void *rockchip_bo_map(struct bo *bo)
  55 {
  56         int ret;
  57         struct drm_rockchip_gem_map_off gem_map;
  58
  59         memset(&gem_map, 0, sizeof(gem_map));
  60         gem_map.handle = bo->handles[0].u32;
  61
  62         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET,
  63                        &gem_map);
  64         if (ret) {
  65                 fprintf(stderr,
  66                         "drv: DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
  67                 return MAP_FAILED;
  68         }
  69
  70         return mmap(0, bo->sizes[0], PROT_READ | PROT_WRITE, MAP_SHARED,
  71                     bo->drv->fd, gem_map.offset);
  72 }
  73
  74 static drv_format_t rockchip_resolve_format(drv_format_t format)
  75 {
  76         switch (format) {
  77         case DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
  78                 /*HACK: See b/28671744 */
  79                 return DRV_FORMAT_XBGR8888;
  80         case DRV_FORMAT_FLEX_YCbCr_420_888:
  81                 return DRV_FORMAT_NV12;
  82         default:
  83                 return format;
  84         }
  85 }
  86
  87 const struct backend backend_rockchip =
  88 {
  89         .name = "rockchip",
  90         .bo_create = rockchip_bo_create,
  91         .bo_destroy = drv_gem_bo_destroy,
  92         .bo_map = rockchip_bo_map,
  93         .resolve_format = rockchip_resolve_format,
  94         .format_list = {
  95                 {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
  96                                       DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
  97                                       DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
  98                                       DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
  99                 {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
 100                                       DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
 101                 {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
 102                                       DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
 103                                       DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
 104                                       DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
 105                 {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
 106                                       DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
 107                 {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
 108                                       DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
 109                                       DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
 110                                       DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
 111                 {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
 112                                       DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
 113                 {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
 114                                       DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
 115                                       DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
 116                                       DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
 117                 {DRV_FORMAT_NV12,     DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING |
 118                                       DRV_BO_USE_HW_TEXTURE | DRV_BO_USE_HW_RENDER |
 119                                       DRV_BO_USE_HW_2D | DRV_BO_USE_SW_READ_RARELY |
 120                                       DRV_BO_USE_SW_WRITE_RARELY},
 121                 {DRV_FORMAT_NV12,     DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR |
 122                                       DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
 123                 {DRV_FORMAT_YVU420,   DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
 124                                       DRV_BO_USE_SW_WRITE_OFTEN},
 125         }
 126 };
 127
 128 #endif