rockchip.c

   1 /*
   2  * Copyright 2014 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6
   7 #ifdef DRV_ROCKCHIP
   8
   9 #include <errno.h>
  10 #include <stdio.h>
  11 #include <string.h>
  12 #include <sys/mman.h>
  13 #include <xf86drm.h>
  14 #include <rockchip_drm.h>
  15
  16 #include "drv_priv.h"
  17 #include "helpers.h"
  18 #include "util.h"
  19
  20 static struct supported_combination combos[12] = {
  21         {DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_NONE,
  22                 BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN |
  23                 BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
  24         {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
  25                 BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
  26         {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
  27                 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
  28         {DRM_FORMAT_NV12, DRM_FORMAT_MOD_NONE,
  29                 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
  30         {DRM_FORMAT_NV12, DRM_FORMAT_MOD_NONE,
  31                 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
  32         {DRM_FORMAT_RGB565, DRM_FORMAT_MOD_NONE,
  33                 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
  34         {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE,
  35                 BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN |
  36                 BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
  37         {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE,
  38                 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
  39         {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
  40                 BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
  41         {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
  42                 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
  43         {DRM_FORMAT_YVU420, DRM_FORMAT_MOD_NONE,
  44                 BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY},
  45         {DRM_FORMAT_YVU420, DRM_FORMAT_MOD_NONE,
  46                 BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN},
  47 };
  48
  49 static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height,
  50                                uint32_t format)
  51 {
  52         /* We've restricted ourselves to four bytes per pixel. */
  53         const uint32_t pixel_size = 4;
  54
  55         const uint32_t clump_width = 4;
  56         const uint32_t clump_height = 4;
  57
  58 #define AFBC_NARROW 1
  59 #if AFBC_NARROW == 1
  60         const uint32_t block_width = 4 * clump_width;
  61         const uint32_t block_height = 4 * clump_height;
  62 #else
  63         const uint32_t block_width = 8 * clump_width;
  64         const uint32_t block_height = 2 * clump_height;
  65 #endif
  66
  67         const uint32_t header_block_size = 16;
  68         const uint32_t body_block_size = block_width * block_height * pixel_size;
  69         const uint32_t width_in_blocks = DIV_ROUND_UP(width, block_width);
  70         const uint32_t height_in_blocks = DIV_ROUND_UP(height, block_height);
  71         const uint32_t total_blocks = width_in_blocks * height_in_blocks;
  72
  73         const uint32_t header_plane_size = total_blocks * header_block_size;
  74         const uint32_t body_plane_size = total_blocks * body_block_size;
  75
  76         /* GPU requires 64 bytes, but EGL import code expects 1024 byte
  77          * alignement for the body plane. */
  78         const uint32_t body_plane_alignment = 1024;
  79
  80         const uint32_t body_plane_offset =
  81                 ALIGN(header_plane_size, body_plane_alignment);
  82         const uint32_t total_size =
  83                 body_plane_offset + body_plane_size;
  84
  85         bo->strides[0] = width_in_blocks * block_width * pixel_size;
  86         bo->sizes[0] = total_size;
  87         bo->offsets[0] = 0;
  88
  89         bo->total_size = total_size;
  90
  91         bo->format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
  92
  93         return 0;
  94 }
  95
  96 static int rockchip_init(struct driver *drv)
  97 {
  98         drv_insert_combinations(drv, combos, ARRAY_SIZE(combos));
  99         return drv_add_kms_flags(drv);
 100 }
 101
 102 static bool has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier)
 103 {
 104         uint32_t i;
 105
 106         for (i = 0; i < count; i++)
 107                 if (list[i] == modifier)
 108                         return true;
 109
 110         return false;
 111 }
 112
 113 static int rockchip_bo_create_with_modifiers(struct bo *bo,
 114                                              uint32_t width, uint32_t height,
 115                                              uint32_t format,
 116                                              const uint64_t *modifiers,
 117                                              uint32_t count)
 118 {
 119         int ret;
 120         size_t plane;
 121         struct drm_rockchip_gem_create gem_create;
 122
 123         if (format == DRM_FORMAT_NV12) {
 124                 uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16);
 125                 uint32_t h_mbs = DIV_ROUND_UP(ALIGN(height, 16), 16);
 126
 127                 uint32_t aligned_width = w_mbs * 16;
 128                 uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2);
 129
 130                 drv_bo_from_format(bo, aligned_width, height, format);
 131                 bo->total_size = bo->strides[0] * aligned_height
 132                                  + w_mbs * h_mbs * 128;
 133         } else if (width <= 2560 &&
 134                    has_modifier(modifiers, count,
 135                                 DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) {
 136                 /* If the caller has decided they can use AFBC, always
 137                  * pick that */
 138                 afbc_bo_from_format(bo, width, height, format);
 139         } else {
 140                 if (!has_modifier(modifiers, count, DRM_FORMAT_MOD_NONE)) {
 141                         errno = EINVAL;
 142                         fprintf(stderr, "no usable modifier found\n");
 143                         return -1;
 144                 }
 145
 146                 /*
 147                  * Since the ARM L1 cache line size is 64 bytes, align to that
 148                  * as a performance optimization.
 149                  */
 150                 uint32_t bytes_per_pixel = drv_stride_from_format(format, 1, 0);
 151                 width = ALIGN(width, DIV_ROUND_UP(64, bytes_per_pixel));
 152                 drv_bo_from_format(bo, width, height, format);
 153         }
 154
 155         memset(&gem_create, 0, sizeof(gem_create));
 156         gem_create.size = bo->total_size;
 157
 158         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE,
 159                        &gem_create);
 160
 161         if (ret) {
 162                 fprintf(stderr, "drv: DRM_IOCTL_ROCKCHIP_GEM_CREATE failed "
 163                                 "(size=%llu)\n", gem_create.size);
 164                 return ret;
 165         }
 166
 167         for (plane = 0; plane < bo->num_planes; plane++)
 168                 bo->handles[plane].u32 = gem_create.handle;
 169
 170         return 0;
 171 }
 172
 173 static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height,
 174                               uint32_t format, uint32_t flags)
 175 {
 176         uint64_t modifiers[] = { DRM_FORMAT_MOD_NONE };
 177
 178         return rockchip_bo_create_with_modifiers(bo, width, height, format,
 179                                                  modifiers, ARRAY_SIZE(modifiers));
 180 }
 181
 182 static void *rockchip_bo_map(struct bo *bo, struct map_info *data, size_t plane)
 183 {
 184         int ret;
 185         struct drm_rockchip_gem_map_off gem_map;
 186
 187         /* We can only map buffers created with SW access flags, which should
 188          * have no modifiers (ie, not AFBC). */
 189         if (bo->format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)
 190                 return MAP_FAILED;
 191
 192         memset(&gem_map, 0, sizeof(gem_map));
 193         gem_map.handle = bo->handles[0].u32;
 194
 195         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET,
 196                        &gem_map);
 197         if (ret) {
 198                 fprintf(stderr,
 199                         "drv: DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
 200                 return MAP_FAILED;
 201         }
 202
 203         data->length = bo->total_size;
 204
 205         return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED,
 206                     bo->drv->fd, gem_map.offset);
 207 }
 208
 209 static uint32_t rockchip_resolve_format(uint32_t format)
 210 {
 211         switch (format) {
 212         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 213                 /*HACK: See b/28671744 */
 214                 return DRM_FORMAT_XBGR8888;
 215         case DRM_FORMAT_FLEX_YCbCr_420_888:
 216                 return DRM_FORMAT_NV12;
 217         default:
 218                 return format;
 219         }
 220 }
 221
 222 struct backend backend_rockchip =
 223 {
 224         .name = "rockchip",
 225         .init = rockchip_init,
 226         .bo_create = rockchip_bo_create,
 227         .bo_create_with_modifiers = rockchip_bo_create_with_modifiers,
 228         .bo_destroy = drv_gem_bo_destroy,
 229         .bo_import = drv_prime_bo_import,
 230         .bo_map = rockchip_bo_map,
 231         .resolve_format = rockchip_resolve_format,
 232 };
 233
 234 #endif