2 * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
13 #include <tegra_drm.h>
20 * GOB (Group Of Bytes) is the basic unit of the blocklinear layout.
21 * GOBs are arranged to blocks, where the height of the block (measured
22 * in GOBs) is configurable.
24 #define NV_BLOCKLINEAR_GOB_HEIGHT 8
25 #define NV_BLOCKLINEAR_GOB_WIDTH 64
26 #define NV_DEFAULT_BLOCK_HEIGHT_LOG2 4
27 #define NV_PREFERRED_PAGE_SIZE (128 * 1024)
31 NV_MEM_KIND_PITCH = 0,
32 NV_MEM_KIND_C32_2CRA = 0xdb,
33 NV_MEM_KIND_GENERIC_16Bx2 = 0xfe,
36 static struct supported_combination combos[4] = {
37 {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
38 DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
39 {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
40 DRV_BO_USE_RENDERING | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
41 {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
42 DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
43 {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
44 DRV_BO_USE_RENDERING | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
47 static int compute_block_height_log2(int height)
49 int block_height_log2 = NV_DEFAULT_BLOCK_HEIGHT_LOG2;
51 if (block_height_log2 > 0) {
52 /* Shrink, if a smaller block height could cover the whole
54 int proposed = NV_BLOCKLINEAR_GOB_HEIGHT << (block_height_log2 - 1);
55 while (proposed >= height) {
57 if (block_height_log2 == 0)
62 return block_height_log2;
65 static void compute_layout_blocklinear(int width, int height, int format,
66 enum nv_mem_kind *kind,
67 uint32_t *block_height_log2,
68 uint32_t *stride, uint32_t *size)
70 int pitch = drv_stride_from_format(format, width, 0);
72 /* Align to blocklinear blocks. */
73 pitch = ALIGN(pitch, NV_BLOCKLINEAR_GOB_WIDTH);
75 /* Compute padded height. */
76 *block_height_log2 = compute_block_height_log2(height);
77 int block_height = 1 << *block_height_log2;
79 ALIGN(height, NV_BLOCKLINEAR_GOB_HEIGHT * block_height);
81 int bytes = pitch * padded_height;
83 /* Pad the allocation to the preferred page size.
84 * This will reduce the required page table size (see discussion in NV
85 * bug 1321091), and also acts as a WAR for NV bug 1325421.
87 bytes = ALIGN(bytes, NV_PREFERRED_PAGE_SIZE);
89 *kind = NV_MEM_KIND_C32_2CRA;
94 static void compute_layout_linear(int width, int height, int format,
95 uint32_t *stride, uint32_t *size)
97 *stride = drv_stride_from_format(format, width, 0);
98 *size = *stride * height;
101 static int tegra_init(struct driver *drv)
103 drv_insert_combinations(drv, combos, ARRAY_SIZE(combos));
104 return drv_add_kms_flags(drv);
107 static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height,
108 uint32_t format, uint32_t flags)
110 uint32_t size, stride, block_height_log2 = 0;
111 enum nv_mem_kind kind = NV_MEM_KIND_PITCH;
112 struct drm_tegra_gem_create gem_create;
115 if (flags & DRV_BO_USE_RENDERING)
116 compute_layout_blocklinear(width, height, format, &kind,
117 &block_height_log2, &stride, &size);
119 compute_layout_linear(width, height, format, &stride, &size);
121 memset(&gem_create, 0, sizeof(gem_create));
122 gem_create.size = size;
123 gem_create.flags = 0;
125 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_TEGRA_GEM_CREATE, &gem_create);
127 fprintf(stderr, "drv: DRM_IOCTL_TEGRA_GEM_CREATE failed "
128 "(size=%zu)\n", size);
132 bo->handles[0].u32 = gem_create.handle;
134 bo->total_size = bo->sizes[0] = size;
135 bo->strides[0] = stride;
137 if (kind != NV_MEM_KIND_PITCH) {
138 struct drm_tegra_gem_set_tiling gem_tile;
140 memset(&gem_tile, 0, sizeof(gem_tile));
141 gem_tile.handle = bo->handles[0].u32;
142 gem_tile.mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
143 gem_tile.value = block_height_log2;
145 ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_SET_TILING,
146 &gem_tile, sizeof(gem_tile));
148 drv_gem_bo_destroy(bo);
152 /* Encode blocklinear parameters for EGLImage creation. */
153 bo->tiling = (kind & 0xff) |
154 ((block_height_log2 & 0xf) << 8);
155 bo->format_modifiers[0] = fourcc_mod_code(NV, bo->tiling);
161 static void *tegra_bo_map(struct bo *bo, struct map_info *data, size_t plane)
164 struct drm_tegra_gem_mmap gem_map;
166 memset(&gem_map, 0, sizeof(gem_map));
167 gem_map.handle = bo->handles[0].u32;
169 ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_MMAP, &gem_map,
172 fprintf(stderr, "drv: DRM_TEGRA_GEM_MMAP failed\n");
176 data->length = bo->total_size;
178 return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED,
179 bo->drv->fd, gem_map.offset);
182 struct backend backend_tegra =
186 .bo_create = tegra_bo_create,
187 .bo_destroy = drv_gem_bo_destroy,
188 .bo_map = tegra_bo_map,