tegra.c

   1 /*
   2  * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6
   7 #ifdef GBM_TEGRA
   8
   9 #include <string.h>
  10 #include <xf86drm.h>
  11 #include <tegra_drm.h>
  12
  13 #include "gbm_priv.h"
  14 #include "helpers.h"
  15
  16 /*
  17  * GOB (Group Of Bytes) is the basic unit of the blocklinear layout.
  18  * GOBs are arranged to blocks, where the height of the block (measured
  19  * in GOBs) is configurable.
  20  */
  21 #define NV_BLOCKLINEAR_GOB_HEIGHT 8
  22 #define NV_BLOCKLINEAR_GOB_WIDTH 64
  23 #define NV_DEFAULT_BLOCK_HEIGHT_LOG2 4
  24 #define NV_PREFERRED_PAGE_SIZE (128 * 1024)
  25
  26 enum nv_mem_kind
  27 {
  28         NV_MEM_KIND_PITCH = 0,
  29         NV_MEM_KIND_GENERIC_16Bx2 = 0xfe,
  30 };
  31
  32 static int compute_block_height_log2(int height)
  33 {
  34         int block_height_log2 = NV_DEFAULT_BLOCK_HEIGHT_LOG2;
  35
  36         if (block_height_log2 > 0) {
  37                 /* Shrink, if a smaller block height could cover the whole
  38                  * surface height. */
  39                 int proposed = NV_BLOCKLINEAR_GOB_HEIGHT << (block_height_log2 - 1);
  40                 while (proposed >= height) {
  41                         block_height_log2--;
  42                         if (block_height_log2 == 0)
  43                                 break;
  44                         proposed /= 2;
  45                 }
  46         }
  47         return block_height_log2;
  48 }
  49
  50 static inline uint32_t align_up(uint32_t value, uint32_t alignment)
  51 {
  52         return (value + (alignment-1)) & ~(alignment-1);
  53 }
  54
  55 static void compute_layout_blocklinear(int width, int height, int format,
  56                                        enum nv_mem_kind *kind, uint32_t *block_height_log2,
  57                                        uint32_t *stride, uint32_t *size)
  58 {
  59         int pitch = width * gbm_bytes_from_format(format);
  60
  61         /* Align to blocklinear blocks. */
  62         pitch = align_up(pitch, NV_BLOCKLINEAR_GOB_WIDTH);
  63
  64         /* Compute padded height. */
  65         *block_height_log2 = compute_block_height_log2(height);
  66         int block_height = 1 << *block_height_log2;
  67         int padded_height = align_up(height, NV_BLOCKLINEAR_GOB_HEIGHT * block_height);
  68
  69         int bytes = pitch * padded_height;
  70
  71         /* Pad the allocation to the preferred page size.
  72          * This will reduce the required page table size (see discussion in NV
  73          * bug 1321091), and also acts as a WAR for NV bug 1325421.
  74          */
  75         bytes = align_up(bytes, NV_PREFERRED_PAGE_SIZE);
  76
  77         *kind = NV_MEM_KIND_GENERIC_16Bx2;
  78         *stride = pitch;
  79         *size = bytes;
  80 }
  81
  82 static void compute_layout_linear(int width, int height, int format,
  83                                   uint32_t *stride, uint32_t *size)
  84 {
  85         *stride = width * gbm_bytes_from_format(format);
  86         *size = *stride * height;
  87 }
  88
  89 static int gbm_tegra_bo_create(struct gbm_bo *bo, uint32_t width, uint32_t height,
  90                                uint32_t format, uint32_t flags)
  91 {
  92         uint32_t size, stride, block_height_log2 = 0;
  93         enum nv_mem_kind kind = NV_MEM_KIND_PITCH;
  94         struct drm_tegra_gem_create gem_create;
  95         int ret;
  96
  97         if (flags & GBM_BO_USE_RENDERING)
  98                 compute_layout_blocklinear(width, height, format, &kind,
  99                                            &block_height_log2, &stride, &size);
 100         else
 101                 compute_layout_linear(width, height, format, &stride, &size);
 102
 103         memset(&gem_create, 0, sizeof(gem_create));
 104         gem_create.size = size;
 105         gem_create.flags = 0;
 106
 107         ret = drmIoctl(bo->gbm->fd, DRM_IOCTL_TEGRA_GEM_CREATE, &gem_create);
 108         if (ret)
 109                 return ret;
 110
 111         bo->handle.u32 = gem_create.handle;
 112         bo->size = size;
 113         bo->stride = stride;
 114
 115         if (kind != NV_MEM_KIND_PITCH) {
 116                 struct drm_tegra_gem_set_tiling gem_tile;
 117
 118                 memset(&gem_tile, 0, sizeof(gem_tile));
 119                 gem_tile.handle = bo->handle.u32;
 120                 gem_tile.mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
 121                 gem_tile.value = block_height_log2;
 122
 123                 ret = drmCommandWriteRead(bo->gbm->fd, DRM_TEGRA_GEM_SET_TILING, &gem_tile,
 124                                           sizeof(gem_tile));
 125                 if (ret < 0) {
 126                         gbm_gem_bo_destroy(bo);
 127                         return ret;
 128                 }
 129
 130                 /* Encode blocklinear parameters for EGLImage creation. */
 131
 132                 /* XXX Bringup hack: If the highest order bit is set in
 133                  * EGL_DMA_BUF_PLANE0_PITCH_EXT, Nvidia driver treats it as
 134                  * a hint that the buffer is tiled, and the remaining bits in
 135                  * the pitch attribute are treated as vendor specific tiling
 136                  * arguments.  Using this hack means that we don't need to add
 137                  * a new FOURCC format, or EGL_DMA_BUF_PLANE0_TILING_EXT
 138                  * attribute to the dma-buf import extension.
 139                  */
 140                 bo->tiling = (1 << 31) |
 141                              (kind & 0xff) |
 142                              ((block_height_log2 & 0xf) << 8);
 143         }
 144
 145         return 0;
 146 }
 147
 148 struct gbm_driver gbm_driver_tegra =
 149 {
 150         .name = "tegra",
 151         .bo_create = gbm_tegra_bo_create,
 152         .bo_destroy = gbm_gem_bo_destroy,
 153         .format_list = {
 154                 /* Linear support */
 155                 {GBM_FORMAT_XRGB8888, GBM_BO_USE_SCANOUT | GBM_BO_USE_CURSOR | GBM_BO_USE_WRITE},
 156                 {GBM_FORMAT_ARGB8888, GBM_BO_USE_SCANOUT | GBM_BO_USE_CURSOR | GBM_BO_USE_WRITE},
 157                 /* Blocklinear support */
 158                 {GBM_FORMAT_XRGB8888, GBM_BO_USE_SCANOUT | GBM_BO_USE_RENDERING},
 159                 {GBM_FORMAT_ARGB8888, GBM_BO_USE_SCANOUT | GBM_BO_USE_RENDERING},
 160         }
 161 };
 162
 163 #endif