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minigbm: amdgpu: Add RGB565 to supported render target formats
[android-x86/external-minigbm.git] / vc4.c
1 /*
2  * Copyright 2017 The Chromium OS Authors. All rights reserved.
3  * Use of this source code is governed by a BSD-style license that can be
4  * found in the LICENSE file.
5  */
6
7 #ifdef DRV_VC4
8
9 #include <stdio.h>
10 #include <string.h>
11 #include <sys/mman.h>
12 #include <vc4_drm.h>
13 #include <xf86drm.h>
14
15 #include "drv_priv.h"
16 #include "helpers.h"
17 #include "util.h"
18
19 static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
20                                                   DRM_FORMAT_XRGB8888 };
21
22 static int vc4_init(struct driver *drv)
23 {
24         int ret;
25         ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
26                                    &LINEAR_METADATA, BO_USE_RENDER_MASK);
27         if (ret)
28                 return ret;
29
30         return drv_modify_linear_combinations(drv);
31 }
32
33 static int vc4_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
34                          uint64_t use_flags)
35 {
36         int ret;
37         size_t plane;
38         uint32_t stride;
39         struct drm_vc4_create_bo bo_create;
40
41         /*
42          * Since the ARM L1 cache line size is 64 bytes, align to that as a
43          * performance optimization.
44          */
45         stride = drv_stride_from_format(format, width, 0);
46         stride = ALIGN(stride, 64);
47         drv_bo_from_format(bo, stride, height, format);
48
49         memset(&bo_create, 0, sizeof(bo_create));
50         bo_create.size = bo->total_size;
51
52         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VC4_CREATE_BO, &bo_create);
53         if (ret) {
54                 fprintf(stderr, "drv: DRM_IOCTL_VC4_GEM_CREATE failed (size=%zu)\n",
55                         bo->total_size);
56                 return ret;
57         }
58
59         for (plane = 0; plane < bo->num_planes; plane++)
60                 bo->handles[plane].u32 = bo_create.handle;
61
62         return 0;
63 }
64
65 static void *vc4_bo_map(struct bo *bo, struct map_info *data, size_t plane, uint32_t map_flags)
66 {
67         int ret;
68         struct drm_vc4_mmap_bo bo_map;
69
70         memset(&bo_map, 0, sizeof(bo_map));
71         bo_map.handle = bo->handles[0].u32;
72
73         ret = drmCommandWriteRead(bo->drv->fd, DRM_VC4_MMAP_BO, &bo_map, sizeof(bo_map));
74         if (ret) {
75                 fprintf(stderr, "drv: DRM_VC4_MMAP_BO failed\n");
76                 return MAP_FAILED;
77         }
78
79         data->length = bo->total_size;
80         return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
81                     bo_map.offset);
82 }
83
84 struct backend backend_vc4 = {
85         .name = "vc4",
86         .init = vc4_init,
87         .bo_create = vc4_bo_create,
88         .bo_import = drv_prime_bo_import,
89         .bo_destroy = drv_gem_bo_destroy,
90         .bo_map = vc4_bo_map,
91         .bo_unmap = drv_bo_munmap,
92 };
93
94 #endif