virtio_gpu.c

   1 /*
   2  * Copyright 2017 The Chromium OS Authors. All rights reserved.
   3  * Use of this source code is governed by a BSD-style license that can be
   4  * found in the LICENSE file.
   5  */
   6
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <stdio.h>
  10 #include <string.h>
  11 #include <sys/mman.h>
  12 #include <xf86drm.h>
  13
  14 #include "drv_priv.h"
  15 #include "helpers.h"
  16 #include "util.h"
  17 #include "virgl_hw.h"
  18 #include "virtgpu_drm.h"
  19
  20 #ifndef PAGE_SIZE
  21 #define PAGE_SIZE 0x1000
  22 #endif
  23 #define PIPE_TEXTURE_2D 2
  24
  25 #define MESA_LLVMPIPE_TILE_ORDER 6
  26 #define MESA_LLVMPIPE_TILE_SIZE (1 << MESA_LLVMPIPE_TILE_ORDER)
  27
  28 struct feature {
  29         uint64_t feature;
  30         const char *name;
  31         uint32_t enabled;
  32 };
  33
  34 enum feature_id {
  35         feat_3d,
  36         feat_capset_fix,
  37         feat_max,
  38 };
  39
  40 #define FEATURE(x)                                                                                 \
  41         (struct feature)                                                                           \
  42         {                                                                                          \
  43                 x, #x, 0                                                                           \
  44         }
  45
  46 static struct feature features[] = { FEATURE(VIRTGPU_PARAM_3D_FEATURES),
  47                                      FEATURE(VIRTGPU_PARAM_CAPSET_QUERY_FIX) };
  48
  49 static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
  50                                                   DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
  51                                                   DRM_FORMAT_XRGB8888 };
  52
  53 static const uint32_t dumb_texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_YVU420,
  54                                                         DRM_FORMAT_NV12,
  55                                                         DRM_FORMAT_YVU420_ANDROID };
  56
  57 static const uint32_t texture_source_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_R8, DRM_FORMAT_RG88,
  58                                                    DRM_FORMAT_YVU420_ANDROID };
  59
  60 struct virtio_gpu_priv {
  61         int caps_is_v2;
  62         union virgl_caps caps;
  63 };
  64
  65 static uint32_t translate_format(uint32_t drm_fourcc)
  66 {
  67         switch (drm_fourcc) {
  68         case DRM_FORMAT_XRGB8888:
  69                 return VIRGL_FORMAT_B8G8R8X8_UNORM;
  70         case DRM_FORMAT_ARGB8888:
  71                 return VIRGL_FORMAT_B8G8R8A8_UNORM;
  72         case DRM_FORMAT_XBGR8888:
  73                 return VIRGL_FORMAT_R8G8B8X8_UNORM;
  74         case DRM_FORMAT_ABGR8888:
  75                 return VIRGL_FORMAT_R8G8B8A8_UNORM;
  76         case DRM_FORMAT_RGB565:
  77                 return VIRGL_FORMAT_B5G6R5_UNORM;
  78         case DRM_FORMAT_R8:
  79                 return VIRGL_FORMAT_R8_UNORM;
  80         case DRM_FORMAT_RG88:
  81                 return VIRGL_FORMAT_R8G8_UNORM;
  82         case DRM_FORMAT_NV12:
  83                 return VIRGL_FORMAT_NV12;
  84         case DRM_FORMAT_YVU420:
  85         case DRM_FORMAT_YVU420_ANDROID:
  86                 return VIRGL_FORMAT_YV12;
  87         default:
  88                 return 0;
  89         }
  90 }
  91
  92 static bool virtio_gpu_supports_format(struct virgl_supported_format_mask *supported,
  93                                        uint32_t drm_format)
  94 {
  95         uint32_t virgl_format = translate_format(drm_format);
  96         if (!virgl_format) {
  97                 return false;
  98         }
  99
 100         uint32_t bitmask_index = virgl_format / 32;
 101         uint32_t bit_index = virgl_format % 32;
 102         return supported->bitmask[bitmask_index] & (1 << bit_index);
 103 }
 104
 105 // Adds the given buffer combination to the list of supported buffer combinations if the
 106 // combination is supported by the virtio backend.
 107 static void virtio_gpu_add_combination(struct driver *drv, uint32_t drm_format,
 108                                        struct format_metadata *metadata, uint64_t use_flags)
 109 {
 110         struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)drv->priv;
 111
 112         if (features[feat_3d].enabled && priv->caps.max_version >= 1) {
 113                 if ((use_flags & BO_USE_RENDERING) &&
 114                     !virtio_gpu_supports_format(&priv->caps.v1.render, drm_format)) {
 115                         drv_log("Skipping unsupported render format: %d\n", drm_format);
 116                         return;
 117                 }
 118
 119                 if ((use_flags & BO_USE_TEXTURE) &&
 120                     !virtio_gpu_supports_format(&priv->caps.v1.sampler, drm_format)) {
 121                         drv_log("Skipping unsupported texture format: %d\n", drm_format);
 122                         return;
 123                 }
 124                 if ((use_flags & BO_USE_SCANOUT) && priv->caps_is_v2 &&
 125                     !virtio_gpu_supports_format(&priv->caps.v2.scanout, drm_format)) {
 126                         drv_log("Unsupported scanout format: %d\n", drm_format);
 127                         use_flags &= ~BO_USE_SCANOUT;
 128                 }
 129         }
 130
 131         drv_add_combination(drv, drm_format, metadata, use_flags);
 132 }
 133
 134 // Adds each given buffer combination to the list of supported buffer combinations if the
 135 // combination supported by the virtio backend.
 136 static void virtio_gpu_add_combinations(struct driver *drv, const uint32_t *drm_formats,
 137                                         uint32_t num_formats, struct format_metadata *metadata,
 138                                         uint64_t use_flags)
 139 {
 140         uint32_t i;
 141
 142         for (i = 0; i < num_formats; i++) {
 143                 virtio_gpu_add_combination(drv, drm_formats[i], metadata, use_flags);
 144         }
 145 }
 146
 147 static int virtio_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 148                                  uint64_t use_flags)
 149 {
 150         if (bo->meta.format != DRM_FORMAT_R8) {
 151                 width = ALIGN(width, MESA_LLVMPIPE_TILE_SIZE);
 152                 height = ALIGN(height, MESA_LLVMPIPE_TILE_SIZE);
 153         }
 154
 155         return drv_dumb_bo_create_ex(bo, width, height, format, use_flags, BO_QUIRK_DUMB32BPP);
 156 }
 157
 158 static inline void handle_flag(uint64_t *flag, uint64_t check_flag, uint32_t *bind,
 159                                uint32_t virgl_bind)
 160 {
 161         if ((*flag) & check_flag) {
 162                 (*flag) &= ~check_flag;
 163                 (*bind) |= virgl_bind;
 164         }
 165 }
 166
 167 static uint32_t use_flags_to_bind(uint64_t use_flags)
 168 {
 169         /* In crosvm, VIRGL_BIND_SHARED means minigbm will allocate, not virglrenderer. */
 170         uint32_t bind = VIRGL_BIND_SHARED;
 171
 172         handle_flag(&use_flags, BO_USE_TEXTURE, &bind, VIRGL_BIND_SAMPLER_VIEW);
 173         handle_flag(&use_flags, BO_USE_RENDERING, &bind, VIRGL_BIND_RENDER_TARGET);
 174         handle_flag(&use_flags, BO_USE_SCANOUT, &bind, VIRGL_BIND_SCANOUT);
 175         handle_flag(&use_flags, BO_USE_CURSOR, &bind, VIRGL_BIND_CURSOR);
 176         handle_flag(&use_flags, BO_USE_LINEAR, &bind, VIRGL_BIND_LINEAR);
 177
 178         handle_flag(&use_flags, BO_USE_SW_READ_OFTEN, &bind, VIRGL_BIND_LINEAR);
 179         handle_flag(&use_flags, BO_USE_SW_READ_RARELY, &bind, VIRGL_BIND_LINEAR);
 180         handle_flag(&use_flags, BO_USE_SW_WRITE_OFTEN, &bind, VIRGL_BIND_LINEAR);
 181         handle_flag(&use_flags, BO_USE_SW_WRITE_RARELY, &bind, VIRGL_BIND_LINEAR);
 182
 183         // All host drivers only support linear camera buffer formats. If
 184         // that changes, this will need to be modified.
 185         handle_flag(&use_flags, BO_USE_CAMERA_READ, &bind, VIRGL_BIND_LINEAR);
 186         handle_flag(&use_flags, BO_USE_CAMERA_WRITE, &bind, VIRGL_BIND_LINEAR);
 187
 188         if (use_flags) {
 189                 drv_log("Unhandled bo use flag: %llx\n", (unsigned long long)use_flags);
 190         }
 191
 192         return bind;
 193 }
 194
 195 static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 196                                   uint64_t use_flags)
 197 {
 198         int ret;
 199         uint32_t stride;
 200         struct drm_virtgpu_resource_create res_create;
 201
 202         stride = drv_stride_from_format(format, width, 0);
 203         drv_bo_from_format(bo, stride, height, format);
 204
 205         /*
 206          * Setting the target is intended to ensure this resource gets bound as a 2D
 207          * texture in the host renderer's GL state. All of these resource properties are
 208          * sent unchanged by the kernel to the host, which in turn sends them unchanged to
 209          * virglrenderer. When virglrenderer makes a resource, it will convert the target
 210          * enum to the equivalent one in GL and then bind the resource to that target.
 211          */
 212         memset(&res_create, 0, sizeof(res_create));
 213
 214         res_create.target = PIPE_TEXTURE_2D;
 215         res_create.format = translate_format(format);
 216         res_create.bind = use_flags_to_bind(use_flags);
 217         res_create.width = width;
 218         res_create.height = height;
 219
 220         /* For virgl 3D */
 221         res_create.depth = 1;
 222         res_create.array_size = 1;
 223         res_create.last_level = 0;
 224         res_create.nr_samples = 0;
 225
 226         res_create.size = ALIGN(bo->meta.total_size, PAGE_SIZE); // PAGE_SIZE = 0x1000
 227         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &res_create);
 228         if (ret) {
 229                 drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_CREATE failed with %s\n", strerror(errno));
 230                 return ret;
 231         }
 232
 233         for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++)
 234                 bo->handles[plane].u32 = res_create.bo_handle;
 235
 236         return 0;
 237 }
 238
 239 static void *virtio_virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
 240 {
 241         int ret;
 242         struct drm_virtgpu_map gem_map;
 243
 244         memset(&gem_map, 0, sizeof(gem_map));
 245         gem_map.handle = bo->handles[0].u32;
 246
 247         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
 248         if (ret) {
 249                 drv_log("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
 250                 return MAP_FAILED;
 251         }
 252
 253         vma->length = bo->meta.total_size;
 254         return mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
 255                     gem_map.offset);
 256 }
 257
 258 static int virtio_gpu_get_caps(struct driver *drv, union virgl_caps *caps, int *caps_is_v2)
 259 {
 260         int ret;
 261         struct drm_virtgpu_get_caps cap_args;
 262
 263         *caps_is_v2 = 0;
 264         memset(&cap_args, 0, sizeof(cap_args));
 265         cap_args.addr = (unsigned long long)caps;
 266         if (features[feat_capset_fix].enabled) {
 267                 *caps_is_v2 = 1;
 268                 cap_args.cap_set_id = 2;
 269                 cap_args.size = sizeof(union virgl_caps);
 270         } else {
 271                 cap_args.cap_set_id = 1;
 272                 cap_args.size = sizeof(struct virgl_caps_v1);
 273         }
 274
 275         ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GET_CAPS, &cap_args);
 276         if (ret) {
 277                 drv_log("DRM_IOCTL_VIRTGPU_GET_CAPS failed with %s\n", strerror(errno));
 278                 *caps_is_v2 = 0;
 279
 280                 // Fallback to v1
 281                 cap_args.cap_set_id = 1;
 282                 cap_args.size = sizeof(struct virgl_caps_v1);
 283
 284                 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GET_CAPS, &cap_args);
 285                 if (ret) {
 286                         drv_log("DRM_IOCTL_VIRTGPU_GET_CAPS failed with %s\n", strerror(errno));
 287                 }
 288         }
 289
 290         return ret;
 291 }
 292
 293 static int virtio_gpu_init(struct driver *drv)
 294 {
 295         int ret;
 296         struct virtio_gpu_priv *priv;
 297
 298         priv = calloc(1, sizeof(*priv));
 299         drv->priv = priv;
 300         for (uint32_t i = 0; i < ARRAY_SIZE(features); i++) {
 301                 struct drm_virtgpu_getparam params = { 0 };
 302
 303                 params.param = features[i].feature;
 304                 params.value = (uint64_t)(uintptr_t)&features[i].enabled;
 305                 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GETPARAM, &params);
 306                 if (ret)
 307                         drv_log("DRM_IOCTL_VIRTGPU_GET_PARAM failed with %s\n", strerror(errno));
 308         }
 309
 310         if (features[feat_3d].enabled) {
 311                 virtio_gpu_get_caps(drv, &priv->caps, &priv->caps_is_v2);
 312
 313                 /* This doesn't mean host can scanout everything, it just means host
 314                  * hypervisor can show it. */
 315                 virtio_gpu_add_combinations(drv, render_target_formats,
 316                                             ARRAY_SIZE(render_target_formats), &LINEAR_METADATA,
 317                                             BO_USE_RENDER_MASK | BO_USE_SCANOUT);
 318                 virtio_gpu_add_combinations(drv, texture_source_formats,
 319                                             ARRAY_SIZE(texture_source_formats), &LINEAR_METADATA,
 320                                             BO_USE_TEXTURE_MASK);
 321         } else {
 322                 /* Virtio primary plane only allows this format. */
 323                 virtio_gpu_add_combination(drv, DRM_FORMAT_XRGB8888, &LINEAR_METADATA,
 324                                            BO_USE_RENDER_MASK | BO_USE_SCANOUT);
 325                 /* Virtio cursor plane only allows this format and Chrome cannot live without
 326                  * ARGB888 renderable format. */
 327                 virtio_gpu_add_combination(drv, DRM_FORMAT_ARGB8888, &LINEAR_METADATA,
 328                                            BO_USE_RENDER_MASK | BO_USE_CURSOR);
 329                 /* Android needs more, but they cannot be bound as scanouts anymore after
 330                  * "drm/virtio: fix DRM_FORMAT_* handling" */
 331                 virtio_gpu_add_combinations(drv, render_target_formats,
 332                                             ARRAY_SIZE(render_target_formats), &LINEAR_METADATA,
 333                                             BO_USE_RENDER_MASK);
 334                 virtio_gpu_add_combinations(drv, dumb_texture_source_formats,
 335                                             ARRAY_SIZE(dumb_texture_source_formats),
 336                                             &LINEAR_METADATA, BO_USE_TEXTURE_MASK);
 337                 virtio_gpu_add_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA,
 338                                            BO_USE_SW_MASK | BO_USE_LINEAR);
 339         }
 340
 341         /* Android CTS tests require this. */
 342         virtio_gpu_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
 343
 344         drv_modify_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA,
 345                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER |
 346                                    BO_USE_HW_VIDEO_ENCODER);
 347         drv_modify_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA,
 348                                BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER);
 349
 350         return drv_modify_linear_combinations(drv);
 351 }
 352
 353 static void virtio_gpu_close(struct driver *drv)
 354 {
 355         free(drv->priv);
 356         drv->priv = NULL;
 357 }
 358
 359 static int virtio_gpu_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
 360                                 uint64_t use_flags)
 361 {
 362         if (features[feat_3d].enabled)
 363                 return virtio_virgl_bo_create(bo, width, height, format, use_flags);
 364         else
 365                 return virtio_dumb_bo_create(bo, width, height, format, use_flags);
 366 }
 367
 368 static int virtio_gpu_bo_destroy(struct bo *bo)
 369 {
 370         if (features[feat_3d].enabled)
 371                 return drv_gem_bo_destroy(bo);
 372         else
 373                 return drv_dumb_bo_destroy(bo);
 374 }
 375
 376 static void *virtio_gpu_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
 377 {
 378         if (features[feat_3d].enabled)
 379                 return virtio_virgl_bo_map(bo, vma, plane, map_flags);
 380         else
 381                 return drv_dumb_bo_map(bo, vma, plane, map_flags);
 382 }
 383
 384 static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
 385 {
 386         int ret;
 387         struct drm_virtgpu_3d_transfer_from_host xfer;
 388         struct drm_virtgpu_3d_wait waitcmd;
 389
 390         if (!features[feat_3d].enabled)
 391                 return 0;
 392
 393         // Invalidate is only necessary if the host writes to the buffer.
 394         if ((bo->meta.use_flags & (BO_USE_RENDERING | BO_USE_CAMERA_WRITE |
 395                                    BO_USE_HW_VIDEO_ENCODER | BO_USE_HW_VIDEO_DECODER)) == 0)
 396                 return 0;
 397
 398         memset(&xfer, 0, sizeof(xfer));
 399         xfer.bo_handle = mapping->vma->handle;
 400         xfer.box.x = mapping->rect.x;
 401         xfer.box.y = mapping->rect.y;
 402         xfer.box.w = mapping->rect.width;
 403         xfer.box.h = mapping->rect.height;
 404         xfer.box.d = 1;
 405
 406         if (mapping->rect.x || mapping->rect.y) {
 407                 drv_log("Non-zero transfer offset\n");
 408
 409                 /*
 410                  * virglrenderer uses the box parameters and assumes that offset == 0 for planar
 411                  * images
 412                  */
 413                 if (bo->meta.num_planes == 1) {
 414                         xfer.offset =
 415                             (bo->meta.strides[0] * mapping->rect.y) +
 416                             drv_bytes_per_pixel_from_format(bo->meta.format, 0) * mapping->rect.x;
 417                 }
 418         }
 419
 420         if ((bo->meta.use_flags & BO_USE_RENDERING) == 0) {
 421                 // Unfortunately, the kernel doesn't actually pass the guest layer_stride and
 422                 // guest stride to the host (compare virtio_gpu.h and virtgpu_drm.h). For gbm
 423                 // based resources, we can work around this by using the level field to pass
 424                 // the stride to virglrenderer's gbm transfer code. However, we need to avoid
 425                 // doing this for resources which don't rely on that transfer code, which is
 426                 // resources with the BO_USE_RENDERING flag set.
 427                 // TODO(b/145993887): Send also stride when the patches are landed
 428                 xfer.level = bo->meta.strides[0];
 429         }
 430
 431         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer);
 432         if (ret) {
 433                 drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST failed with %s\n", strerror(errno));
 434                 return -errno;
 435         }
 436
 437         // The transfer needs to complete before invalidate returns so that any host changes
 438         // are visible and to ensure the host doesn't overwrite subsequent guest changes.
 439         // TODO(b/136733358): Support returning fences from transfers
 440         memset(&waitcmd, 0, sizeof(waitcmd));
 441         waitcmd.handle = mapping->vma->handle;
 442         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
 443         if (ret) {
 444                 drv_log("DRM_IOCTL_VIRTGPU_WAIT failed with %s\n", strerror(errno));
 445                 return -errno;
 446         }
 447
 448         return 0;
 449 }
 450
 451 static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
 452 {
 453         int ret;
 454         struct drm_virtgpu_3d_transfer_to_host xfer;
 455         struct drm_virtgpu_3d_wait waitcmd;
 456
 457         if (!features[feat_3d].enabled)
 458                 return 0;
 459
 460         if (!(mapping->vma->map_flags & BO_MAP_WRITE))
 461                 return 0;
 462
 463         memset(&xfer, 0, sizeof(xfer));
 464         xfer.bo_handle = mapping->vma->handle;
 465         xfer.box.x = mapping->rect.x;
 466         xfer.box.y = mapping->rect.y;
 467         xfer.box.w = mapping->rect.width;
 468         xfer.box.h = mapping->rect.height;
 469         xfer.box.d = 1;
 470
 471         if (mapping->rect.x || mapping->rect.y) {
 472                 drv_log("Non-zero transfer offset\n");
 473                 /*
 474                  * virglrenderer uses the box parameters and assumes that offset == 0 for planar
 475                  * images
 476                  */
 477                 if (bo->meta.num_planes == 1) {
 478                         xfer.offset =
 479                             (bo->meta.strides[0] * mapping->rect.y) +
 480                             drv_bytes_per_pixel_from_format(bo->meta.format, 0) * mapping->rect.x;
 481                 }
 482         }
 483
 484         // Unfortunately, the kernel doesn't actually pass the guest layer_stride and
 485         // guest stride to the host (compare virtio_gpu.h and virtgpu_drm.h). We can use
 486         // the level to work around this.
 487         xfer.level = bo->meta.strides[0];
 488
 489         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer);
 490         if (ret) {
 491                 drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST failed with %s\n", strerror(errno));
 492                 return -errno;
 493         }
 494
 495         // If the buffer is only accessed by the host GPU, then the flush is ordered
 496         // with subsequent commands. However, if other host hardware can access the
 497         // buffer, we need to wait for the transfer to complete for consistency.
 498         // TODO(b/136733358): Support returning fences from transfers
 499         if (bo->meta.use_flags & BO_USE_NON_GPU_HW) {
 500                 memset(&waitcmd, 0, sizeof(waitcmd));
 501                 waitcmd.handle = mapping->vma->handle;
 502
 503                 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
 504                 if (ret) {
 505                         drv_log("DRM_IOCTL_VIRTGPU_WAIT failed with %s\n", strerror(errno));
 506                         return -errno;
 507                 }
 508         }
 509
 510         return 0;
 511 }
 512
 513 static uint32_t virtio_gpu_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags)
 514 {
 515
 516         switch (format) {
 517         case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
 518                 /* Camera subsystem requires NV12. */
 519                 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
 520                         return DRM_FORMAT_NV12;
 521                 /*HACK: See b/28671744 */
 522                 return DRM_FORMAT_XBGR8888;
 523         case DRM_FORMAT_FLEX_YCbCr_420_888:
 524                 /*
 525                  * All of our host drivers prefer NV12 as their flexible media format.
 526                  * If that changes, this will need to be modified.
 527                  */
 528                 if (features[feat_3d].enabled)
 529                         return DRM_FORMAT_NV12;
 530                 else
 531                         return DRM_FORMAT_YVU420;
 532         default:
 533                 return format;
 534         }
 535 }
 536
 537 static int virtio_gpu_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES],
 538                                     uint32_t offsets[DRV_MAX_PLANES])
 539 {
 540         int ret;
 541         struct drm_virtgpu_resource_info res_info;
 542
 543         if (!features[feat_3d].enabled)
 544                 return 0;
 545
 546         memset(&res_info, 0, sizeof(res_info));
 547         res_info.bo_handle = bo->handles[0].u32;
 548         ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_INFO, &res_info);
 549         if (ret) {
 550                 drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_INFO failed with %s\n", strerror(errno));
 551                 return ret;
 552         }
 553
 554         for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++) {
 555                 /*
 556                  * Currently, kernel v4.14 (Betty) doesn't have the extended resource info
 557                  * ioctl.
 558                  */
 559                 if (res_info.strides[plane]) {
 560                         strides[plane] = res_info.strides[plane];
 561                         offsets[plane] = res_info.offsets[plane];
 562                 }
 563         }
 564
 565         return 0;
 566 }
 567
 568 const struct backend backend_virtio_gpu = {
 569         .name = "virtio_gpu",
 570         .init = virtio_gpu_init,
 571         .close = virtio_gpu_close,
 572         .bo_create = virtio_gpu_bo_create,
 573         .bo_destroy = virtio_gpu_bo_destroy,
 574         .bo_import = drv_prime_bo_import,
 575         .bo_map = virtio_gpu_bo_map,
 576         .bo_unmap = drv_bo_munmap,
 577         .bo_invalidate = virtio_gpu_bo_invalidate,
 578         .bo_flush = virtio_gpu_bo_flush,
 579         .resolve_format = virtio_gpu_resolve_format,
 580         .resource_info = virtio_gpu_resource_info,
 581 };