minigbm: i965: Add 64-byte padding at the end of linear buffers

According to the ISL library used now by Mesa i965 driver to manage
surfaces, linear surfaces must have 64-byte padding added at the end,
due to the way how the GPU issues cache requests.

BUG=b:63957026
TEST=./cts-tradefed run cts --skip-preconditions --skip-device-info -m
  CtsCameraTestCases -t
  android.hardware.camera2.cts.MultiViewTest#testDualTextureViewAndImageReaderPreview
  on Eve

Change-Id: I4887449a8e6e090b5ab7925b6f5c764cedd7589f
Reviewed-on: https://chromium-review.googlesource.com/582253
Commit-Ready: Tomasz Figa <tfiga@chromium.org>
Tested-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>

diff --git a/i915.c b/i915.c
index 903fc9f..c8cd1d5 100644 (file)
--- a/i915.c
+++ b/i915.c
@@ -310,6 +310,16 @@ static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32
 
        drv_bo_from_format(bo, stride, height, format);
 
+       /*
+        * Quoting Mesa ISL library:
+        *
+        *    - For linear surfaces, additional padding of 64 bytes is required at
+        *      the bottom of the surface. This is in addition to the padding
+        *      required above.
+        */
+       if (bo->tiling == I915_TILING_NONE)
+               bo->total_size += 64;
+
        memset(&gem_create, 0, sizeof(gem_create));
        gem_create.size = bo->total_size;