minigbm: Added gralloc API to internal API

Added the drv analogues of the 2 flexible formats we need to support.
Added analogues of most of the gralloc use flags, except:

GRALLOC_USAGE_SW_READ_MASK
GRALLOC_USAGE_SW_WRITE_MASK
GRALLOC_USAGE_HW_MASK
GRALLOC_USAGE_FOREIGN_BUFFERS
GRALLOC_USAGE_ALLOC_MASK

These are used as masks and don't make sense as usage hints.  In
addition, put the new flags in the drivers' supported lists and
added a flexible format query function.

BUG=chromium:616275
TEST=minigbm still builds
CQ-DEPEND=CL:371501

Change-Id: Idd2ecd6fde3e6c5caaaf3a8404d0d7db20b4ecf4
Reviewed-on: https://chromium-review.googlesource.com/372359
Commit-Ready: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>

diff --git a/drv.c b/drv.c
index cd8a9d5..90a59d5 100644 (file)
--- a/drv.c
+++ b/drv.c
@@ -373,3 +373,11 @@ uint64_t drv_bo_get_plane_format_modifier(struct bo *bo, size_t plane)
         assert(plane < bo->num_planes);
        return bo->format_modifiers[plane];
 }
+
+drv_format_t drv_resolve_format(struct driver *drv, drv_format_t format)
+{
+       if (drv->backend->resolve_format)
+               return drv->backend->resolve_format(format);
+
+       return format;
+}

diff --git a/drv.h b/drv.h
index bc2d421..6fc83cf 100644 (file)
--- a/drv.h
+++ b/drv.h
@@ -33,6 +33,24 @@ extern "C" {
 #define DRV_BO_USE_CURSOR_64X64                DRV_BO_USE_CURSOR
 #define DRV_BO_USE_RENDERING           (1ull << 2)
 #define DRV_BO_USE_LINEAR              (1ull << 3)
+#define DRV_BO_USE_SW_READ_NEVER       (1ull << 4)
+#define DRV_BO_USE_SW_READ_RARELY      (1ull << 5)
+#define DRV_BO_USE_SW_READ_OFTEN       (1ull << 6)
+#define DRV_BO_USE_SW_WRITE_NEVER      (1ull << 7)
+#define DRV_BO_USE_SW_WRITE_RARELY     (1ull << 8)
+#define DRV_BO_USE_SW_WRITE_OFTEN      (1ull << 9)
+#define DRV_BO_USE_HW_TEXTURE          (1ull << 10)
+#define DRV_BO_USE_HW_RENDER           (1ull << 11)
+#define DRV_BO_USE_HW_2D               (1ull << 12)
+#define DRV_BO_USE_HW_COMPOSER         (1ull << 13)
+#define DRV_BO_USE_HW_FB               (1ull << 14)
+#define DRV_BO_USE_EXTERNAL_DISP       (1ull << 15)
+#define DRV_BO_USE_PROTECTED           (1ull << 16)
+#define DRV_BO_USE_HW_VIDEO_ENCODE     (1ull << 17)
+#define DRV_BO_USE_HW_CAMERA_WRITE     (1ull << 18)
+#define DRV_BO_USE_HW_CAMERA_READ      (1ull << 19)
+#define DRV_BO_USE_HW_CAMERA_ZSL       (1ull << 20)
+#define DRV_BO_USE_RENDERSCRIPT                (1ull << 21)
 
 typedef enum {
        DRV_FORMAT_NONE,
@@ -97,6 +115,8 @@ typedef enum {
        DRV_FORMAT_YVU422,
        DRV_FORMAT_YUV444,
        DRV_FORMAT_YVU444,
+       DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED,
+       DRV_FORMAT_FLEX_YCbCr_420_888,
 } drv_format_t;
 
 struct driver;
@@ -184,6 +204,9 @@ drv_bo_get_plane_stride(struct bo *bo, size_t plane);
 uint64_t
 drv_bo_get_plane_format_modifier(struct bo *bo, size_t plane);
 
+drv_format_t
+drv_resolve_format(struct driver *drv, drv_format_t format);
+
 #ifdef __cplusplus
 }
 #endif

diff --git a/drv_priv.h b/drv_priv.h
index b4d1913..129d2ed 100644 (file)
--- a/drv_priv.h
+++ b/drv_priv.h
@@ -47,6 +47,7 @@ struct backend
                         drv_format_t format, uint32_t flags);
        void* (*bo_map)(struct bo *bo);
        int (*bo_destroy)(struct bo *bo);
+       drv_format_t (*resolve_format)(drv_format_t format);
        struct format_supported {
                drv_format_t format;
                uint64_t usage;

diff --git a/i915.c b/i915.c
index dea920b..4293fec 100644 (file)
--- a/i915.c
+++ b/i915.c
@@ -130,11 +130,14 @@ static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height,
        size_t size;
        int ret;
 
-       if (flags & (DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR))
+       if (flags & (DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
+                    DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN))
                tiling_mode = I915_TILING_NONE;
        else if (flags & DRV_BO_USE_SCANOUT)
                tiling_mode = I915_TILING_X;
-       else if (flags & DRV_BO_USE_RENDERING)
+       else if (flags & (DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                         DRV_BO_USE_HW_RENDER | DRV_BO_USE_SW_READ_RARELY |
+                         DRV_BO_USE_HW_2D | DRV_BO_USE_SW_WRITE_RARELY))
                tiling_mode = I915_TILING_Y;
 
        i915_align_dimensions(drv, tiling_mode, &width, &height, bpp);
@@ -201,6 +204,23 @@ static void *i915_bo_map(struct bo *bo)
                    bo->drv->fd, gem_map.offset);
 }
 
+drv_format_t i915_resolve_format(drv_format_t format)
+{
+       switch (format) {
+               case DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
+                       /*HACK: See b/28671744 */
+                       return DRV_FORMAT_XBGR8888;
+               case DRV_FORMAT_FLEX_YCbCr_420_888:
+                       /*
+                        * TODO(gurchetansingh) Implement YV12 with no tiling
+                        * on Intel. See b/29335168
+                        */
+                       return DRV_FORMAT_YVU420;
+               default:
+                       return format;
+       }
+}
+
 const struct backend backend_i915 =
 {
        .name = "i915",
@@ -209,22 +229,60 @@ const struct backend backend_i915 =
        .bo_create = i915_bo_create,
        .bo_destroy = drv_gem_bo_destroy,
        .bo_map = i915_bo_map,
+       .resolve_format = i915_resolve_format,
        .format_list = {
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_XRGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_ARGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_RGB565,   DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_UYVY,     DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_UYVY,     DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_YUYV,     DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_YUYV,     DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_R8,       DRV_BO_USE_RENDERING | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_GR88,     DRV_BO_USE_RENDERING | DRV_BO_USE_LINEAR},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_XRGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_ARGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_RGB565,   DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_UYVY,     DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_UYVY,     DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_YUYV,     DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_YUYV,     DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_R8,       DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR |
+                                     DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_GR88,     DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR |
+                                     DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
        }
 };
 

diff --git a/mediatek.c b/mediatek.c
index 8cf320d..600916d 100644 (file)
--- a/mediatek.c
+++ b/mediatek.c
@@ -67,10 +67,20 @@ const struct backend backend_mediatek =
        .bo_destroy = drv_gem_bo_destroy,
        .bo_map = mediatek_bo_map,
        .format_list = {
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
        }
 };
 

diff --git a/rockchip.c b/rockchip.c
index 82ebf34..86a425a 100644 (file)
--- a/rockchip.c
+++ b/rockchip.c
@@ -93,20 +93,49 @@ static void *rockchip_bo_map(struct bo *bo)
                    bo->drv->fd, gem_map.offset);
 }
 
+drv_format_t rockchip_resolve_format(drv_format_t format)
+{
+       switch (format) {
+               case DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
+                       /*HACK: See b/28671744 */
+                       return DRV_FORMAT_XBGR8888;
+               case DRV_FORMAT_FLEX_YCbCr_420_888:
+                       return DRV_FORMAT_NV12;
+               default:
+                       return format;
+       }
+}
+
 const struct backend backend_rockchip =
 {
        .name = "rockchip",
        .bo_create = rockchip_bo_create,
        .bo_destroy = drv_gem_bo_destroy,
        .bo_map = rockchip_bo_map,
+       .resolve_format = rockchip_resolve_format,
        .format_list = {
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_NV12, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_NV12, DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
+                                     DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
+                                     DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_RENDERING | DRV_BO_USE_HW_TEXTURE |
+                                     DRV_BO_USE_HW_RENDER | DRV_BO_USE_HW_2D |
+                                     DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_NV12,     DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING |
+                                     DRV_BO_USE_HW_TEXTURE | DRV_BO_USE_HW_RENDER |
+                                     DRV_BO_USE_HW_2D | DRV_BO_USE_SW_READ_RARELY |
+                                     DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_NV12,     DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR |
+                                     DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
        }
 };
 

diff --git a/tegra.c b/tegra.c
index 17a4cbd..cafd000 100644 (file)
--- a/tegra.c
+++ b/tegra.c
@@ -168,11 +168,21 @@ const struct backend backend_tegra =
        .bo_map = tegra_bo_map,
        .format_list = {
                /* Linear support */
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR |
+                                     DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN |
+                                     DRV_BO_USE_SW_WRITE_OFTEN},
                /* Blocklinear support */
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
+               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING |
+                                     DRV_BO_USE_HW_TEXTURE | DRV_BO_USE_HW_RENDER |
+                                     DRV_BO_USE_HW_2D | DRV_BO_USE_SW_READ_RARELY |
+                                     DRV_BO_USE_SW_WRITE_RARELY},
+               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING |
+                                     DRV_BO_USE_HW_TEXTURE | DRV_BO_USE_HW_RENDER |
+                                     DRV_BO_USE_HW_2D | DRV_BO_USE_SW_READ_RARELY |
+                                     DRV_BO_USE_SW_WRITE_RARELY},
        }
 };