minigbm: tegra: assign format modifier for block linear surface

This modifier is vendor specific field except the vendor ID. It will be
used to extract the tiling and compression information in NVIDIA EGL
driver.

BUG=chromium:478339
TEST=none

Change-Id: I9ec88b61da4a9b2d30d7d9203e86197814291a1c
Signed-off-by: Vince Hsu <vince.h@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/346366
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>

diff --git a/tegra.c b/tegra.c
index e77b4d4..69c068b 100644 (file)
--- a/tegra.c
+++ b/tegra.c
@@ -131,18 +131,9 @@ static int gbm_tegra_bo_create(struct gbm_bo *bo, uint32_t width,
                }
 
                /* Encode blocklinear parameters for EGLImage creation. */
-
-               /* XXX Bringup hack: If the highest order bit is set in
-                * EGL_DMA_BUF_PLANE0_PITCH_EXT, Nvidia driver treats it as
-                * a hint that the buffer is tiled, and the remaining bits in
-                * the pitch attribute are treated as vendor specific tiling
-                * arguments.  Using this hack means that we don't need to add
-                * a new FOURCC format, or EGL_DMA_BUF_PLANE0_TILING_EXT
-                * attribute to the dma-buf import extension.
-                */
-               bo->tiling = (1 << 31) |
-                            (kind & 0xff) |
+               bo->tiling = (kind & 0xff) |
                             ((block_height_log2 & 0xf) << 8);
+               bo->format_modifiers[0] = gbm_fourcc_mod_code(NV, bo->tiling);
        }
 
        return 0;