#if (RTL8723A_SUPPORT == 1)
static bool
CheckCondition(
- const u4Byte Condition,
- const u4Byte Hex
+ const u32 Condition,
+ const u32 Hex
)
{
- u4Byte _board = (Hex & 0x000000FF);
- u4Byte _interface = (Hex & 0x0000FF00) >> 8;
- u4Byte _platform = (Hex & 0x00FF0000) >> 16;
- u4Byte cond = Condition;
+ u32 _board = (Hex & 0x000000FF);
+ u32 _interface = (Hex & 0x0000FF00) >> 8;
+ u32 _platform = (Hex & 0x00FF0000) >> 16;
+ u32 cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
* AGC_TAB_1T.TXT
******************************************************************************/
-u4Byte Array_AGC_TAB_1T_8723A[] = {
+u32 Array_AGC_TAB_1T_8723A[] = {
0xC78, 0x7B000001,
0xC78, 0x7B010001,
0xC78, 0x7B020001,
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
- u4Byte hex = 0;
- u4Byte i = 0;
+ u32 hex = 0;
+ u32 i = 0;
u16 count = 0;
- pu4Byte ptr_array = NULL;
+ u32 * ptr_array = NULL;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
- u4Byte ArrayLen = sizeof(Array_AGC_TAB_1T_8723A)/sizeof(u4Byte);
- pu4Byte Array = Array_AGC_TAB_1T_8723A;
+ u32 ArrayLen = sizeof(Array_AGC_TAB_1T_8723A)/sizeof(u32);
+ u32 * Array = Array_AGC_TAB_1T_8723A;
hex += board;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2 )
{
- u4Byte v1 = Array[i];
- u4Byte v2 = Array[i+1];
+ u32 v1 = Array[i];
+ u32 v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
* PHY_REG_1T.TXT
******************************************************************************/
-u4Byte Array_PHY_REG_1T_8723A[] = {
+u32 Array_PHY_REG_1T_8723A[] = {
0x800, 0x80040000,
0x804, 0x00000003,
0x808, 0x0000FC00,
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
- u4Byte hex = 0;
- u4Byte i = 0;
+ u32 hex = 0;
+ u32 i = 0;
u16 count = 0;
- pu4Byte ptr_array = NULL;
+ u32 * ptr_array = NULL;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
- u4Byte ArrayLen = sizeof(Array_PHY_REG_1T_8723A)/sizeof(u4Byte);
- pu4Byte Array = Array_PHY_REG_1T_8723A;
+ u32 ArrayLen = sizeof(Array_PHY_REG_1T_8723A)/sizeof(u32);
+ u32 * Array = Array_PHY_REG_1T_8723A;
hex += board;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2 )
{
- u4Byte v1 = Array[i];
- u4Byte v2 = Array[i+1];
+ u32 v1 = Array[i];
+ u32 v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
* PHY_REG_MP.TXT
******************************************************************************/
-u4Byte Array_PHY_REG_MP_8723A[] = {
+u32 Array_PHY_REG_MP_8723A[] = {
0xC30, 0x69E9AC4A,
0xC3C, 0x0A979718,
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
- u4Byte hex = 0;
- u4Byte i = 0;
+ u32 hex = 0;
+ u32 i = 0;
u16 count = 0;
- pu4Byte ptr_array = NULL;
+ u32 * ptr_array = NULL;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
- u4Byte ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u4Byte);
- pu4Byte Array = Array_PHY_REG_MP_8723A;
+ u32 ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u32);
+ u32 * Array = Array_PHY_REG_MP_8723A;
hex += board;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2 )
{
- u4Byte v1 = Array[i];
- u4Byte v2 = Array[i+1];
+ u32 v1 = Array[i];
+ u32 v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
* PHY_REG_PG.TXT
******************************************************************************/
-u4Byte Array_PHY_REG_PG_8723A[] = {
+u32 Array_PHY_REG_PG_8723A[] = {
0xE00, 0xFFFFFFFF, 0x0A0C0C0C,
0xE04, 0xFFFFFFFF, 0x02040608,
0xE08, 0x0000FF00, 0x00000000,
PDM_ODM_T pDM_Odm
)
{
- u4Byte hex = 0;
- u4Byte i = 0;
+ u32 hex = 0;
+ u32 i = 0;
u16 count = 0;
- pu4Byte ptr_array = NULL;
+ u32 * ptr_array = NULL;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
- u4Byte ArrayLen = sizeof(Array_PHY_REG_PG_8723A)/sizeof(u4Byte);
- pu4Byte Array = Array_PHY_REG_PG_8723A;
+ u32 ArrayLen = sizeof(Array_PHY_REG_PG_8723A)/sizeof(u32);
+ u32 * Array = Array_PHY_REG_PG_8723A;
hex += board;
hex += interfaceValue << 8;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 3 )
{
- u4Byte v1 = Array[i];
- u4Byte v2 = Array[i+1];
- u4Byte v3 = Array[i+2];
+ u32 v1 = Array[i];
+ u32 v2 = Array[i+1];
+ u32 v3 = Array[i+2];
// this line is a line of pure_body
if ( v1 < 0xCDCDCDCD )
#if (RTL8723A_SUPPORT == 1)
static bool
CheckCondition(
- const u4Byte Condition,
- const u4Byte Hex
+ const u32 Condition,
+ const u32 Hex
)
{
- u4Byte _board = (Hex & 0x000000FF);
- u4Byte _interface = (Hex & 0x0000FF00) >> 8;
- u4Byte _platform = (Hex & 0x00FF0000) >> 16;
- u4Byte cond = Condition;
+ u32 _board = (Hex & 0x000000FF);
+ u32 _interface = (Hex & 0x0000FF00) >> 8;
+ u32 _platform = (Hex & 0x00FF0000) >> 16;
+ u32 cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
* MAC_REG.TXT
******************************************************************************/
-u4Byte Array_MAC_REG_8723A[] = {
+u32 Array_MAC_REG_8723A[] = {
0x420, 0x00000080,
0x423, 0x00000000,
0x430, 0x00000000,
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
- u4Byte hex = 0;
- u4Byte i = 0;
+ u32 hex = 0;
+ u32 i = 0;
u16 count = 0;
- pu4Byte ptr_array = NULL;
+ u32 * ptr_array = NULL;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
- u4Byte ArrayLen = sizeof(Array_MAC_REG_8723A)/sizeof(u4Byte);
- pu4Byte Array = Array_MAC_REG_8723A;
+ u32 ArrayLen = sizeof(Array_MAC_REG_8723A)/sizeof(u32);
+ u32 * Array = Array_MAC_REG_8723A;
hex += board;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2 )
{
- u4Byte v1 = Array[i];
- u4Byte v2 = Array[i+1];
+ u32 v1 = Array[i];
+ u32 v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
#if (RTL8723A_SUPPORT == 1)
static bool
CheckCondition(
- const u4Byte Condition,
- const u4Byte Hex
+ const u32 Condition,
+ const u32 Hex
)
{
- u4Byte _board = (Hex & 0x000000FF);
- u4Byte _interface = (Hex & 0x0000FF00) >> 8;
- u4Byte _platform = (Hex & 0x00FF0000) >> 16;
- u4Byte cond = Condition;
+ u32 _board = (Hex & 0x000000FF);
+ u32 _interface = (Hex & 0x0000FF00) >> 8;
+ u32 _platform = (Hex & 0x00FF0000) >> 16;
+ u32 cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
* RadioA_1T.TXT
******************************************************************************/
-u4Byte Array_RadioA_1T_8723A[] = {
+u32 Array_RadioA_1T_8723A[] = {
0x000, 0x00030159,
0x001, 0x00031284,
0x002, 0x00098000,
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
- u4Byte hex = 0;
- u4Byte i = 0;
+ u32 hex = 0;
+ u32 i = 0;
u16 count = 0;
- pu4Byte ptr_array = NULL;
+ u32 * ptr_array = NULL;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
- u4Byte ArrayLen = sizeof(Array_RadioA_1T_8723A)/sizeof(u4Byte);
- pu4Byte Array = Array_RadioA_1T_8723A;
+ u32 ArrayLen = sizeof(Array_RadioA_1T_8723A)/sizeof(u32);
+ u32 * Array = Array_RadioA_1T_8723A;
hex += board;
for (i = 0; i < ArrayLen; i += 2 )
{
- u4Byte v1 = Array[i];
- u4Byte v2 = Array[i+1];
+ u32 v1 = Array[i];
+ u32 v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
//avoid to warn in FreeBSD ==> To DO modify
-u4Byte EDCAParam[HT_IOT_PEER_MAX][3] =
+u32 EDCAParam[HT_IOT_PEER_MAX][3] =
{ // UL DL
{0x5ea42b, 0x5ea42b, 0x5ea42b}, //0:unknown AP
{0xa44f, 0x5ea44f, 0x5e431c}, // 1:realtek AP
//============================================================
// Global var
//============================================================
-u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
+u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
0x7f8001fe, // 0, +6.0dB
0x788001e2, // 1, +5.5dB
0x71c001c7, // 2, +5.0dB
bool
odm_StaDefAntSel(
PDM_ODM_T pDM_Odm,
- u4Byte OFDM_Ant1_Cnt,
- u4Byte OFDM_Ant2_Cnt,
- u4Byte CCK_Ant1_Cnt,
- u4Byte CCK_Ant2_Cnt,
+ u32 OFDM_Ant1_Cnt,
+ u32 OFDM_Ant2_Cnt,
+ u32 CCK_Ant1_Cnt,
+ u32 CCK_Ant2_Cnt,
u8 *pDefAnt
);
ODM_CmnInfoInit(
PDM_ODM_T pDM_Odm,
ODM_CMNINFO_E CmnInfo,
- u4Byte Value
+ u32 Value
)
{
//ODM_RT_TRACE(pDM_Odm,);
// Fixed ODM value.
//
case ODM_CMNINFO_ABILITY:
- pDM_Odm->SupportAbility = (u4Byte)Value;
+ pDM_Odm->SupportAbility = (u32)Value;
break;
case ODM_CMNINFO_PLATFORM:
pDM_Odm->SupportPlatform = (u8)Value;
void
ODM_CmnInfoUpdate(
PDM_ODM_T pDM_Odm,
- u4Byte CmnInfo,
+ u32 CmnInfo,
u8Byte Value
)
{
switch (CmnInfo)
{
case ODM_CMNINFO_ABILITY:
- pDM_Odm->SupportAbility = (u4Byte)Value;
+ pDM_Odm->SupportAbility = (u32)Value;
break;
case ODM_CMNINFO_RF_TYPE:
break;
case ODM_CMNINFO_DBG_LEVEL:
- pDM_Odm->DebugLevel = (u4Byte)Value;
+ pDM_Odm->DebugLevel = (u32)Value;
break;
case ODM_CMNINFO_RA_THRESHOLD_HIGH:
pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value;
PDM_ODM_T pDM_Odm
)
{
- u4Byte i;
+ u32 i;
u8 RSSI_Min = 0xFF;
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
PDM_ODM_T pDM_Odm
)
{
- u4Byte i;
+ u32 i;
bool Linked = FALSE;
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
void
ODM_ChangeDynamicInitGainThresh(
PDM_ODM_T pDM_Odm,
- u4Byte DM_Type,
- u4Byte DM_Value
+ u32 DM_Type,
+ u32 DM_Value
)
{
pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
PDM_ODM_T pDM_Odm
)
{
- u4Byte ret_value;
+ u32 ret_value;
PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
pOdmRA->LowRSSIThresh = 20;
}
-u4Byte ODM_Get_Rate_Bitmap(
+u32 ODM_Get_Rate_Bitmap(
PDM_ODM_T pDM_Odm,
- u4Byte macid,
- u4Byte ra_mask,
+ u32 macid,
+ u32 ra_mask,
u8 rssi_level)
{
PSTA_INFO_T pEntry;
- u4Byte rate_bitmap = 0x0fffffff;
+ u32 rate_bitmap = 0x0fffffff;
u8 WirelessMode;
//u8 WirelessMode =*(pDM_Odm->pWirelessMode);
)
{
u8 index;
- u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
- u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for(index = 0; index< 6; index++)
rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]);
{
u8 index;
- u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
+ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
for(index = 0; index< 6; index++)
//PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value);
bool
odm_StaDefAntSel(
PDM_ODM_T pDM_Odm,
- u4Byte OFDM_Ant1_Cnt,
- u4Byte OFDM_Ant2_Cnt,
- u4Byte CCK_Ant1_Cnt,
- u4Byte CCK_Ant2_Cnt,
+ u32 OFDM_Ant1_Cnt,
+ u32 OFDM_Ant2_Cnt,
+ u32 CCK_Ant1_Cnt,
+ u32 CCK_Ant2_Cnt,
u8 *pDefAnt
)
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("TxAnt = %s\n",((*pDefAnt)==1)?"Ant1":"Ant2"));
#endif
- //u4Byte antsel = ODM_GetBBReg(pDM_Odm, 0xc88, bMaskByte0);
+ //u32 antsel = ODM_GetBBReg(pDM_Odm, 0xc88, bMaskByte0);
//(*pDefAnt)= (u8) antsel;
ODM_AntselStatistics_88C(
PDM_ODM_T pDM_Odm,
u8 MacId,
- u4Byte PWDBAll,
+ u32 PWDBAll,
bool isCCKrate
)
{
)
{
SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
- u4Byte RSSI_Min=0xFF, RSSI, RSSI_Ant1, RSSI_Ant2;
+ u32 RSSI_Min=0xFF, RSSI, RSSI_Ant1, RSSI_Ant2;
u8 RxIdleAnt, i;
bool bRet=FALSE;
PSTA_INFO_T pEntry;
// need to ODM CE Platform
//move to here for ANT detection mechanism using
-u4Byte
+u32
GetPSDData(
PDM_ODM_T pDM_Odm,
unsigned int point,
{
//unsigned int val, rfval;
//int psd_report;
- u4Byte psd_report;
+ u32 psd_report;
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
//Debug Message
psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;
#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX))
- psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c);
+ psd_report = (u32) (ConvertTo_dB(psd_report))+(u32)(initial_gain_psd-0x1c);
#else
psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c);
#endif
}
-u4Byte
+u32
ConvertTo_dB(
- u4Byte Value)
+ u32 Value)
{
u8 i;
u8 j;
- u4Byte dB;
+ u32 dB;
Value = Value & 0xFFFF;
void
odm_PHY_SaveAFERegisters(
PDM_ODM_T pDM_Odm,
- pu4Byte AFEReg,
- pu4Byte AFEBackup,
- u4Byte RegisterNum
+ u32 * AFEReg,
+ u32 * AFEBackup,
+ u32 RegisterNum
)
{
- u4Byte i;
+ u32 i;
//RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
for( i = 0 ; i < RegisterNum ; i++){
void
odm_PHY_ReloadAFERegisters(
PDM_ODM_T pDM_Odm,
- pu4Byte AFEReg,
- pu4Byte AFEBackup,
- u4Byte RegiesterNum
+ u32 * AFEReg,
+ u32 * AFEBackup,
+ u32 RegiesterNum
)
{
- u4Byte i;
+ u32 i;
//RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
for(i = 0 ; i < RegiesterNum; i++)
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
//PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
- u4Byte CurrentChannel,RfLoopReg;
+ u32 CurrentChannel,RfLoopReg;
u8 n;
- u4Byte Reg88c, Regc08, Reg874, Regc50;
+ u32 Reg88c, Regc08, Reg874, Regc50;
u8 initial_gain = 0x5a;
- u4Byte PSD_report_tmp;
- u4Byte AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0;
+ u32 PSD_report_tmp;
+ u32 AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0;
bool bResult = TRUE;
- u4Byte AFE_Backup[16];
- u4Byte AFE_REG_8723A[16] = {
+ u32 AFE_Backup[16];
+ u32 AFE_REG_8723A[16] = {
rRx_Wait_CCA, rTx_CCK_RFON,
rTx_CCK_BBON, rTx_OFDM_RFON,
rTx_OFDM_BBON, rTx_To_Rx,
s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;
u8 isCCKrate=0;
u8 RSSI_max, RSSI_min, i;
- u4Byte OFDM_pkt=0;
- u4Byte Weighting=0;
+ u32 OFDM_pkt=0;
+ u32 Weighting=0;
PSTA_INFO_T pEntry;
if(pPktinfo->StationID == 0xFF)
}
else
{
- if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)
+ if(pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM)
{
UndecoratedSmoothedOFDM =
( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
}
else
{
- if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)
+ if(pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK)
{
UndecoratedSmoothedCCK =
( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
void
odm_ConfigRFReg_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Data,
+ u32 Addr,
+ u32 Data,
ODM_RF_RADIO_PATH_E RF_PATH,
- u4Byte RegAddr
+ u32 RegAddr
)
{
if(Addr == 0xfe)
void
odm_ConfigRF_RadioA_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Data
+ u32 Addr,
+ u32 Data
)
{
- u4Byte content = 0x1000; // RF_Content: radioa_txt
- u4Byte maskforPhySet= (u4Byte)(content&0xE000);
+ u32 content = 0x1000; // RF_Content: radioa_txt
+ u32 maskforPhySet= (u32)(content&0xE000);
odm_ConfigRFReg_8723A(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet);
void
odm_ConfigRF_RadioB_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Data
+ u32 Addr,
+ u32 Data
)
{
- u4Byte content = 0x1001; // RF_Content: radiob_txt
- u4Byte maskforPhySet= (u4Byte)(content&0xE000);
+ u32 content = 0x1001; // RF_Content: radiob_txt
+ u32 maskforPhySet= (u32)(content&0xE000);
odm_ConfigRFReg_8723A(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet);
void
odm_ConfigMAC_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
+ u32 Addr,
u8 Data
)
{
void
odm_ConfigBB_AGC_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Bitmask,
- u4Byte Data
+ u32 Addr,
+ u32 Bitmask,
+ u32 Data
)
{
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
void
odm_ConfigBB_PHY_REG_PG_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Bitmask,
- u4Byte Data
+ u32 Addr,
+ u32 Bitmask,
+ u32 Data
)
{
if (Addr == 0xfe)
void
odm_ConfigBB_PHY_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Bitmask,
- u4Byte Data
+ u32 Addr,
+ u32 Bitmask,
+ u32 Data
)
{
if (Addr == 0xfe)
pDM_Odm->DebugComponents = 0;
}
-u4Byte GlobalDebugLevel;
+u32 GlobalDebugLevel;
u8
ODM_Read1Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr
+ u32 RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
u16
ODM_Read2Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr
+ u32 RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
}
-u4Byte
+u32
ODM_Read4Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr
+ u32 RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
void
ODM_Write1Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
+ u32 RegAddr,
u8 Data
)
{
void
ODM_Write2Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
+ u32 RegAddr,
u16 Data
)
{
void
ODM_Write4Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte Data
+ u32 RegAddr,
+ u32 Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
void
ODM_SetMACReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask,
- u4Byte Data
+ u32 RegAddr,
+ u32 BitMask,
+ u32 Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
}
-u4Byte
+u32
ODM_GetMACReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask
+ u32 RegAddr,
+ u32 BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
void
ODM_SetBBReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask,
- u4Byte Data
+ u32 RegAddr,
+ u32 BitMask,
+ u32 Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
}
-u4Byte
+u32
ODM_GetBBReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask
+ u32 RegAddr,
+ u32 BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
ODM_SetRFReg(
PDM_ODM_T pDM_Odm,
ODM_RF_RADIO_PATH_E eRFPath,
- u4Byte RegAddr,
- u4Byte BitMask,
- u4Byte Data
+ u32 RegAddr,
+ u32 BitMask,
+ u32 Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
}
-u4Byte
+u32
ODM_GetRFReg(
PDM_ODM_T pDM_Odm,
ODM_RF_RADIO_PATH_E eRFPath,
- u4Byte RegAddr,
- u4Byte BitMask
+ u32 RegAddr,
+ u32 BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
ODM_AllocateMemory(
PDM_ODM_T pDM_Odm,
void * *pPtr,
- u4Byte length
+ u32 length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
ODM_FreeMemory(
PDM_ODM_T pDM_Odm,
void * pPtr,
- u4Byte length
+ u32 length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
//
void
ODM_StallExecution(
- u4Byte usDelay
+ u32 usDelay
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
}
void
-ODM_delay_ms(u4Byte ms)
+ODM_delay_ms(u32 ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_ms(ms);
}
void
-ODM_delay_us(u4Byte us)
+ODM_delay_us(u32 us)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_us(us);
}
void
-ODM_sleep_ms(u4Byte ms)
+ODM_sleep_ms(u32 ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
}
void
-ODM_sleep_us(u4Byte us)
+ODM_sleep_us(u32 us)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
ODM_SetTimer(
PDM_ODM_T pDM_Odm,
PRT_TIMER pTimer,
- u4Byte msDelay
+ u32 msDelay
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
ODM_FillH2CCmd(
PADAPTER Adapter,
u8 ElementID,
- u4Byte CmdLen,
+ u32 CmdLen,
u8 * pCmdBuffer
)
{
}
}
#else
-u4Byte
+u32
ODM_FillH2CCmd(
u8 * pH2CBuffer,
- u4Byte H2CBufferLen,
- u4Byte CmdNum,
- pu4Byte pElementID,
- pu4Byte pCmdLen,
+ u32 H2CBufferLen,
+ u32 CmdNum,
+ u32 * pElementID,
+ u32 * pCmdLen,
u8 ** pCmbBuffer,
u8 * CmdStartSeq
)
u32 BTDM_BtTxRxCounterL( PADAPTER padapter )
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
- u4Byte counters=0;
+ u32 counters=0;
counters = pHalData->bt_coexist.halCoex8723.lowPriorityTx+
pHalData->bt_coexist.halCoex8723.lowPriorityRx ;
* OverView: Get shifted position of the BitMask
*
* Input:
-* u4Byte BitMask,
+* u32 BitMask,
*
* Output: none
-* Return: u4Byte Return the shift bit bit position of the mask
+* Return: u32 Return the shift bit bit position of the mask
*/
static u32
phy_CalculateBitShift(
*
* Input:
* PADAPTER Adapter,
-* u4Byte RegAddr, //The target address to be readback
-* u4Byte BitMask //The target bit position in the target address
+* u32 RegAddr, //The target address to be readback
+* u32 BitMask //The target bit position in the target address
* //to be readback
* Output: None
-* Return: u4Byte Data //The readback register value
+* Return: u32 Data //The readback register value
* Note: This function is equal to "GetRegSetting" in PHY programming guide
*/
u32
*
* Input:
* PADAPTER Adapter,
-* u4Byte RegAddr, //The target address to be modified
-* u4Byte BitMask //The target bit position in the target address
+* u32 RegAddr, //The target address to be modified
+* u32 BitMask //The target bit position in the target address
* //to be modified
-* u4Byte Data //The new register value in the target bit position
+* u32 Data //The new register value in the target bit position
* //of the target address
*
* Output: None
* Input:
* PADAPTER Adapter,
* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D
-* u4Byte Offset, //The target address to be read
+* u32 Offset, //The target address to be read
*
* Output: None
-* Return: u4Byte reback value
+* Return: u32 reback value
* Note: Threre are three types of serial operations:
* 1. Software serial write
* 2. Hardware LSSI-Low Speed Serial Interface
* Input:
* PADAPTER Adapter,
* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D
-* u4Byte Offset, //The target address to be read
-* u4Byte Data //The new register Data in the target bit position
+* u32 Offset, //The target address to be read
+* u32 Data //The new register Data in the target bit position
* //of the target to be read
*
* Output: None
* Input:
* PADAPTER Adapter,
* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D
-* u4Byte RegAddr, //The target address to be read
-* u4Byte BitMask //The target bit position in the target address
+* u32 RegAddr, //The target address to be read
+* u32 BitMask //The target bit position in the target address
* //to be read
*
* Output: None
-* Return: u4Byte Readback value
+* Return: u32 Readback value
* Note: This function is equal to "GetRFRegSetting" in PHY programming guide
*/
u32
* Input:
* PADAPTER Adapter,
* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D
-* u4Byte RegAddr, //The target address to be modified
-* u4Byte BitMask //The target bit position in the target address
+* u32 RegAddr, //The target address to be modified
+* u32 BitMask //The target bit position in the target address
* //to be modified
-* u4Byte Data //The new register Data in the target bit position
+* u32 Data //The new register Data in the target bit position
* //of the target address
*
* Output: None
//return;
// Added it for 20/40 mhz switch time evaluation by guangan 070531
- //u4Byte NowL, NowH;
+ //u32 NowL, NowH;
//u8Byte BeginTime, EndTime;
/*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \
}
// TODO: Error recovery for this case
- //RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber));
+ //RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u32)NumOutPipe, (u32)pHalData->OutEpNumber));
}
PADAPTER Adapter
)
{
- //u4Byte value32;
+ //u32 value32;
//u16 value16;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
// RT_PRINT_DATA(COMP_RECV, DBG_LOUD, ("InterruptRecognized8723AU Interrupt buffer \n"), buffer, MAX_RECEIVE_INTERRUPT_BUFFER_SIZE(Adapter));
memcpy(&(pHalData->IntArray[0]), &(buffer[USB_INTR_CONTENT_HISR_OFFSET]), 4);
-// PlatformMoveMemory(&(pHalData->IntArray[0]), &(buffer[USB_INTR_CONTENT_HISR_OFFSET]), sizeof(u4Byte));
+// PlatformMoveMemory(&(pHalData->IntArray[0]), &(buffer[USB_INTR_CONTENT_HISR_OFFSET]), sizeof(u32));
// DBG_8723A("InterruptRecognized8723AU HISR = 0x%x HIMR = 0x%x\n", pHalData->IntArray[0],pHalData->IntrMask[0]);
pHalData->IntArray[0] &= pHalData->IntrMask[0];
//For HISR extension. Added by tynli. 2009.10.07.
memcpy(&(pHalData->IntArray[1]), &(buffer[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
-// PlatformMoveMemory(&(pHalData->IntArray[1]), &(buffer[USB_INTR_CONTENT_HISRE_OFFSET]), sizeof(u4Byte));
+// PlatformMoveMemory(&(pHalData->IntArray[1]), &(buffer[USB_INTR_CONTENT_HISRE_OFFSET]), sizeof(u32));
// DBG_8723A("InterruptRecognized8192CUsb HISRE = 0x%x HIMRE = 0x%x\n", pHalData->IntArray[1], pHalData->IntrMask[1]);
pHalData->IntArray[1] &= pHalData->IntrMask[1];
ODM_ReadFirmware_8723A_rtl8723fw_B(
PDM_ODM_T pDM_Odm,
u8 *pFirmware,
- u4Byte *pFirmwareSize
+ u32 *pFirmwareSize
);
#endif
int RssiLowThresh;
int RssiHighThresh;
- u4Byte FALowThresh;
- u4Byte FAHighThresh;
+ u32 FALowThresh;
+ u32 FAHighThresh;
u8 CurSTAConnectState;
u8 PreSTAConnectState;
u8 LargeFAHit;
u8 ForbiddenIGI;
- u4Byte Recover_cnt;
+ u32 Recover_cnt;
u8 DIG_Dynamic_MIN_0;
u8 DIG_Dynamic_MIN_1;
bool bMediaConnect_0;
bool bMediaConnect_1;
- u4Byte AntDiv_RSSI_max;
- u4Byte RSSI_max;
+ u32 AntDiv_RSSI_max;
+ u32 RSSI_max;
}DIG_T,*pDIG_T;
typedef struct _Dynamic_Power_Saving_
int Rssi_val_min;
u8 initialize;
- u4Byte Reg874,RegC70,Reg85C,RegA74;
+ u32 Reg874,RegC70,Reg85C,RegA74;
}PS_T,*pPS_T;
typedef struct _FALSE_ALARM_STATISTICS{
- u4Byte Cnt_Parity_Fail;
- u4Byte Cnt_Rate_Illegal;
- u4Byte Cnt_Crc8_fail;
- u4Byte Cnt_Mcs_fail;
- u4Byte Cnt_Ofdm_fail;
- u4Byte Cnt_Cck_fail;
- u4Byte Cnt_all;
- u4Byte Cnt_Fast_Fsync;
- u4Byte Cnt_SB_Search_fail;
- u4Byte Cnt_OFDM_CCA;
- u4Byte Cnt_CCK_CCA;
- u4Byte Cnt_CCA_all;
- u4Byte Cnt_BW_USC; //Gary
- u4Byte Cnt_BW_LSC; //Gary
+ u32 Cnt_Parity_Fail;
+ u32 Cnt_Rate_Illegal;
+ u32 Cnt_Crc8_fail;
+ u32 Cnt_Mcs_fail;
+ u32 Cnt_Ofdm_fail;
+ u32 Cnt_Cck_fail;
+ u32 Cnt_all;
+ u32 Cnt_Fast_Fsync;
+ u32 Cnt_SB_Search_fail;
+ u32 Cnt_OFDM_CCA;
+ u32 Cnt_CCK_CCA;
+ u32 Cnt_CCA_all;
+ u32 Cnt_BW_USC; //Gary
+ u32 Cnt_BW_LSC; //Gary
}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
typedef struct _Dynamic_Primary_CCA{
// Before link Antenna Switch check
u8 SWAS_NoLink_State;
- u4Byte SWAS_NoLink_BK_Reg860;
+ u32 SWAS_NoLink_BK_Reg860;
bool ANTA_ON; //To indicate Ant A is or not
bool ANTB_ON; //To indicate Ant B is on or not
*/
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
//Hybrid Antenna Diversity
- u4Byte CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
- u4Byte CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
- u4Byte OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
- u4Byte OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
- u4Byte RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM];
- u4Byte RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM];
+ u32 CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
+ u32 CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
+ u32 OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
+ u32 OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
+ u32 RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM];
+ u32 RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM];
u8 TxAnt[ASSOCIATE_ENTRY_NUM];
u8 TargetSTA;
u8 antsel;
{
bool bCurrentTurboEDCA;
bool bIsCurRDLState;
- u4Byte prv_traffic_idx; // edca turbo
+ u32 prv_traffic_idx; // edca turbo
}EDCA_T,*pEDCA_T;
u8 HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH
u8 LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW
u8 RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW
- u4Byte LastRATR; // RATR Register Content
+ u32 LastRATR; // RATR Register Content
} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE;
ODM_CMNINFO_LINK,
ODM_CMNINFO_RSSI_MIN,
ODM_CMNINFO_DBG_COMP, // u8Byte
- ODM_CMNINFO_DBG_LEVEL, // u4Byte
+ ODM_CMNINFO_DBG_LEVEL, // u32
ODM_CMNINFO_RA_THRESHOLD_HIGH, // u8
ODM_CMNINFO_RA_THRESHOLD_LOW, // u8
ODM_CMNINFO_RF_ANTENNA_TYPE, // u8
typedef struct _ODM_RA_Info_
{
u8 RateID;
- u4Byte RateMask;
- u4Byte RAUseRate;
+ u32 RateMask;
+ u32 RAUseRate;
u8 RateSGI;
u8 RssiStaRA;
u8 PreRssiStaRA;
u8 PreRate;
u8 HighestRate;
u8 LowestRate;
- u4Byte NscUp;
- u4Byte NscDown;
+ u32 NscUp;
+ u32 NscDown;
u16 RTY[5];
- u4Byte TOTAL;
+ u32 TOTAL;
u16 DROP;
u8 Active;
u16 RptTime;
{
//for tx power tracking
- u4Byte RegA24; // for TempCCK
+ u32 RegA24; // for TempCCK
s4Byte RegE94;
s4Byte RegE9C;
s4Byte RegEB4;
bool bReloadtxpowerindex;
u8 bRfPiEnable;
- u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug
+ u32 TXPowerTrackingCallbackCnt; //cosa add for debug
u8 bCCKinCH14;
u8 CCK_index;
u8 Delta_LCK;
//for IQK
- u4Byte RegC04;
- u4Byte Reg874;
- u4Byte RegC08;
- u4Byte RegB68;
- u4Byte RegB6C;
- u4Byte Reg870;
- u4Byte Reg860;
- u4Byte Reg864;
+ u32 RegC04;
+ u32 Reg874;
+ u32 RegC08;
+ u32 RegB68;
+ u32 RegB6C;
+ u32 Reg870;
+ u32 Reg860;
+ u32 Reg864;
bool bIQKInitialized;
bool bLCKInProgress;
bool bAntennaDetected;
- u4Byte ADDA_backup[IQK_ADDA_REG_NUM];
- u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM];
- u4Byte IQK_BB_backup_recover[9];
- u4Byte IQK_BB_backup[IQK_BB_REG_NUM];
+ u32 ADDA_backup[IQK_ADDA_REG_NUM];
+ u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
+ u32 IQK_BB_backup_recover[9];
+ u32 IQK_BB_backup[IQK_BB_REG_NUM];
//for APK
- u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a
+ u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a
u8 bAPKdone;
u8 bAPKThermalMeterIgnore;
u8 bDPdone;
u8 antsel_rx_keep_0;
u8 antsel_rx_keep_1;
u8 antsel_rx_keep_2;
- u4Byte antSumRSSI[7];
- u4Byte antRSSIcnt[7];
- u4Byte antAveRSSI[7];
+ u32 antSumRSSI[7];
+ u32 antRSSIcnt[7];
+ u32 antAveRSSI[7];
u8 FAT_State;
- u4Byte TrainIdx;
+ u32 TrainIdx;
u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
- u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
- u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
- u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
+ u32 MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
+ u32 AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
+ u32 MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
+ u32 AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
u8 RxIdleAnt;
bool bBecomeLinked;
rtl8192cd_priv fake_priv;
u8Byte DebugComponents;
- u4Byte DebugLevel;
+ u32 DebugLevel;
//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------//
bool bCckHighPower;
// ODM Platform info AP/ADSL/CE/MP = 1/2/3/4
u8 SupportPlatform;
// ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K
- u4Byte SupportAbility;
+ u32 SupportAbility;
// ODM PCIE/USB/SDIO/GSPI = 0/1/2/3
u8 SupportInterface;
// ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/...
- u4Byte SupportICType;
+ u32 SupportICType;
// Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/...
u8 CutVersion;
// Fab Version TSMC/UMC = 0/1
bool bWIFITest;
bool bDualMacSmartConcurrent;
- u4Byte BK_SupportAbility;
+ u32 BK_SupportAbility;
u8 AntDivType;
//-----------HOOK BEFORE REG INIT-----------//
//#endif
EDCA_T DM_EDCA_Table;
- u4Byte WMMEDCA_BE;
+ u32 WMMEDCA_BE;
// Copy from SD4 structure
//
// ==================================================
#define OFDM_TABLE_SIZE_92D 43
#define CCK_TABLE_SIZE 33
-extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D];
+extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D];
extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
PODM_PHY_INFO_T pPhyInfo
);
-u4Byte ConvertTo_dB(u4Byte Value);
+u32 ConvertTo_dB(u32 Value);
-u4Byte
+u32
GetPSDData(
PDM_ODM_T pDM_Odm,
unsigned int point,
PDM_ODM_T pDM_Odm
);
-u4Byte ODM_Get_Rate_Bitmap(
+u32 ODM_Get_Rate_Bitmap(
PDM_ODM_T pDM_Odm,
- u4Byte macid,
- u4Byte ra_mask,
+ u32 macid,
+ u32 ra_mask,
u8 rssi_level);
ODM_CmnInfoInit(
PDM_ODM_T pDM_Odm,
ODM_CMNINFO_E CmnInfo,
- u4Byte Value
+ u32 Value
);
void
void
ODM_CmnInfoUpdate(
PDM_ODM_T pDM_Odm,
- u4Byte CmnInfo,
+ u32 CmnInfo,
u8Byte Value
);
ODM_AntselStatistics_88C(
PDM_ODM_T pDM_Odm,
u8 MacId,
- u4Byte PWDBAll,
+ u32 PWDBAll,
bool isCCKrate
);
void
odm_ConfigRFReg_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Data,
+ u32 Addr,
+ u32 Data,
ODM_RF_RADIO_PATH_E RF_PATH,
- u4Byte RegAddr
+ u32 RegAddr
);
void
odm_ConfigRF_RadioA_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Data
+ u32 Addr,
+ u32 Data
);
void
odm_ConfigRF_RadioB_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Data
+ u32 Addr,
+ u32 Data
);
void
odm_ConfigMAC_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
+ u32 Addr,
u8 Data
);
void
odm_ConfigBB_AGC_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Bitmask,
- u4Byte Data
+ u32 Addr,
+ u32 Bitmask,
+ u32 Data
);
void
odm_ConfigBB_PHY_REG_PG_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Bitmask,
- u4Byte Data
+ u32 Addr,
+ u32 Bitmask,
+ u32 Data
);
void
odm_ConfigBB_PHY_8723A(
PDM_ODM_T pDM_Odm,
- u4Byte Addr,
- u4Byte Bitmask,
- u4Byte Data
+ u32 Addr,
+ u32 Bitmask,
+ u32 Data
);
#endif
#endif // end of SUPPORT
u8
ODM_Read1Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr
+ u32 RegAddr
);
u16
ODM_Read2Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr
+ u32 RegAddr
);
-u4Byte
+u32
ODM_Read4Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr
+ u32 RegAddr
);
void
ODM_Write1Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
+ u32 RegAddr,
u8 Data
);
void
ODM_Write2Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
+ u32 RegAddr,
u16 Data
);
void
ODM_Write4Byte(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte Data
+ u32 RegAddr,
+ u32 Data
);
void
ODM_SetMACReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask,
- u4Byte Data
+ u32 RegAddr,
+ u32 BitMask,
+ u32 Data
);
-u4Byte
+u32
ODM_GetMACReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask
+ u32 RegAddr,
+ u32 BitMask
);
void
ODM_SetBBReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask,
- u4Byte Data
+ u32 RegAddr,
+ u32 BitMask,
+ u32 Data
);
-u4Byte
+u32
ODM_GetBBReg(
PDM_ODM_T pDM_Odm,
- u4Byte RegAddr,
- u4Byte BitMask
+ u32 RegAddr,
+ u32 BitMask
);
void
ODM_SetRFReg(
PDM_ODM_T pDM_Odm,
ODM_RF_RADIO_PATH_E eRFPath,
- u4Byte RegAddr,
- u4Byte BitMask,
- u4Byte Data
+ u32 RegAddr,
+ u32 BitMask,
+ u32 Data
);
-u4Byte
+u32
ODM_GetRFReg(
PDM_ODM_T pDM_Odm,
ODM_RF_RADIO_PATH_E eRFPath,
- u4Byte RegAddr,
- u4Byte BitMask
+ u32 RegAddr,
+ u32 BitMask
);
ODM_AllocateMemory(
PDM_ODM_T pDM_Odm,
void * *pPtr,
- u4Byte length
+ u32 length
);
void
ODM_FreeMemory(
PDM_ODM_T pDM_Odm,
void * pPtr,
- u4Byte length
+ u32 length
);
s4Byte ODM_CompareMemory(
PDM_ODM_T pDM_Odm,
void * pBuf1,
void * pBuf2,
- u4Byte length
+ u32 length
);
//
//
void
ODM_StallExecution(
- u4Byte usDelay
+ u32 usDelay
);
void
-ODM_delay_ms(u4Byte ms);
+ODM_delay_ms(u32 ms);
void
-ODM_delay_us(u4Byte us);
+ODM_delay_us(u32 us);
void
-ODM_sleep_ms(u4Byte ms);
+ODM_sleep_ms(u32 ms);
void
-ODM_sleep_us(u4Byte us);
+ODM_sleep_us(u32 us);
void
ODM_SetTimer(
PDM_ODM_T pDM_Odm,
PRT_TIMER pTimer,
- u4Byte msDelay
+ u32 msDelay
);
void
ODM_FillH2CCmd(
PADAPTER Adapter,
u8 ElementID,
- u4Byte CmdLen,
+ u32 CmdLen,
u8 * pCmdBuffer
);
#else
-u4Byte
+u32
ODM_FillH2CCmd(
u8 * pH2CBuffer,
- u4Byte H2CBufferLen,
- u4Byte CmdNum,
- pu4Byte pElementID,
- pu4Byte pCmdLen,
+ u32 H2CBufferLen,
+ u32 CmdNum,
+ u32 * pElementID,
+ u32 * pCmdLen,
u8 ** pCmbBuffer,
u8 * CmdStartSeq
);
#include <basic_types.h>
- #define u4Byte u32
- #define pu4Byte u32*
-
#define u8Byte u64
#define pu8Byte u64*
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