src/Pipeline/SpirvShader.hpp

   1 // Copyright 2018 The SwiftShader Authors. All Rights Reserved.
   2 //
   3 // Licensed under the Apache License, Version 2.0 (the "License");
   4 // you may not use this file except in compliance with the License.
   5 // You may obtain a copy of the License at
   6 //
   7 //    http://www.apache.org/licenses/LICENSE-2.0
   8 //
   9 // Unless required by applicable law or agreed to in writing, software
  10 // distributed under the License is distributed on an "AS IS" BASIS,
  11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12 // See the License for the specific language governing permissions and
  13 // limitations under the License.
  14
  15 #ifndef sw_SpirvShader_hpp
  16 #define sw_SpirvShader_hpp
  17
  18 #include "ShaderCore.hpp"
  19 #include "SpirvID.hpp"
  20 #include "System/Types.hpp"
  21 #include "Vulkan/VkDebug.hpp"
  22 #include "Vulkan/VkConfig.h"
  23 #include "Device/Config.hpp"
  24
  25 #include <spirv/unified1/spirv.hpp>
  26
  27 #include <array>
  28 #include <cstring>
  29 #include <functional>
  30 #include <string>
  31 #include <vector>
  32 #include <unordered_set>
  33 #include <unordered_map>
  34 #include <cstdint>
  35 #include <type_traits>
  36 #include <memory>
  37 #include <queue>
  38
  39 namespace vk
  40 {
  41         class PipelineLayout;
  42 } // namespace vk
  43
  44 namespace sw
  45 {
  46         // Forward declarations.
  47         class SpirvRoutine;
  48         class GenericValue;
  49
  50         // SIMD contains types that represent multiple scalars packed into a single
  51         // vector data type. Types in the SIMD namespace provide a semantic hint
  52         // that the data should be treated as a per-execution-lane scalar instead of
  53         // a typical euclidean-style vector type.
  54         namespace SIMD
  55         {
  56                 // Width is the number of per-lane scalars packed into each SIMD vector.
  57                 static constexpr int Width = 4;
  58
  59                 using Float = rr::Float4;
  60                 using Int = rr::Int4;
  61                 using UInt = rr::UInt4;
  62         }
  63
  64         // Incrementally constructed complex bundle of rvalues
  65         // Effectively a restricted vector, supporting only:
  66         // - allocation to a (runtime-known) fixed size
  67         // - in-place construction of elements
  68         // - const operator[]
  69         class Intermediate
  70         {
  71         public:
  72                 Intermediate(uint32_t size) : scalar(new rr::Value*[size]), size(size) {
  73                         memset(scalar, 0, sizeof(rr::Value*) * size);
  74                 }
  75
  76                 ~Intermediate()
  77                 {
  78                         delete[] scalar;
  79                 }
  80
  81                 void move(uint32_t i, RValue<SIMD::Float> &&scalar) { emplace(i, scalar.value); }
  82                 void move(uint32_t i, RValue<SIMD::Int> &&scalar)   { emplace(i, scalar.value); }
  83                 void move(uint32_t i, RValue<SIMD::UInt> &&scalar)  { emplace(i, scalar.value); }
  84
  85                 void move(uint32_t i, const RValue<SIMD::Float> &scalar) { emplace(i, scalar.value); }
  86                 void move(uint32_t i, const RValue<SIMD::Int> &scalar)   { emplace(i, scalar.value); }
  87                 void move(uint32_t i, const RValue<SIMD::UInt> &scalar)  { emplace(i, scalar.value); }
  88
  89                 void replace(uint32_t i, RValue<SIMD::Float> &&scalar) { replace(i, scalar.value); }
  90                 void replace(uint32_t i, RValue<SIMD::Int> &&scalar)   { replace(i, scalar.value); }
  91                 void replace(uint32_t i, RValue<SIMD::UInt> &&scalar)  { replace(i, scalar.value); }
  92
  93                 void replace(uint32_t i, const RValue<SIMD::Float> &scalar) { replace(i, scalar.value); }
  94                 void replace(uint32_t i, const RValue<SIMD::Int> &scalar)   { replace(i, scalar.value); }
  95                 void replace(uint32_t i, const RValue<SIMD::UInt> &scalar)  { replace(i, scalar.value); }
  96
  97                 // Value retrieval functions.
  98                 RValue<SIMD::Float> Float(uint32_t i) const
  99                 {
 100                         ASSERT(i < size);
 101                         ASSERT(scalar[i] != nullptr);
 102                         return As<SIMD::Float>(scalar[i]);  // TODO(b/128539387): RValue<SIMD::Float>(scalar)
 103                 }
 104
 105                 RValue<SIMD::Int> Int(uint32_t i) const
 106                 {
 107                         ASSERT(i < size);
 108                         ASSERT(scalar[i] != nullptr);
 109                         return As<SIMD::Int>(scalar[i]);  // TODO(b/128539387): RValue<SIMD::Int>(scalar)
 110                 }
 111
 112                 RValue<SIMD::UInt> UInt(uint32_t i) const
 113                 {
 114                         ASSERT(i < size);
 115                         ASSERT(scalar[i] != nullptr);
 116                         return As<SIMD::UInt>(scalar[i]);  // TODO(b/128539387): RValue<SIMD::UInt>(scalar)
 117                 }
 118
 119                 // No copy/move construction or assignment
 120                 Intermediate(Intermediate const &) = delete;
 121                 Intermediate(Intermediate &&) = delete;
 122                 Intermediate & operator=(Intermediate const &) = delete;
 123                 Intermediate & operator=(Intermediate &&) = delete;
 124
 125         private:
 126                 void emplace(uint32_t i, rr::Value *value)
 127                 {
 128                         ASSERT(i < size);
 129                         ASSERT(scalar[i] == nullptr);
 130                         scalar[i] = value;
 131                 }
 132
 133                 void replace(uint32_t i, rr::Value *value)
 134                 {
 135                         ASSERT(i < size);
 136                         scalar[i] = value;
 137                 }
 138
 139                 rr::Value **const scalar;
 140                 uint32_t size;
 141         };
 142
 143         class SpirvShader
 144         {
 145         public:
 146                 using InsnStore = std::vector<uint32_t>;
 147                 InsnStore insns;
 148
 149                 /* Pseudo-iterator over SPIRV instructions, designed to support range-based-for. */
 150                 class InsnIterator
 151                 {
 152                         InsnStore::const_iterator iter;
 153
 154                 public:
 155                         spv::Op opcode() const
 156                         {
 157                                 return static_cast<spv::Op>(*iter & spv::OpCodeMask);
 158                         }
 159
 160                         uint32_t wordCount() const
 161                         {
 162                                 return *iter >> spv::WordCountShift;
 163                         }
 164
 165                         uint32_t word(uint32_t n) const
 166                         {
 167                                 ASSERT(n < wordCount());
 168                                 return iter[n];
 169                         }
 170
 171                         uint32_t const * wordPointer(uint32_t n) const
 172                         {
 173                                 ASSERT(n < wordCount());
 174                                 return &iter[n];
 175                         }
 176
 177                         bool operator==(InsnIterator const &other) const
 178                         {
 179                                 return iter == other.iter;
 180                         }
 181
 182                         bool operator!=(InsnIterator const &other) const
 183                         {
 184                                 return iter != other.iter;
 185                         }
 186
 187                         InsnIterator operator*() const
 188                         {
 189                                 return *this;
 190                         }
 191
 192                         InsnIterator &operator++()
 193                         {
 194                                 iter += wordCount();
 195                                 return *this;
 196                         }
 197
 198                         InsnIterator const operator++(int)
 199                         {
 200                                 InsnIterator ret{*this};
 201                                 iter += wordCount();
 202                                 return ret;
 203                         }
 204
 205                         InsnIterator(InsnIterator const &other) = default;
 206
 207                         InsnIterator() = default;
 208
 209                         explicit InsnIterator(InsnStore::const_iterator iter) : iter{iter}
 210                         {
 211                         }
 212                 };
 213
 214                 /* range-based-for interface */
 215                 InsnIterator begin() const
 216                 {
 217                         return InsnIterator{insns.cbegin() + 5};
 218                 }
 219
 220                 InsnIterator end() const
 221                 {
 222                         return InsnIterator{insns.cend()};
 223                 }
 224
 225                 class Type
 226                 {
 227                 public:
 228                         using ID = SpirvID<Type>;
 229
 230                         spv::Op opcode() const { return definition.opcode(); }
 231
 232                         InsnIterator definition;
 233                         spv::StorageClass storageClass = static_cast<spv::StorageClass>(-1);
 234                         uint32_t sizeInComponents = 0;
 235                         bool isBuiltInBlock = false;
 236
 237                         // Inner element type for pointers, arrays, vectors and matrices.
 238                         ID element;
 239                 };
 240
 241                 class Object
 242                 {
 243                 public:
 244                         using ID = SpirvID<Object>;
 245
 246                         spv::Op opcode() const { return definition.opcode(); }
 247
 248                         InsnIterator definition;
 249                         Type::ID type;
 250                         ID pointerBase;
 251                         std::unique_ptr<uint32_t[]> constantValue = nullptr;
 252
 253                         enum class Kind
 254                         {
 255                                 Unknown,        /* for paranoia -- if we get left with an object in this state, the module was broken */
 256                                 Variable,          // TODO: Document
 257                                 InterfaceVariable, // TODO: Document
 258                                 Constant,          // Values held by Object::constantValue
 259                                 Value,             // Values held by SpirvRoutine::intermediates
 260                                 PhysicalPointer,   // Pointer held by SpirvRoutine::physicalPointers
 261                         } kind = Kind::Unknown;
 262                 };
 263
 264                 // Block is an interval of SPIR-V instructions, starting with the
 265                 // opening OpLabel, and ending with a termination instruction.
 266                 class Block
 267                 {
 268                 public:
 269                         using ID = SpirvID<Block>;
 270                         using Set = std::unordered_set<ID>;
 271
 272                         // Edge represents the graph edge between two blocks.
 273                         struct Edge
 274                         {
 275                                 ID from;
 276                                 ID to;
 277
 278                                 bool operator == (const Edge& other) const { return from == other.from && to == other.to; }
 279
 280                                 struct Hash
 281                                 {
 282                                         std::size_t operator()(const Edge& edge) const noexcept
 283                                         {
 284                                                 return std::hash<uint32_t>()(edge.from.value() * 31 + edge.to.value());
 285                                         }
 286                                 };
 287                         };
 288
 289                         Block() = default;
 290                         Block(const Block& other) = default;
 291                         explicit Block(InsnIterator begin, InsnIterator end);
 292
 293                         /* range-based-for interface */
 294                         inline InsnIterator begin() const { return begin_; }
 295                         inline InsnIterator end() const { return end_; }
 296
 297                         enum Kind
 298                         {
 299                                 Simple, // OpBranch or other simple terminator.
 300                                 StructuredBranchConditional, // OpSelectionMerge + OpBranchConditional
 301                                 UnstructuredBranchConditional, // OpBranchConditional
 302                                 StructuredSwitch, // OpSelectionMerge + OpSwitch
 303                                 UnstructuredSwitch, // OpSwitch
 304                                 Loop, // OpLoopMerge + [OpBranchConditional | OpBranch]
 305                         };
 306
 307                         Kind kind;
 308                         InsnIterator mergeInstruction; // Structured control flow merge instruction.
 309                         InsnIterator branchInstruction; // Branch instruction.
 310                         ID mergeBlock; // Structured flow merge block.
 311                         ID continueTarget; // Loop continue block.
 312                         Set ins; // Blocks that branch into this block.
 313                         Set outs; // Blocks that this block branches to.
 314
 315                 private:
 316                         InsnIterator begin_;
 317                         InsnIterator end_;
 318                 };
 319
 320                 struct TypeOrObject {}; // Dummy struct to represent a Type or Object.
 321
 322                 // TypeOrObjectID is an identifier that represents a Type or an Object,
 323                 // and supports implicit casting to and from Type::ID or Object::ID.
 324                 class TypeOrObjectID : public SpirvID<TypeOrObject>
 325                 {
 326                 public:
 327                         using Hash = std::hash<SpirvID<TypeOrObject>>;
 328
 329                         inline TypeOrObjectID(uint32_t id) : SpirvID(id) {}
 330                         inline TypeOrObjectID(Type::ID id) : SpirvID(id.value()) {}
 331                         inline TypeOrObjectID(Object::ID id) : SpirvID(id.value()) {}
 332                         inline operator Type::ID() const { return Type::ID(value()); }
 333                         inline operator Object::ID() const { return Object::ID(value()); }
 334                 };
 335
 336                 int getSerialID() const
 337                 {
 338                         return serialID;
 339                 }
 340
 341                 explicit SpirvShader(InsnStore const &insns);
 342
 343                 struct Modes
 344                 {
 345                         bool EarlyFragmentTests : 1;
 346                         bool DepthReplacing : 1;
 347                         bool DepthGreater : 1;
 348                         bool DepthLess : 1;
 349                         bool DepthUnchanged : 1;
 350                         bool ContainsKill : 1;
 351                         bool NeedsCentroid : 1;
 352
 353                         // Compute workgroup dimensions
 354                         int WorkgroupSizeX = 1, WorkgroupSizeY = 1, WorkgroupSizeZ = 1;
 355                 };
 356
 357                 Modes const &getModes() const
 358                 {
 359                         return modes;
 360                 }
 361
 362                 enum AttribType : unsigned char
 363                 {
 364                         ATTRIBTYPE_FLOAT,
 365                         ATTRIBTYPE_INT,
 366                         ATTRIBTYPE_UINT,
 367                         ATTRIBTYPE_UNUSED,
 368
 369                         ATTRIBTYPE_LAST = ATTRIBTYPE_UINT
 370                 };
 371
 372                 bool hasBuiltinInput(spv::BuiltIn b) const
 373                 {
 374                         return inputBuiltins.find(b) != inputBuiltins.end();
 375                 }
 376
 377                 struct Decorations
 378                 {
 379                         int32_t Location;
 380                         int32_t Component;
 381                         int32_t DescriptorSet;
 382                         int32_t Binding;
 383                         spv::BuiltIn BuiltIn;
 384                         int32_t Offset;
 385                         int32_t ArrayStride;
 386                         int32_t MatrixStride;
 387                         bool HasLocation : 1;
 388                         bool HasComponent : 1;
 389                         bool HasDescriptorSet : 1;
 390                         bool HasBinding : 1;
 391                         bool HasBuiltIn : 1;
 392                         bool Flat : 1;
 393                         bool Centroid : 1;
 394                         bool NoPerspective : 1;
 395                         bool Block : 1;
 396                         bool BufferBlock : 1;
 397                         bool HasOffset : 1;
 398                         bool HasArrayStride : 1;
 399                         bool HasMatrixStride : 1;
 400
 401                         Decorations()
 402                                         : Location{-1}, Component{0}, DescriptorSet{-1}, Binding{-1},
 403                                           BuiltIn{static_cast<spv::BuiltIn>(-1)},
 404                                           Offset{-1}, ArrayStride{-1}, MatrixStride{-1},
 405                                           HasLocation{false}, HasComponent{false},
 406                                           HasDescriptorSet{false}, HasBinding{false},
 407                                           HasBuiltIn{false}, Flat{false}, Centroid{false},
 408                                           NoPerspective{false}, Block{false}, BufferBlock{false},
 409                                           HasOffset{false}, HasArrayStride{false}, HasMatrixStride{false}
 410                         {
 411                         }
 412
 413                         Decorations(Decorations const &) = default;
 414
 415                         void Apply(Decorations const &src);
 416
 417                         void Apply(spv::Decoration decoration, uint32_t arg);
 418                 };
 419
 420                 std::unordered_map<TypeOrObjectID, Decorations, TypeOrObjectID::Hash> decorations;
 421                 std::unordered_map<Type::ID, std::vector<Decorations>> memberDecorations;
 422
 423                 struct InterfaceComponent
 424                 {
 425                         AttribType Type;
 426                         bool Flat : 1;
 427                         bool Centroid : 1;
 428                         bool NoPerspective : 1;
 429
 430                         InterfaceComponent()
 431                                         : Type{ATTRIBTYPE_UNUSED}, Flat{false}, Centroid{false}, NoPerspective{false}
 432                         {
 433                         }
 434                 };
 435
 436                 struct BuiltinMapping
 437                 {
 438                         Object::ID Id;
 439                         uint32_t FirstComponent;
 440                         uint32_t SizeInComponents;
 441                 };
 442
 443                 std::vector<InterfaceComponent> inputs;
 444                 std::vector<InterfaceComponent> outputs;
 445
 446                 void emitProlog(SpirvRoutine *routine) const;
 447                 void emit(SpirvRoutine *routine, RValue<SIMD::Int> const &activeLaneMask) const;
 448                 void emitEpilog(SpirvRoutine *routine) const;
 449
 450                 using BuiltInHash = std::hash<std::underlying_type<spv::BuiltIn>::type>;
 451                 std::unordered_map<spv::BuiltIn, BuiltinMapping, BuiltInHash> inputBuiltins;
 452                 std::unordered_map<spv::BuiltIn, BuiltinMapping, BuiltInHash> outputBuiltins;
 453
 454                 Type const &getType(Type::ID id) const
 455                 {
 456                         auto it = types.find(id);
 457                         ASSERT_MSG(it != types.end(), "Unknown type %d", id.value());
 458                         return it->second;
 459                 }
 460
 461                 Object const &getObject(Object::ID id) const
 462                 {
 463                         auto it = defs.find(id);
 464                         ASSERT_MSG(it != defs.end(), "Unknown object %d", id.value());
 465                         return it->second;
 466                 }
 467
 468                 Block const &getBlock(Block::ID id) const
 469                 {
 470                         auto it = blocks.find(id);
 471                         ASSERT_MSG(it != blocks.end(), "Unknown block %d", id.value());
 472                         return it->second;
 473                 }
 474
 475         private:
 476                 const int serialID;
 477                 static volatile int serialCounter;
 478                 Modes modes;
 479                 HandleMap<Type> types;
 480                 HandleMap<Object> defs;
 481                 HandleMap<Block> blocks;
 482                 Block::ID mainBlockId; // Block of the entry point function.
 483
 484                 // Walks all reachable the blocks starting from id adding them to
 485                 // reachable.
 486                 void TraverseReachableBlocks(Block::ID id, Block::Set& reachable);
 487
 488                 // Assigns Block::ins from Block::outs for every block.
 489                 void AssignBlockIns();
 490
 491                 // DeclareType creates a Type for the given OpTypeX instruction, storing
 492                 // it into the types map. It is called from the analysis pass (constructor).
 493                 void DeclareType(InsnIterator insn);
 494
 495                 void ProcessExecutionMode(InsnIterator it);
 496
 497                 uint32_t ComputeTypeSize(InsnIterator insn);
 498                 void ApplyDecorationsForId(Decorations *d, TypeOrObjectID id) const;
 499                 void ApplyDecorationsForIdMember(Decorations *d, Type::ID id, uint32_t member) const;
 500
 501                 // Returns true if data in the given storage class is word-interleaved
 502                 // by each SIMD vector lane, otherwise data is linerally stored.
 503                 //
 504                 // A 'lane' is a component of a SIMD vector register.
 505                 // Given 4 consecutive loads/stores of 4 SIMD vector registers:
 506                 //
 507                 // "StorageInterleavedByLane":
 508                 //
 509                 //  Ptr+0:Reg0.x | Ptr+1:Reg0.y | Ptr+2:Reg0.z | Ptr+3:Reg0.w
 510                 // --------------+--------------+--------------+--------------
 511                 //  Ptr+4:Reg1.x | Ptr+5:Reg1.y | Ptr+6:Reg1.z | Ptr+7:Reg1.w
 512                 // --------------+--------------+--------------+--------------
 513                 //  Ptr+8:Reg2.x | Ptr+9:Reg2.y | Ptr+a:Reg2.z | Ptr+b:Reg2.w
 514                 // --------------+--------------+--------------+--------------
 515                 //  Ptr+c:Reg3.x | Ptr+d:Reg3.y | Ptr+e:Reg3.z | Ptr+f:Reg3.w
 516                 //
 517                 // Not "StorageInterleavedByLane":
 518                 //
 519                 //  Ptr+0:Reg0.x | Ptr+0:Reg0.y | Ptr+0:Reg0.z | Ptr+0:Reg0.w
 520                 // --------------+--------------+--------------+--------------
 521                 //  Ptr+1:Reg1.x | Ptr+1:Reg1.y | Ptr+1:Reg1.z | Ptr+1:Reg1.w
 522                 // --------------+--------------+--------------+--------------
 523                 //  Ptr+2:Reg2.x | Ptr+2:Reg2.y | Ptr+2:Reg2.z | Ptr+2:Reg2.w
 524                 // --------------+--------------+--------------+--------------
 525                 //  Ptr+3:Reg3.x | Ptr+3:Reg3.y | Ptr+3:Reg3.z | Ptr+3:Reg3.w
 526                 //
 527                 static bool IsStorageInterleavedByLane(spv::StorageClass storageClass);
 528
 529                 template<typename F>
 530                 int VisitInterfaceInner(Type::ID id, Decorations d, F f) const;
 531
 532                 template<typename F>
 533                 void VisitInterface(Object::ID id, F f) const;
 534
 535                 uint32_t GetConstantInt(Object::ID id) const;
 536                 Object& CreateConstant(InsnIterator it);
 537
 538                 void ProcessInterfaceVariable(Object &object);
 539
 540                 SIMD::Int WalkExplicitLayoutAccessChain(Object::ID id, uint32_t numIndexes, uint32_t const *indexIds, SpirvRoutine *routine) const;
 541                 SIMD::Int WalkAccessChain(Object::ID id, uint32_t numIndexes, uint32_t const *indexIds, SpirvRoutine *routine) const;
 542                 uint32_t WalkLiteralAccessChain(Type::ID id, uint32_t numIndexes, uint32_t const *indexes) const;
 543
 544                 // EmitState holds control-flow state for the emit() pass.
 545                 class EmitState
 546                 {
 547                 public:
 548                         RValue<SIMD::Int> activeLaneMask() const
 549                         {
 550                                 ASSERT(activeLaneMaskValue != nullptr);
 551                                 return RValue<SIMD::Int>(activeLaneMaskValue);
 552                         }
 553
 554                         void setActiveLaneMask(RValue<SIMD::Int> mask)
 555                         {
 556                                 activeLaneMaskValue = mask.value;
 557                         }
 558
 559                         // Add a new active lane mask edge from the current block to out.
 560                         // The edge mask value will be (mask AND activeLaneMaskValue).
 561                         // If multiple active lane masks are added for the same edge, then
 562                         // they will be ORed together.
 563                         void addOutputActiveLaneMaskEdge(Block::ID out, RValue<SIMD::Int> mask);
 564
 565                         // Add a new active lane mask for the edge from -> to.
 566                         // If multiple active lane masks are added for the same edge, then
 567                         // they will be ORed together.
 568                         void addActiveLaneMaskEdge(Block::ID from, Block::ID to, RValue<SIMD::Int> mask);
 569
 570                         SpirvRoutine *routine = nullptr; // The current routine being built.
 571                         rr::Value *activeLaneMaskValue = nullptr; // The current active lane mask.
 572                         Block::ID currentBlock; // The current block being built.
 573                         Block::Set visited; // Blocks already built.
 574                         std::unordered_map<Block::Edge, RValue<SIMD::Int>, Block::Edge::Hash> edgeActiveLaneMasks;
 575                         std::queue<Block::ID> *pending;
 576                 };
 577
 578                 // EmitResult is an enumerator of result values from the Emit functions.
 579                 enum class EmitResult
 580                 {
 581                         Continue, // No termination instructions.
 582                         Terminator, // Reached a termination instruction.
 583                 };
 584
 585                 // existsPath returns true if there's a direct or indirect flow from
 586                 // the 'from' block to the 'to' block that does not pass through
 587                 // notPassingThrough.
 588                 bool existsPath(Block::ID from, Block::ID to, Block::ID notPassingThrough) const;
 589
 590                 // Lookup the active lane mask for the edge from -> to.
 591                 // If from is unreachable, then a mask of all zeros is returned.
 592                 // Asserts if from is reachable and the edge does not exist.
 593                 RValue<SIMD::Int> GetActiveLaneMaskEdge(EmitState *state, Block::ID from, Block::ID to) const;
 594
 595                 // Emit all the unvisited blocks (except for ignore) in BFS order,
 596                 // starting with id.
 597                 void EmitBlocks(Block::ID id, EmitState *state, Block::ID ignore = 0) const;
 598                 void EmitNonLoop(EmitState *state) const;
 599                 void EmitLoop(EmitState *state) const;
 600
 601                 void EmitInstructions(InsnIterator begin, InsnIterator end, EmitState *state) const;
 602                 EmitResult EmitInstruction(InsnIterator insn, EmitState *state) const;
 603
 604                 // Emit pass instructions:
 605                 EmitResult EmitVariable(InsnIterator insn, EmitState *state) const;
 606                 EmitResult EmitLoad(InsnIterator insn, EmitState *state) const;
 607                 EmitResult EmitStore(InsnIterator insn, EmitState *state) const;
 608                 EmitResult EmitAccessChain(InsnIterator insn, EmitState *state) const;
 609                 EmitResult EmitCompositeConstruct(InsnIterator insn, EmitState *state) const;
 610                 EmitResult EmitCompositeInsert(InsnIterator insn, EmitState *state) const;
 611                 EmitResult EmitCompositeExtract(InsnIterator insn, EmitState *state) const;
 612                 EmitResult EmitVectorShuffle(InsnIterator insn, EmitState *state) const;
 613                 EmitResult EmitVectorTimesScalar(InsnIterator insn, EmitState *state) const;
 614                 EmitResult EmitMatrixTimesVector(InsnIterator insn, EmitState *state) const;
 615                 EmitResult EmitVectorTimesMatrix(InsnIterator insn, EmitState *state) const;
 616                 EmitResult EmitMatrixTimesMatrix(InsnIterator insn, EmitState *state) const;
 617                 EmitResult EmitVectorExtractDynamic(InsnIterator insn, EmitState *state) const;
 618                 EmitResult EmitVectorInsertDynamic(InsnIterator insn, EmitState *state) const;
 619                 EmitResult EmitUnaryOp(InsnIterator insn, EmitState *state) const;
 620                 EmitResult EmitBinaryOp(InsnIterator insn, EmitState *state) const;
 621                 EmitResult EmitDot(InsnIterator insn, EmitState *state) const;
 622                 EmitResult EmitSelect(InsnIterator insn, EmitState *state) const;
 623                 EmitResult EmitExtendedInstruction(InsnIterator insn, EmitState *state) const;
 624                 EmitResult EmitAny(InsnIterator insn, EmitState *state) const;
 625                 EmitResult EmitAll(InsnIterator insn, EmitState *state) const;
 626                 EmitResult EmitBranch(InsnIterator insn, EmitState *state) const;
 627                 EmitResult EmitBranchConditional(InsnIterator insn, EmitState *state) const;
 628                 EmitResult EmitSwitch(InsnIterator insn, EmitState *state) const;
 629                 EmitResult EmitUnreachable(InsnIterator insn, EmitState *state) const;
 630                 EmitResult EmitReturn(InsnIterator insn, EmitState *state) const;
 631                 EmitResult EmitPhi(InsnIterator insn, EmitState *state) const;
 632
 633                 // OpcodeName() returns the name of the opcode op.
 634                 // If NDEBUG is defined, then OpcodeName() will only return the numerical code.
 635                 static std::string OpcodeName(spv::Op op);
 636                 static std::memory_order MemoryOrder(spv::MemorySemanticsMask memorySemantics);
 637
 638                 // Helper as we often need to take dot products as part of doing other things.
 639                 SIMD::Float Dot(unsigned numComponents, GenericValue const & x, GenericValue const & y) const;
 640         };
 641
 642         class SpirvRoutine
 643         {
 644         public:
 645                 SpirvRoutine(vk::PipelineLayout const *pipelineLayout);
 646
 647                 using Value = Array<SIMD::Float>;
 648
 649                 vk::PipelineLayout const * const pipelineLayout;
 650
 651                 std::unordered_map<SpirvShader::Object::ID, Value> lvalues;
 652
 653                 std::unordered_map<SpirvShader::Object::ID, Intermediate> intermediates;
 654
 655                 std::unordered_map<SpirvShader::Object::ID, Pointer<Byte> > physicalPointers;
 656
 657                 Value inputs = Value{MAX_INTERFACE_COMPONENTS};
 658                 Value outputs = Value{MAX_INTERFACE_COMPONENTS};
 659
 660                 std::array<Pointer<Byte>, vk::MAX_BOUND_DESCRIPTOR_SETS> descriptorSets;
 661                 Pointer<Byte> pushConstants;
 662
 663                 void createLvalue(SpirvShader::Object::ID id, uint32_t size)
 664                 {
 665                         lvalues.emplace(id, Value(size));
 666                 }
 667
 668                 Intermediate& createIntermediate(SpirvShader::Object::ID id, uint32_t size)
 669                 {
 670                         auto it = intermediates.emplace(std::piecewise_construct,
 671                                         std::forward_as_tuple(id),
 672                                         std::forward_as_tuple(size));
 673                         return it.first->second;
 674                 }
 675
 676                 Value& getValue(SpirvShader::Object::ID id)
 677                 {
 678                         auto it = lvalues.find(id);
 679                         ASSERT_MSG(it != lvalues.end(), "Unknown value %d", id.value());
 680                         return it->second;
 681                 }
 682
 683                 Intermediate const& getIntermediate(SpirvShader::Object::ID id) const
 684                 {
 685                         auto it = intermediates.find(id);
 686                         ASSERT_MSG(it != intermediates.end(), "Unknown intermediate %d", id.value());
 687                         return it->second;
 688                 }
 689
 690                 Pointer<Byte>& getPhysicalPointer(SpirvShader::Object::ID id)
 691                 {
 692                         auto it = physicalPointers.find(id);
 693                         ASSERT_MSG(it != physicalPointers.end(), "Unknown physical pointer %d", id.value());
 694                         return it->second;
 695                 }
 696         };
 697
 698         class GenericValue
 699         {
 700                 // Generic wrapper over either per-lane intermediate value, or a constant.
 701                 // Constants are transparently widened to per-lane values in operator[].
 702                 // This is appropriate in most cases -- if we're not going to do something
 703                 // significantly different based on whether the value is uniform across lanes.
 704
 705                 SpirvShader::Object const &obj;
 706                 Intermediate const *intermediate;
 707
 708         public:
 709                 GenericValue(SpirvShader const *shader, SpirvRoutine const *routine, SpirvShader::Object::ID objId) :
 710                                 obj(shader->getObject(objId)),
 711                                 intermediate(obj.kind == SpirvShader::Object::Kind::Value ? &routine->getIntermediate(objId) : nullptr) {}
 712
 713                 RValue<SIMD::Float> Float(uint32_t i) const
 714                 {
 715                         if (intermediate != nullptr)
 716                         {
 717                                 return intermediate->Float(i);
 718                         }
 719                         auto constantValue = reinterpret_cast<float *>(obj.constantValue.get());
 720                         return RValue<SIMD::Float>(constantValue[i]);
 721                 }
 722
 723                 RValue<SIMD::Int> Int(uint32_t i) const
 724                 {
 725                         return As<SIMD::Int>(Float(i));
 726                 }
 727
 728                 RValue<SIMD::UInt> UInt(uint32_t i) const
 729                 {
 730                         return As<SIMD::UInt>(Float(i));
 731                 }
 732         };
 733
 734 }
 735
 736 #endif  // sw_SpirvShader_hpp