Add the support for GLK in the intel-driver

Decoder and VPP are enabled with this patch.
Encoder will be enabled later.

Fix https://github.com/01org/intel-vaapi-driver/issues/80

Signed-off-by: Peng.Chen <peng.c.chen@intel.com>
Signed-off-by: Yu, JianKang <jiankang.yu@intel.com>
Signed-off-by: Wang, TianTian<tiantian.wang@intel.com>

diff --git a/src/gen9_mfc_hevc.c b/src/gen9_mfc_hevc.c
index ea22aed..f5a5351 100644 (file)
--- a/src/gen9_mfc_hevc.c
+++ b/src/gen9_mfc_hevc.c
@@ -157,7 +157,8 @@ gen9_hcpe_pipe_mode_select(VADriverContextP ctx,
 
     assert(standard_select == HCP_CODEC_HEVC);
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         BEGIN_BCS_BATCH(batch, 6);
 
@@ -177,7 +178,8 @@ gen9_hcpe_pipe_mode_select(VADriverContextP ctx,
     OUT_BCS_BATCH(batch, 0);
     OUT_BCS_BATCH(batch, 0);
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         OUT_BCS_BATCH(batch, 0);
         OUT_BCS_BATCH(batch, 0);
@@ -243,7 +245,8 @@ gen9_hcpe_pipe_buf_addr_state(VADriverContextP ctx, struct encode_state *encode_
     dri_bo *bo;
     unsigned int i;
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         BEGIN_BCS_BATCH(batch, 104);
 
@@ -305,7 +308,8 @@ gen9_hcpe_pipe_buf_addr_state(VADriverContextP ctx, struct encode_state *encode_
     OUT_BUFFER_MA_TARGET(NULL);    /* DW 89..91, ignore for HEVC */
     OUT_BUFFER_MA_TARGET(NULL);    /* DW 92..94, ignore for HEVC */
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         for(i = 0;i < 9;i++)
             OUT_BCS_BATCH(batch, 0);
@@ -546,7 +550,8 @@ gen9_hcpe_hevc_pic_state(VADriverContextP ctx, struct encode_state *encode_state
     /* set zero for encoder */
     loop_filter_across_tiles_enabled_flag = 0;
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         BEGIN_BCS_BATCH(batch, 31);
 
@@ -574,7 +579,8 @@ gen9_hcpe_hevc_pic_state(VADriverContextP ctx, struct encode_state *encode_state
                   seq_param->log2_min_luma_coding_block_size_minus3);
     OUT_BCS_BATCH(batch, 0); /* DW 3, ignored */
     OUT_BCS_BATCH(batch,
-                  (IS_KBL(i965->intel.device_info)? 1 : 0) << 27 | /* CU packet structure is 0 for SKL */
+                  ((IS_KBL(i965->intel.device_info) || IS_GLK(i965->intel.device_info)) ?
+                                     1 : 0) << 27 | /* CU packet structure is 0 for SKL */
                   seq_param->seq_fields.bits.strong_intra_smoothing_enabled_flag << 26 |
                   pic_param->pic_fields.bits.transquant_bypass_enabled_flag << 25 |
                   seq_param->seq_fields.bits.amp_enabled_flag << 23 |
@@ -628,7 +634,8 @@ gen9_hcpe_hevc_pic_state(VADriverContextP ctx, struct encode_state *encode_state
                   0 << 30 |
                   minframesize);    /* DW 18, min frame size units */
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         int i = 0;
 
@@ -810,7 +817,8 @@ gen9_hcpe_hevc_slice_state(VADriverContextP ctx,
         }
     }
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         BEGIN_BCS_BATCH(batch, 11);
 
@@ -866,7 +874,8 @@ gen9_hcpe_hevc_slice_state(VADriverContextP ctx,
                   0);        /* Ignored for decoding */
     OUT_BCS_BATCH(batch, 0); /* PAK-BSE data start offset */
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         OUT_BCS_BATCH(batch, 0);
         OUT_BCS_BATCH(batch, 0);
@@ -1176,7 +1185,8 @@ gen9_hcpe_hevc_pak_object(VADriverContextP ctx, int lcu_x, int lcu_y, int isLast
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     int len_in_dwords = 3;
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
         len_in_dwords = 5;
 
     if (batch == NULL)
@@ -1192,7 +1202,8 @@ gen9_hcpe_hevc_pak_object(VADriverContextP ctx, int lcu_x, int lcu_y, int isLast
 
     OUT_BCS_BATCH(batch, (lcu_y << 16) | lcu_x);        /* LCU  for Y*/
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         OUT_BCS_BATCH(batch, 0);
         OUT_BCS_BATCH(batch, 0);

diff --git a/src/gen9_mfd.c b/src/gen9_mfd.c
index fed1bc1..5e70d99 100644 (file)
--- a/src/gen9_mfd.c
+++ b/src/gen9_mfd.c
@@ -194,7 +194,8 @@ gen9_hcpd_pipe_mode_select(VADriverContextP ctx,
 
     assert((codec == HCP_CODEC_HEVC) || (codec == HCP_CODEC_VP9));
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         BEGIN_BCS_BATCH(batch, 6);
 
@@ -213,7 +214,8 @@ gen9_hcpd_pipe_mode_select(VADriverContextP ctx,
     OUT_BCS_BATCH(batch, 0);
     OUT_BCS_BATCH(batch, 0);
 
-    if(IS_KBL(i965->intel.device_info))
+    if(IS_KBL(i965->intel.device_info) ||
+        IS_GLK(i965->intel.device_info))
     {
         if(codec == HCP_CODEC_VP9)
             OUT_BCS_BATCH(batch, 1<<6);

diff --git a/src/i965_device_info.c b/src/i965_device_info.c
index b838017..4b61468 100644 (file)
--- a/src/i965_device_info.c
+++ b/src/i965_device_info.c
@@ -497,6 +497,67 @@ static struct hw_codec_info kbl_hw_codec_info = {
     },
 };
 
+static struct hw_codec_info glk_hw_codec_info = {
+    .dec_hw_context_init = gen9_dec_hw_context_init,
+    .enc_hw_context_init = gen9_enc_hw_context_init,
+    .proc_hw_context_init = gen75_proc_context_init,
+    .render_init = gen9_render_init,
+    .post_processing_context_init = gen9_post_processing_context_init,
+
+    .max_resolution = gen9_max_resolution,
+    .preinit_hw_codec = gen9_hw_codec_preinit,
+
+    .max_width = 4096,
+    .max_height = 4096,
+    .min_linear_wpitch = 64,
+    .min_linear_hpitch = 16,
+
+    .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) |
+                              VA_PROFILE_MASK(H264MultiviewHigh)),
+    .vp9_dec_profiles = VP9_PROFILE_MASK(0) |
+                        VP9_PROFILE_MASK(2),
+
+    .vp9_enc_profiles = VP9_PROFILE_MASK(0),
+
+    .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS,
+    .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS,
+    .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS,
+    .hevc_dec_chroma_formats = EXTRA_HEVC_DEC_CHROMA_FORMATS,
+    .vp9_dec_chroma_formats = EXTRA_VP9_DEC_CHROMA_FORMATS,
+
+    .has_mpeg2_decoding = 1,
+    .has_h264_decoding = 1,
+    .has_h264_encoding = 0,
+    .has_vc1_decoding = 1,
+    .has_jpeg_decoding = 1,
+    .has_jpeg_encoding = 0,
+    .has_vpp = 1,
+    .has_accelerated_getimage = 1,
+    .has_accelerated_putimage = 1,
+    .has_tiled_surface = 1,
+    .has_di_motion_adptive = 1,
+    .has_di_motion_compensated = 1,
+    .has_vp8_decoding = 1,
+    .has_vp8_encoding = 0,
+    .has_h264_mvc_encoding = 0,
+    .has_hevc_decoding = 1,
+    .has_hevc_encoding = 0,
+    .has_hevc10_decoding = 1,
+    .has_hevc10_encoding = 0,
+    .has_vp9_decoding = 1,
+    .has_vpp_p010 = 1,
+    .has_vp9_encoding = 0,
+
+    .num_filters = 5,
+    .filters = {
+        { VAProcFilterNoiseReduction, I965_RING_VEBOX },
+        { VAProcFilterDeinterlacing, I965_RING_VEBOX },
+        { VAProcFilterSharpening, I965_RING_NULL },
+        { VAProcFilterColorBalance, I965_RING_VEBOX},
+        { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX},
+    },
+};
+
 struct hw_codec_info *
 i965_get_codec_info(int devid)
 {
@@ -644,6 +705,15 @@ static const struct intel_device_info kbl_device_info = {
     .is_kabylake = 1,
 };
 
+static const struct intel_device_info glk_device_info = {
+    .gen = 9,
+
+    .urb_size = 4096,
+    .max_wm_threads = 64,       /* per PSD */
+
+    .is_glklake = 1,
+};
+
 const struct intel_device_info *
 i965_get_device_info(int devid)
 {

diff --git a/src/i965_pciids.h b/src/i965_pciids.h
index 1ea3c98..ee6e3d2 100644 (file)
--- a/src/i965_pciids.h
+++ b/src/i965_pciids.h
@@ -183,3 +183,5 @@ CHIPSET(0x591D, kbl, kbl,       "Intel(R) Kabylake")
 CHIPSET(0x5908, kbl, kbl,       "Intel(R) Kabylake")
 CHIPSET(0x5923, kbl, kbl,       "Intel(R) Kabylake")
 CHIPSET(0x5927, kbl, kbl,       "Intel(R) Kabylake")
+CHIPSET(0x3184, glk, glk,       "Intel(R) Geminilake")
+CHIPSET(0x3185, glk, glk,       "Intel(R) Geminilake")

diff --git a/src/intel_driver.h b/src/intel_driver.h
index ad3c04b..634383b 100644 (file)
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -166,6 +166,7 @@ struct intel_device_info
     unsigned int is_skylake     : 1; /* gen9 */
     unsigned int is_broxton     : 1; /* gen9 */
     unsigned int is_kabylake    : 1; /* gen9p5 */
+    unsigned int is_glklake     : 1; /* gen9p5 lp*/
 };
 
 struct intel_driver_data 
@@ -237,4 +238,6 @@ struct intel_region
 
 #define IS_KBL(device_info)             (device_info->is_kabylake)
 
+#define IS_GLK(device_info)             (device_info->is_glklake)
+
 #endif /* _INTEL_DRIVER_H_ */