arch/arm64/kernel/traps.c

   1 /*
   2  * Based on arch/arm/kernel/traps.c
   3  *
   4  * Copyright (C) 1995-2009 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/bug.h>
  21 #include <linux/signal.h>
  22 #include <linux/personality.h>
  23 #include <linux/kallsyms.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/hardirq.h>
  27 #include <linux/kdebug.h>
  28 #include <linux/module.h>
  29 #include <linux/kexec.h>
  30 #include <linux/delay.h>
  31 #include <linux/init.h>
  32 #include <linux/sched.h>
  33 #include <linux/syscalls.h>
  34
  35 #include <asm/atomic.h>
  36 #include <asm/barrier.h>
  37 #include <asm/bug.h>
  38 #include <asm/debug-monitors.h>
  39 #include <asm/esr.h>
  40 #include <asm/insn.h>
  41 #include <asm/traps.h>
  42 #include <asm/stack_pointer.h>
  43 #include <asm/stacktrace.h>
  44 #include <asm/exception.h>
  45 #include <asm/system_misc.h>
  46 #include <asm/sysreg.h>
  47
  48 static const char *handler[]= {
  49         "Synchronous Abort",
  50         "IRQ",
  51         "FIQ",
  52         "Error"
  53 };
  54
  55 int show_unhandled_signals = 0;
  56
  57 /*
  58  * Dump out the contents of some kernel memory nicely...
  59  */
  60 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
  61                      unsigned long top)
  62 {
  63         unsigned long first;
  64         mm_segment_t fs;
  65         int i;
  66
  67         /*
  68          * We need to switch to kernel mode so that we can use __get_user
  69          * to safely read from kernel space.
  70          */
  71         fs = get_fs();
  72         set_fs(KERNEL_DS);
  73
  74         printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
  75
  76         for (first = bottom & ~31; first < top; first += 32) {
  77                 unsigned long p;
  78                 char str[sizeof(" 12345678") * 8 + 1];
  79
  80                 memset(str, ' ', sizeof(str));
  81                 str[sizeof(str) - 1] = '\0';
  82
  83                 for (p = first, i = 0; i < (32 / 8)
  84                                         && p < top; i++, p += 8) {
  85                         if (p >= bottom && p < top) {
  86                                 unsigned long val;
  87
  88                                 if (__get_user(val, (unsigned long *)p) == 0)
  89                                         sprintf(str + i * 17, " %016lx", val);
  90                                 else
  91                                         sprintf(str + i * 17, " ????????????????");
  92                         }
  93                 }
  94                 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
  95         }
  96
  97         set_fs(fs);
  98 }
  99
 100 static void dump_backtrace_entry(unsigned long where)
 101 {
 102         /*
 103          * Note that 'where' can have a physical address, but it's not handled.
 104          */
 105         print_ip_sym(where);
 106 }
 107
 108 static void __dump_instr(const char *lvl, struct pt_regs *regs)
 109 {
 110         unsigned long addr = instruction_pointer(regs);
 111         char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
 112         int i;
 113
 114         for (i = -4; i < 1; i++) {
 115                 unsigned int val, bad;
 116
 117                 bad = get_user(val, &((u32 *)addr)[i]);
 118
 119                 if (!bad)
 120                         p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
 121                 else {
 122                         p += sprintf(p, "bad PC value");
 123                         break;
 124                 }
 125         }
 126         printk("%sCode: %s\n", lvl, str);
 127 }
 128
 129 static void dump_instr(const char *lvl, struct pt_regs *regs)
 130 {
 131         if (!user_mode(regs)) {
 132                 mm_segment_t fs = get_fs();
 133                 set_fs(KERNEL_DS);
 134                 __dump_instr(lvl, regs);
 135                 set_fs(fs);
 136         } else {
 137                 __dump_instr(lvl, regs);
 138         }
 139 }
 140
 141 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
 142 {
 143         struct stackframe frame;
 144         unsigned long irq_stack_ptr;
 145         int skip;
 146
 147         pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
 148
 149         if (!tsk)
 150                 tsk = current;
 151
 152         if (!try_get_task_stack(tsk))
 153                 return;
 154
 155         /*
 156          * Switching between stacks is valid when tracing current and in
 157          * non-preemptible context.
 158          */
 159         if (tsk == current && !preemptible())
 160                 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
 161         else
 162                 irq_stack_ptr = 0;
 163
 164         if (tsk == current) {
 165                 frame.fp = (unsigned long)__builtin_frame_address(0);
 166                 frame.sp = current_stack_pointer;
 167                 frame.pc = (unsigned long)dump_backtrace;
 168         } else {
 169                 /*
 170                  * task blocked in __switch_to
 171                  */
 172                 frame.fp = thread_saved_fp(tsk);
 173                 frame.sp = thread_saved_sp(tsk);
 174                 frame.pc = thread_saved_pc(tsk);
 175         }
 176 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 177         frame.graph = tsk->curr_ret_stack;
 178 #endif
 179
 180         skip = !!regs;
 181         printk("Call trace:\n");
 182         while (1) {
 183                 unsigned long where = frame.pc;
 184                 unsigned long stack;
 185                 int ret;
 186
 187                 /* skip until specified stack frame */
 188                 if (!skip) {
 189                         dump_backtrace_entry(where);
 190                 } else if (frame.fp == regs->regs[29]) {
 191                         skip = 0;
 192                         /*
 193                          * Mostly, this is the case where this function is
 194                          * called in panic/abort. As exception handler's
 195                          * stack frame does not contain the corresponding pc
 196                          * at which an exception has taken place, use regs->pc
 197                          * instead.
 198                          */
 199                         dump_backtrace_entry(regs->pc);
 200                 }
 201                 ret = unwind_frame(tsk, &frame);
 202                 if (ret < 0)
 203                         break;
 204                 stack = frame.sp;
 205                 if (in_exception_text(where)) {
 206                         /*
 207                          * If we switched to the irq_stack before calling this
 208                          * exception handler, then the pt_regs will be on the
 209                          * task stack. The easiest way to tell is if the large
 210                          * pt_regs would overlap with the end of the irq_stack.
 211                          */
 212                         if (stack < irq_stack_ptr &&
 213                             (stack + sizeof(struct pt_regs)) > irq_stack_ptr)
 214                                 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
 215
 216                         dump_mem("", "Exception stack", stack,
 217                                  stack + sizeof(struct pt_regs));
 218                 }
 219         }
 220
 221         put_task_stack(tsk);
 222 }
 223
 224 void show_stack(struct task_struct *tsk, unsigned long *sp)
 225 {
 226         dump_backtrace(NULL, tsk);
 227         barrier();
 228 }
 229
 230 #ifdef CONFIG_PREEMPT
 231 #define S_PREEMPT " PREEMPT"
 232 #else
 233 #define S_PREEMPT ""
 234 #endif
 235 #define S_SMP " SMP"
 236
 237 static int __die(const char *str, int err, struct pt_regs *regs)
 238 {
 239         struct task_struct *tsk = current;
 240         static int die_counter;
 241         int ret;
 242
 243         pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
 244                  str, err, ++die_counter);
 245
 246         /* trap and error numbers are mostly meaningless on ARM */
 247         ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
 248         if (ret == NOTIFY_STOP)
 249                 return ret;
 250
 251         print_modules();
 252         __show_regs(regs);
 253         pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
 254                  TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
 255                  end_of_stack(tsk));
 256
 257         if (!user_mode(regs)) {
 258                 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
 259                          THREAD_SIZE + (unsigned long)task_stack_page(tsk));
 260                 dump_backtrace(regs, tsk);
 261                 dump_instr(KERN_EMERG, regs);
 262         }
 263
 264         return ret;
 265 }
 266
 267 static DEFINE_RAW_SPINLOCK(die_lock);
 268
 269 /*
 270  * This function is protected against re-entrancy.
 271  */
 272 void die(const char *str, struct pt_regs *regs, int err)
 273 {
 274         int ret;
 275
 276         oops_enter();
 277
 278         raw_spin_lock_irq(&die_lock);
 279         console_verbose();
 280         bust_spinlocks(1);
 281         ret = __die(str, err, regs);
 282
 283         if (regs && kexec_should_crash(current))
 284                 crash_kexec(regs);
 285
 286         bust_spinlocks(0);
 287         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
 288         raw_spin_unlock_irq(&die_lock);
 289         oops_exit();
 290
 291         if (in_interrupt())
 292                 panic("Fatal exception in interrupt");
 293         if (panic_on_oops)
 294                 panic("Fatal exception");
 295         if (ret != NOTIFY_STOP)
 296                 do_exit(SIGSEGV);
 297 }
 298
 299 void arm64_notify_die(const char *str, struct pt_regs *regs,
 300                       struct siginfo *info, int err)
 301 {
 302         if (user_mode(regs)) {
 303                 current->thread.fault_address = 0;
 304                 current->thread.fault_code = err;
 305                 force_sig_info(info->si_signo, info, current);
 306         } else {
 307                 die(str, regs, err);
 308         }
 309 }
 310
 311 static LIST_HEAD(undef_hook);
 312 static DEFINE_RAW_SPINLOCK(undef_lock);
 313
 314 void register_undef_hook(struct undef_hook *hook)
 315 {
 316         unsigned long flags;
 317
 318         raw_spin_lock_irqsave(&undef_lock, flags);
 319         list_add(&hook->node, &undef_hook);
 320         raw_spin_unlock_irqrestore(&undef_lock, flags);
 321 }
 322
 323 void unregister_undef_hook(struct undef_hook *hook)
 324 {
 325         unsigned long flags;
 326
 327         raw_spin_lock_irqsave(&undef_lock, flags);
 328         list_del(&hook->node);
 329         raw_spin_unlock_irqrestore(&undef_lock, flags);
 330 }
 331
 332 static int call_undef_hook(struct pt_regs *regs)
 333 {
 334         struct undef_hook *hook;
 335         unsigned long flags;
 336         u32 instr;
 337         int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
 338         void __user *pc = (void __user *)instruction_pointer(regs);
 339
 340         if (!user_mode(regs))
 341                 return 1;
 342
 343         if (compat_thumb_mode(regs)) {
 344                 /* 16-bit Thumb instruction */
 345                 if (get_user(instr, (u16 __user *)pc))
 346                         goto exit;
 347                 instr = le16_to_cpu(instr);
 348                 if (aarch32_insn_is_wide(instr)) {
 349                         u32 instr2;
 350
 351                         if (get_user(instr2, (u16 __user *)(pc + 2)))
 352                                 goto exit;
 353                         instr2 = le16_to_cpu(instr2);
 354                         instr = (instr << 16) | instr2;
 355                 }
 356         } else {
 357                 /* 32-bit ARM instruction */
 358                 if (get_user(instr, (u32 __user *)pc))
 359                         goto exit;
 360                 instr = le32_to_cpu(instr);
 361         }
 362
 363         raw_spin_lock_irqsave(&undef_lock, flags);
 364         list_for_each_entry(hook, &undef_hook, node)
 365                 if ((instr & hook->instr_mask) == hook->instr_val &&
 366                         (regs->pstate & hook->pstate_mask) == hook->pstate_val)
 367                         fn = hook->fn;
 368
 369         raw_spin_unlock_irqrestore(&undef_lock, flags);
 370 exit:
 371         return fn ? fn(regs, instr) : 1;
 372 }
 373
 374 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
 375                                 unsigned long address)
 376 {
 377         siginfo_t info;
 378         void __user *pc = (void __user *)instruction_pointer(regs);
 379         const char *desc;
 380
 381         switch (signal) {
 382         case SIGILL:
 383                 desc = "undefined instruction";
 384                 break;
 385         case SIGSEGV:
 386                 desc = "illegal memory access";
 387                 break;
 388         default:
 389                 desc = "bad mode";
 390                 break;
 391         }
 392
 393         if (unhandled_signal(current, signal) &&
 394             show_unhandled_signals_ratelimited()) {
 395                 pr_info("%s[%d]: %s: pc=%p\n",
 396                         current->comm, task_pid_nr(current), desc, pc);
 397                 dump_instr(KERN_INFO, regs);
 398         }
 399
 400         info.si_signo = signal;
 401         info.si_errno = 0;
 402         info.si_code  = code;
 403         info.si_addr  = pc;
 404
 405         arm64_notify_die(desc, regs, &info, 0);
 406 }
 407
 408 /*
 409  * Set up process info to signal segmentation fault - called on access error.
 410  */
 411 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
 412 {
 413         int code;
 414
 415         down_read(&current->mm->mmap_sem);
 416         if (find_vma(current->mm, addr) == NULL)
 417                 code = SEGV_MAPERR;
 418         else
 419                 code = SEGV_ACCERR;
 420         up_read(&current->mm->mmap_sem);
 421
 422         force_signal_inject(SIGSEGV, code, regs, addr);
 423 }
 424
 425 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 426 {
 427         /* check for AArch32 breakpoint instructions */
 428         if (!aarch32_break_handler(regs))
 429                 return;
 430
 431         if (call_undef_hook(regs) == 0)
 432                 return;
 433
 434         force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 435 }
 436
 437 int cpu_enable_cache_maint_trap(void *__unused)
 438 {
 439         config_sctlr_el1(SCTLR_EL1_UCI, 0);
 440         return 0;
 441 }
 442
 443 #define __user_cache_maint(insn, address, res)                  \
 444         if (address >= user_addr_max()) {                       \
 445                 res = -EFAULT;                                  \
 446         } else {                                                \
 447                 uaccess_ttbr0_enable();                         \
 448                 asm volatile (                                  \
 449                         "1:     " insn ", %1\n"                 \
 450                         "       mov     %w0, #0\n"              \
 451                         "2:\n"                                  \
 452                         "       .pushsection .fixup,\"ax\"\n"   \
 453                         "       .align  2\n"                    \
 454                         "3:     mov     %w0, %w2\n"             \
 455                         "       b       2b\n"                   \
 456                         "       .popsection\n"                  \
 457                         _ASM_EXTABLE(1b, 3b)                    \
 458                         : "=r" (res)                            \
 459                         : "r" (address), "i" (-EFAULT));        \
 460                 uaccess_ttbr0_disable();                        \
 461         }
 462
 463 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
 464 {
 465         unsigned long address;
 466         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 467         int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
 468         int ret = 0;
 469
 470         address = (rt == 31) ? 0 : untagged_addr(regs->regs[rt]);
 471
 472         switch (crm) {
 473         case ESR_ELx_SYS64_ISS_CRM_DC_CVAU:     /* DC CVAU, gets promoted */
 474                 __user_cache_maint("dc civac", address, ret);
 475                 break;
 476         case ESR_ELx_SYS64_ISS_CRM_DC_CVAC:     /* DC CVAC, gets promoted */
 477                 __user_cache_maint("dc civac", address, ret);
 478                 break;
 479         case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC:    /* DC CIVAC */
 480                 __user_cache_maint("dc civac", address, ret);
 481                 break;
 482         case ESR_ELx_SYS64_ISS_CRM_IC_IVAU:     /* IC IVAU */
 483                 __user_cache_maint("ic ivau", address, ret);
 484                 break;
 485         default:
 486                 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 487                 return;
 488         }
 489
 490         if (ret)
 491                 arm64_notify_segfault(regs, address);
 492         else
 493                 regs->pc += 4;
 494 }
 495
 496 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
 497 {
 498         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 499
 500         regs->regs[rt] = arm64_ftr_reg_ctrel0.sys_val;
 501         regs->pc += 4;
 502 }
 503
 504 static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
 505 {
 506         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 507
 508         isb();
 509         if (rt != 31)
 510                 regs->regs[rt] = arch_counter_get_cntvct();
 511         regs->pc += 4;
 512 }
 513
 514 static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
 515 {
 516         int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
 517
 518         if (rt != 31)
 519                 regs->regs[rt] = read_sysreg(cntfrq_el0);
 520         regs->pc += 4;
 521 }
 522
 523 struct sys64_hook {
 524         unsigned int esr_mask;
 525         unsigned int esr_val;
 526         void (*handler)(unsigned int esr, struct pt_regs *regs);
 527 };
 528
 529 static struct sys64_hook sys64_hooks[] = {
 530         {
 531                 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
 532                 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
 533                 .handler = user_cache_maint_handler,
 534         },
 535         {
 536                 /* Trap read access to CTR_EL0 */
 537                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 538                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
 539                 .handler = ctr_read_handler,
 540         },
 541         {
 542                 /* Trap read access to CNTVCT_EL0 */
 543                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 544                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
 545                 .handler = cntvct_read_handler,
 546         },
 547         {
 548                 /* Trap read access to CNTFRQ_EL0 */
 549                 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
 550                 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
 551                 .handler = cntfrq_read_handler,
 552         },
 553         {},
 554 };
 555
 556 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
 557 {
 558         struct sys64_hook *hook;
 559
 560         for (hook = sys64_hooks; hook->handler; hook++)
 561                 if ((hook->esr_mask & esr) == hook->esr_val) {
 562                         hook->handler(esr, regs);
 563                         return;
 564                 }
 565
 566         force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
 567 }
 568
 569 long compat_arm_syscall(struct pt_regs *regs);
 570
 571 asmlinkage long do_ni_syscall(struct pt_regs *regs)
 572 {
 573 #ifdef CONFIG_COMPAT
 574         long ret;
 575         if (is_compat_task()) {
 576                 ret = compat_arm_syscall(regs);
 577                 if (ret != -ENOSYS)
 578                         return ret;
 579         }
 580 #endif
 581
 582         if (show_unhandled_signals_ratelimited()) {
 583                 pr_info("%s[%d]: syscall %d\n", current->comm,
 584                         task_pid_nr(current), (int)regs->syscallno);
 585                 dump_instr("", regs);
 586                 if (user_mode(regs))
 587                         __show_regs(regs);
 588         }
 589
 590         return sys_ni_syscall();
 591 }
 592
 593 static const char *esr_class_str[] = {
 594         [0 ... ESR_ELx_EC_MAX]          = "UNRECOGNIZED EC",
 595         [ESR_ELx_EC_UNKNOWN]            = "Unknown/Uncategorized",
 596         [ESR_ELx_EC_WFx]                = "WFI/WFE",
 597         [ESR_ELx_EC_CP15_32]            = "CP15 MCR/MRC",
 598         [ESR_ELx_EC_CP15_64]            = "CP15 MCRR/MRRC",
 599         [ESR_ELx_EC_CP14_MR]            = "CP14 MCR/MRC",
 600         [ESR_ELx_EC_CP14_LS]            = "CP14 LDC/STC",
 601         [ESR_ELx_EC_FP_ASIMD]           = "ASIMD",
 602         [ESR_ELx_EC_CP10_ID]            = "CP10 MRC/VMRS",
 603         [ESR_ELx_EC_CP14_64]            = "CP14 MCRR/MRRC",
 604         [ESR_ELx_EC_ILL]                = "PSTATE.IL",
 605         [ESR_ELx_EC_SVC32]              = "SVC (AArch32)",
 606         [ESR_ELx_EC_HVC32]              = "HVC (AArch32)",
 607         [ESR_ELx_EC_SMC32]              = "SMC (AArch32)",
 608         [ESR_ELx_EC_SVC64]              = "SVC (AArch64)",
 609         [ESR_ELx_EC_HVC64]              = "HVC (AArch64)",
 610         [ESR_ELx_EC_SMC64]              = "SMC (AArch64)",
 611         [ESR_ELx_EC_SYS64]              = "MSR/MRS (AArch64)",
 612         [ESR_ELx_EC_IMP_DEF]            = "EL3 IMP DEF",
 613         [ESR_ELx_EC_IABT_LOW]           = "IABT (lower EL)",
 614         [ESR_ELx_EC_IABT_CUR]           = "IABT (current EL)",
 615         [ESR_ELx_EC_PC_ALIGN]           = "PC Alignment",
 616         [ESR_ELx_EC_DABT_LOW]           = "DABT (lower EL)",
 617         [ESR_ELx_EC_DABT_CUR]           = "DABT (current EL)",
 618         [ESR_ELx_EC_SP_ALIGN]           = "SP Alignment",
 619         [ESR_ELx_EC_FP_EXC32]           = "FP (AArch32)",
 620         [ESR_ELx_EC_FP_EXC64]           = "FP (AArch64)",
 621         [ESR_ELx_EC_SERROR]             = "SError",
 622         [ESR_ELx_EC_BREAKPT_LOW]        = "Breakpoint (lower EL)",
 623         [ESR_ELx_EC_BREAKPT_CUR]        = "Breakpoint (current EL)",
 624         [ESR_ELx_EC_SOFTSTP_LOW]        = "Software Step (lower EL)",
 625         [ESR_ELx_EC_SOFTSTP_CUR]        = "Software Step (current EL)",
 626         [ESR_ELx_EC_WATCHPT_LOW]        = "Watchpoint (lower EL)",
 627         [ESR_ELx_EC_WATCHPT_CUR]        = "Watchpoint (current EL)",
 628         [ESR_ELx_EC_BKPT32]             = "BKPT (AArch32)",
 629         [ESR_ELx_EC_VECTOR32]           = "Vector catch (AArch32)",
 630         [ESR_ELx_EC_BRK64]              = "BRK (AArch64)",
 631 };
 632
 633 const char *esr_get_class_string(u32 esr)
 634 {
 635         return esr_class_str[ESR_ELx_EC(esr)];
 636 }
 637
 638 /*
 639  * bad_mode handles the impossible case in the exception vector. This is always
 640  * fatal.
 641  */
 642 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
 643 {
 644         console_verbose();
 645
 646         pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
 647                 handler[reason], smp_processor_id(), esr,
 648                 esr_get_class_string(esr));
 649
 650         die("Oops - bad mode", regs, 0);
 651         local_irq_disable();
 652         panic("bad mode");
 653 }
 654
 655 /*
 656  * bad_el0_sync handles unexpected, but potentially recoverable synchronous
 657  * exceptions taken from EL0. Unlike bad_mode, this returns.
 658  */
 659 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
 660 {
 661         siginfo_t info;
 662         void __user *pc = (void __user *)instruction_pointer(regs);
 663         console_verbose();
 664
 665         pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
 666                 smp_processor_id(), esr, esr_get_class_string(esr));
 667         __show_regs(regs);
 668
 669         info.si_signo = SIGILL;
 670         info.si_errno = 0;
 671         info.si_code  = ILL_ILLOPC;
 672         info.si_addr  = pc;
 673
 674         current->thread.fault_address = 0;
 675         current->thread.fault_code = 0;
 676
 677         force_sig_info(info.si_signo, &info, current);
 678 }
 679
 680 void __pte_error(const char *file, int line, unsigned long val)
 681 {
 682         pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
 683 }
 684
 685 void __pmd_error(const char *file, int line, unsigned long val)
 686 {
 687         pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
 688 }
 689
 690 void __pud_error(const char *file, int line, unsigned long val)
 691 {
 692         pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
 693 }
 694
 695 void __pgd_error(const char *file, int line, unsigned long val)
 696 {
 697         pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
 698 }
 699
 700 /* GENERIC_BUG traps */
 701
 702 int is_valid_bugaddr(unsigned long addr)
 703 {
 704         /*
 705          * bug_handler() only called for BRK #BUG_BRK_IMM.
 706          * So the answer is trivial -- any spurious instances with no
 707          * bug table entry will be rejected by report_bug() and passed
 708          * back to the debug-monitors code and handled as a fatal
 709          * unexpected debug exception.
 710          */
 711         return 1;
 712 }
 713
 714 static int bug_handler(struct pt_regs *regs, unsigned int esr)
 715 {
 716         if (user_mode(regs))
 717                 return DBG_HOOK_ERROR;
 718
 719         switch (report_bug(regs->pc, regs)) {
 720         case BUG_TRAP_TYPE_BUG:
 721                 die("Oops - BUG", regs, 0);
 722                 break;
 723
 724         case BUG_TRAP_TYPE_WARN:
 725                 /* Ideally, report_bug() should backtrace for us... but no. */
 726                 dump_backtrace(regs, NULL);
 727                 break;
 728
 729         default:
 730                 /* unknown/unrecognised bug trap type */
 731                 return DBG_HOOK_ERROR;
 732         }
 733
 734         /* If thread survives, skip over the BUG instruction and continue: */
 735         regs->pc += AARCH64_INSN_SIZE;  /* skip BRK and resume */
 736         return DBG_HOOK_HANDLED;
 737 }
 738
 739 static struct break_hook bug_break_hook = {
 740         .esr_val = 0xf2000000 | BUG_BRK_IMM,
 741         .esr_mask = 0xffffffff,
 742         .fn = bug_handler,
 743 };
 744
 745 /*
 746  * Initial handler for AArch64 BRK exceptions
 747  * This handler only used until debug_traps_init().
 748  */
 749 int __init early_brk64(unsigned long addr, unsigned int esr,
 750                 struct pt_regs *regs)
 751 {
 752         return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
 753 }
 754
 755 /* This registration must happen early, before debug_traps_init(). */
 756 void __init trap_init(void)
 757 {
 758         register_break_hook(&bug_break_hook);
 759 }