2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/cq.h>
35 #include <linux/mlx4/qp.h>
36 #include <linux/skbuff.h>
37 #include <linux/if_ether.h>
38 #include <linux/if_vlan.h>
39 #include <linux/vmalloc.h>
44 static int mlx4_en_get_frag_header(struct skb_frag_struct *frags, void **mac_hdr,
45 void **ip_hdr, void **tcpudp_hdr,
46 u64 *hdr_flags, void *priv)
48 *mac_hdr = page_address(frags->page) + frags->page_offset;
49 *ip_hdr = *mac_hdr + ETH_HLEN;
50 *tcpudp_hdr = (struct tcphdr *)(*ip_hdr + sizeof(struct iphdr));
51 *hdr_flags = LRO_IPV4 | LRO_TCP;
56 static int mlx4_en_alloc_frag(struct mlx4_en_priv *priv,
57 struct mlx4_en_rx_desc *rx_desc,
58 struct skb_frag_struct *skb_frags,
59 struct mlx4_en_rx_alloc *ring_alloc,
62 struct mlx4_en_dev *mdev = priv->mdev;
63 struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
64 struct mlx4_en_rx_alloc *page_alloc = &ring_alloc[i];
68 if (page_alloc->offset == frag_info->last_offset) {
69 /* Allocate new page */
70 page = alloc_pages(GFP_ATOMIC | __GFP_COMP, MLX4_EN_ALLOC_ORDER);
74 skb_frags[i].page = page_alloc->page;
75 skb_frags[i].page_offset = page_alloc->offset;
76 page_alloc->page = page;
77 page_alloc->offset = frag_info->frag_align;
79 page = page_alloc->page;
82 skb_frags[i].page = page;
83 skb_frags[i].page_offset = page_alloc->offset;
84 page_alloc->offset += frag_info->frag_stride;
86 dma = pci_map_single(mdev->pdev, page_address(skb_frags[i].page) +
87 skb_frags[i].page_offset, frag_info->frag_size,
89 rx_desc->data[i].addr = cpu_to_be64(dma);
93 static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
94 struct mlx4_en_rx_ring *ring)
96 struct mlx4_en_rx_alloc *page_alloc;
99 for (i = 0; i < priv->num_frags; i++) {
100 page_alloc = &ring->page_alloc[i];
101 page_alloc->page = alloc_pages(GFP_ATOMIC | __GFP_COMP,
102 MLX4_EN_ALLOC_ORDER);
103 if (!page_alloc->page)
106 page_alloc->offset = priv->frag_info[i].frag_align;
107 en_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n",
108 i, page_alloc->page);
114 page_alloc = &ring->page_alloc[i];
115 put_page(page_alloc->page);
116 page_alloc->page = NULL;
121 static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
122 struct mlx4_en_rx_ring *ring)
124 struct mlx4_en_rx_alloc *page_alloc;
127 for (i = 0; i < priv->num_frags; i++) {
128 page_alloc = &ring->page_alloc[i];
129 en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
130 i, page_count(page_alloc->page));
132 put_page(page_alloc->page);
133 page_alloc->page = NULL;
138 static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
139 struct mlx4_en_rx_ring *ring, int index)
141 struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
142 struct skb_frag_struct *skb_frags = ring->rx_info +
143 (index << priv->log_rx_info);
147 /* Set size and memtype fields */
148 for (i = 0; i < priv->num_frags; i++) {
149 skb_frags[i].size = priv->frag_info[i].frag_size;
150 rx_desc->data[i].byte_count =
151 cpu_to_be32(priv->frag_info[i].frag_size);
152 rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key);
155 /* If the number of used fragments does not fill up the ring stride,
156 * remaining (unused) fragments must be padded with null address/size
157 * and a special memory key */
158 possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE;
159 for (i = priv->num_frags; i < possible_frags; i++) {
160 rx_desc->data[i].byte_count = 0;
161 rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD);
162 rx_desc->data[i].addr = 0;
167 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
168 struct mlx4_en_rx_ring *ring, int index)
170 struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
171 struct skb_frag_struct *skb_frags = ring->rx_info +
172 (index << priv->log_rx_info);
175 for (i = 0; i < priv->num_frags; i++)
176 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, ring->page_alloc, i))
183 put_page(skb_frags[i].page);
187 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
189 *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
192 static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
193 struct mlx4_en_rx_ring *ring,
196 struct mlx4_en_dev *mdev = priv->mdev;
197 struct skb_frag_struct *skb_frags;
198 struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride);
202 skb_frags = ring->rx_info + (index << priv->log_rx_info);
203 for (nr = 0; nr < priv->num_frags; nr++) {
204 en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
205 dma = be64_to_cpu(rx_desc->data[nr].addr);
207 en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
208 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
210 put_page(skb_frags[nr].page);
214 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
216 struct mlx4_en_rx_ring *ring;
221 for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
222 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
223 ring = &priv->rx_ring[ring_ind];
225 if (mlx4_en_prepare_rx_desc(priv, ring,
226 ring->actual_size)) {
227 if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
228 en_err(priv, "Failed to allocate "
229 "enough rx buffers\n");
232 new_size = rounddown_pow_of_two(ring->actual_size);
233 en_warn(priv, "Only %d buffers allocated "
234 "reducing ring size to %d",
235 ring->actual_size, new_size);
246 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
247 ring = &priv->rx_ring[ring_ind];
248 while (ring->actual_size > new_size) {
251 mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
253 ring->size_mask = ring->actual_size - 1;
259 static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
260 struct mlx4_en_rx_ring *ring)
264 en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
265 ring->cons, ring->prod);
267 /* Unmap and free Rx buffers */
268 BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
269 while (ring->cons != ring->prod) {
270 index = ring->cons & ring->size_mask;
271 en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
272 mlx4_en_free_rx_desc(priv, ring, index);
277 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
278 struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
280 struct mlx4_en_dev *mdev = priv->mdev;
288 ring->size_mask = size - 1;
289 ring->stride = stride;
290 ring->log_stride = ffs(ring->stride) - 1;
291 ring->buf_size = ring->size * ring->stride + TXBB_SIZE;
293 tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
294 sizeof(struct skb_frag_struct));
295 ring->rx_info = vmalloc(tmp);
296 if (!ring->rx_info) {
297 en_err(priv, "Failed allocating rx_info ring\n");
300 en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n",
303 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
304 ring->buf_size, 2 * PAGE_SIZE);
308 err = mlx4_en_map_buffer(&ring->wqres.buf);
310 en_err(priv, "Failed to map RX buffer\n");
313 ring->buf = ring->wqres.buf.direct.buf;
315 /* Configure lro mngr */
316 memset(&ring->lro, 0, sizeof(struct net_lro_mgr));
317 ring->lro.dev = priv->dev;
318 ring->lro.features = LRO_F_NAPI;
319 ring->lro.frag_align_pad = NET_IP_ALIGN;
320 ring->lro.ip_summed = CHECKSUM_UNNECESSARY;
321 ring->lro.ip_summed_aggr = CHECKSUM_UNNECESSARY;
322 ring->lro.max_desc = mdev->profile.num_lro;
323 ring->lro.max_aggr = MAX_SKB_FRAGS;
324 ring->lro.lro_arr = kzalloc(mdev->profile.num_lro *
325 sizeof(struct net_lro_desc),
327 if (!ring->lro.lro_arr) {
328 en_err(priv, "Failed to allocate lro array\n");
331 ring->lro.get_frag_header = mlx4_en_get_frag_header;
336 mlx4_en_unmap_buffer(&ring->wqres.buf);
338 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
340 vfree(ring->rx_info);
341 ring->rx_info = NULL;
345 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
347 struct mlx4_en_rx_ring *ring;
351 int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
352 DS_SIZE * priv->num_frags);
354 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
355 ring = &priv->rx_ring[ring_ind];
359 ring->actual_size = 0;
360 ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
362 ring->stride = stride;
363 if (ring->stride <= TXBB_SIZE)
364 ring->buf += TXBB_SIZE;
366 ring->log_stride = ffs(ring->stride) - 1;
367 ring->buf_size = ring->size * ring->stride;
369 memset(ring->buf, 0, ring->buf_size);
370 mlx4_en_update_rx_prod_db(ring);
372 /* Initailize all descriptors */
373 for (i = 0; i < ring->size; i++)
374 mlx4_en_init_rx_desc(priv, ring, i);
376 /* Initialize page allocators */
377 err = mlx4_en_init_allocator(priv, ring);
379 en_err(priv, "Failed initializing ring allocator\n");
384 err = mlx4_en_fill_rx_buffers(priv);
388 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
389 ring = &priv->rx_ring[ring_ind];
391 mlx4_en_update_rx_prod_db(ring);
397 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
398 mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
400 ring_ind = priv->rx_ring_num - 1;
402 while (ring_ind >= 0) {
403 mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]);
409 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
410 struct mlx4_en_rx_ring *ring)
412 struct mlx4_en_dev *mdev = priv->mdev;
414 kfree(ring->lro.lro_arr);
415 mlx4_en_unmap_buffer(&ring->wqres.buf);
416 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size + TXBB_SIZE);
417 vfree(ring->rx_info);
418 ring->rx_info = NULL;
421 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
422 struct mlx4_en_rx_ring *ring)
424 mlx4_en_free_rx_buf(priv, ring);
425 if (ring->stride <= TXBB_SIZE)
426 ring->buf -= TXBB_SIZE;
427 mlx4_en_destroy_allocator(priv, ring);
431 /* Unmap a completed descriptor and free unused pages */
432 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
433 struct mlx4_en_rx_desc *rx_desc,
434 struct skb_frag_struct *skb_frags,
435 struct skb_frag_struct *skb_frags_rx,
436 struct mlx4_en_rx_alloc *page_alloc,
439 struct mlx4_en_dev *mdev = priv->mdev;
440 struct mlx4_en_frag_info *frag_info;
444 /* Collect used fragments while replacing them in the HW descirptors */
445 for (nr = 0; nr < priv->num_frags; nr++) {
446 frag_info = &priv->frag_info[nr];
447 if (length <= frag_info->frag_prefix_size)
450 /* Save page reference in skb */
451 skb_frags_rx[nr].page = skb_frags[nr].page;
452 skb_frags_rx[nr].size = skb_frags[nr].size;
453 skb_frags_rx[nr].page_offset = skb_frags[nr].page_offset;
454 dma = be64_to_cpu(rx_desc->data[nr].addr);
456 /* Allocate a replacement page */
457 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, page_alloc, nr))
461 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
464 /* Adjust size of last fragment to match actual length */
465 skb_frags_rx[nr - 1].size = length -
466 priv->frag_info[nr - 1].frag_prefix_size;
470 /* Drop all accumulated fragments (which have already been replaced in
471 * the descriptor) of this packet; remaining fragments are reused... */
474 put_page(skb_frags_rx[nr].page);
480 static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv,
481 struct mlx4_en_rx_desc *rx_desc,
482 struct skb_frag_struct *skb_frags,
483 struct mlx4_en_rx_alloc *page_alloc,
486 struct mlx4_en_dev *mdev = priv->mdev;
492 skb = dev_alloc_skb(SMALL_PACKET_SIZE + NET_IP_ALIGN);
494 en_dbg(RX_ERR, priv, "Failed allocating skb\n");
497 skb->dev = priv->dev;
498 skb_reserve(skb, NET_IP_ALIGN);
500 skb->truesize = length + sizeof(struct sk_buff);
502 /* Get pointer to first fragment so we could copy the headers into the
503 * (linear part of the) skb */
504 va = page_address(skb_frags[0].page) + skb_frags[0].page_offset;
506 if (length <= SMALL_PACKET_SIZE) {
507 /* We are copying all relevant data to the skb - temporarily
508 * synch buffers for the copy */
509 dma = be64_to_cpu(rx_desc->data[0].addr);
510 dma_sync_single_range_for_cpu(&mdev->pdev->dev, dma, 0,
511 length, DMA_FROM_DEVICE);
512 skb_copy_to_linear_data(skb, va, length);
513 dma_sync_single_range_for_device(&mdev->pdev->dev, dma, 0,
514 length, DMA_FROM_DEVICE);
518 /* Move relevant fragments to skb */
519 used_frags = mlx4_en_complete_rx_desc(priv, rx_desc, skb_frags,
520 skb_shinfo(skb)->frags,
522 if (unlikely(!used_frags)) {
526 skb_shinfo(skb)->nr_frags = used_frags;
528 /* Copy headers into the skb linear buffer */
529 memcpy(skb->data, va, HEADER_COPY_SIZE);
530 skb->tail += HEADER_COPY_SIZE;
532 /* Skip headers in first fragment */
533 skb_shinfo(skb)->frags[0].page_offset += HEADER_COPY_SIZE;
535 /* Adjust size of first fragment */
536 skb_shinfo(skb)->frags[0].size -= HEADER_COPY_SIZE;
537 skb->data_len = length - HEADER_COPY_SIZE;
543 int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
545 struct mlx4_en_priv *priv = netdev_priv(dev);
546 struct mlx4_cqe *cqe;
547 struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
548 struct skb_frag_struct *skb_frags;
549 struct skb_frag_struct lro_frags[MLX4_EN_MAX_RX_FRAGS];
550 struct mlx4_en_rx_desc *rx_desc;
561 /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
562 * descriptor offset can be deduced from the CQE index instead of
563 * reading 'cqe->index' */
564 index = cq->mcq.cons_index & ring->size_mask;
565 cqe = &cq->buf[index];
567 /* Process all completed CQEs */
568 while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
569 cq->mcq.cons_index & cq->size)) {
571 skb_frags = ring->rx_info + (index << priv->log_rx_info);
572 rx_desc = ring->buf + (index << ring->log_stride);
575 * make sure we read the CQE after we read the ownership bit
579 /* Drop packet on bad receive or bad checksum */
580 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
581 MLX4_CQE_OPCODE_ERROR)) {
582 en_err(priv, "CQE completed in error - vendor "
583 "syndrom:%d syndrom:%d\n",
584 ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
585 ((struct mlx4_err_cqe *) cqe)->syndrome);
588 if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
589 en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
594 * Packet is OK - process it.
596 length = be32_to_cpu(cqe->byte_cnt);
597 ring->bytes += length;
600 if (likely(priv->rx_csum)) {
601 if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
602 (cqe->checksum == cpu_to_be16(0xffff))) {
603 priv->port_stats.rx_chksum_good++;
604 /* This packet is eligible for LRO if it is:
605 * - DIX Ethernet (type interpretation)
607 * - without IP options
608 * - not an IP fragment */
609 if (mlx4_en_can_lro(cqe->status) &&
610 dev->features & NETIF_F_LRO) {
612 nr = mlx4_en_complete_rx_desc(
614 skb_frags, lro_frags,
615 ring->page_alloc, length);
619 if (priv->vlgrp && (cqe->vlan_my_qpn &
620 cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK))) {
621 lro_vlan_hwaccel_receive_frags(
622 &ring->lro, lro_frags,
625 be16_to_cpu(cqe->sl_vid),
628 lro_receive_frags(&ring->lro,
637 /* LRO not possible, complete processing here */
638 ip_summed = CHECKSUM_UNNECESSARY;
639 INC_PERF_COUNTER(priv->pstats.lro_misses);
641 ip_summed = CHECKSUM_NONE;
642 priv->port_stats.rx_chksum_none++;
645 ip_summed = CHECKSUM_NONE;
646 priv->port_stats.rx_chksum_none++;
649 skb = mlx4_en_rx_skb(priv, rx_desc, skb_frags,
650 ring->page_alloc, length);
652 priv->stats.rx_dropped++;
656 skb->ip_summed = ip_summed;
657 skb->protocol = eth_type_trans(skb, dev);
658 skb_record_rx_queue(skb, cq->ring);
660 /* Push it up the stack */
661 if (priv->vlgrp && (be32_to_cpu(cqe->vlan_my_qpn) &
662 MLX4_CQE_VLAN_PRESENT_MASK)) {
663 vlan_hwaccel_receive_skb(skb, priv->vlgrp,
664 be16_to_cpu(cqe->sl_vid));
666 netif_receive_skb(skb);
669 ++cq->mcq.cons_index;
670 index = (cq->mcq.cons_index) & ring->size_mask;
671 cqe = &cq->buf[index];
672 if (++polled == budget) {
673 /* We are here because we reached the NAPI budget -
674 * flush only pending LRO sessions */
675 lro_flush_all(&ring->lro);
680 /* If CQ is empty flush all LRO sessions unconditionally */
681 lro_flush_all(&ring->lro);
684 AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
685 mlx4_cq_set_ci(&cq->mcq);
686 wmb(); /* ensure HW sees CQ consumer before we post new buffers */
687 ring->cons = cq->mcq.cons_index;
688 ring->prod += polled; /* Polled descriptors were realocated in place */
689 mlx4_en_update_rx_prod_db(ring);
694 void mlx4_en_rx_irq(struct mlx4_cq *mcq)
696 struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
697 struct mlx4_en_priv *priv = netdev_priv(cq->dev);
700 napi_schedule(&cq->napi);
702 mlx4_en_arm_cq(priv, cq);
705 /* Rx CQ polling - called by NAPI */
706 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
708 struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
709 struct net_device *dev = cq->dev;
710 struct mlx4_en_priv *priv = netdev_priv(dev);
713 done = mlx4_en_process_rx_cq(dev, cq, budget);
715 /* If we used up all the quota - we're probably not done yet... */
717 INC_PERF_COUNTER(priv->pstats.napi_quota);
721 mlx4_en_arm_cq(priv, cq);
727 /* Calculate the last offset position that accomodates a full fragment
728 * (assuming fagment size = stride-align) */
729 static int mlx4_en_last_alloc_offset(struct mlx4_en_priv *priv, u16 stride, u16 align)
731 u16 res = MLX4_EN_ALLOC_SIZE % stride;
732 u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align;
734 en_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d "
735 "res:%d offset:%d\n", stride, align, res, offset);
740 static int frag_sizes[] = {
747 void mlx4_en_calc_rx_buf(struct net_device *dev)
749 struct mlx4_en_priv *priv = netdev_priv(dev);
750 int eff_mtu = dev->mtu + ETH_HLEN + VLAN_HLEN + ETH_LLC_SNAP_SIZE;
754 while (buf_size < eff_mtu) {
755 priv->frag_info[i].frag_size =
756 (eff_mtu > buf_size + frag_sizes[i]) ?
757 frag_sizes[i] : eff_mtu - buf_size;
758 priv->frag_info[i].frag_prefix_size = buf_size;
760 priv->frag_info[i].frag_align = NET_IP_ALIGN;
761 priv->frag_info[i].frag_stride =
762 ALIGN(frag_sizes[i] + NET_IP_ALIGN, SMP_CACHE_BYTES);
764 priv->frag_info[i].frag_align = 0;
765 priv->frag_info[i].frag_stride =
766 ALIGN(frag_sizes[i], SMP_CACHE_BYTES);
768 priv->frag_info[i].last_offset = mlx4_en_last_alloc_offset(
769 priv, priv->frag_info[i].frag_stride,
770 priv->frag_info[i].frag_align);
771 buf_size += priv->frag_info[i].frag_size;
776 priv->rx_skb_size = eff_mtu;
777 priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct));
779 en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
780 "num_frags:%d):\n", eff_mtu, priv->num_frags);
781 for (i = 0; i < priv->num_frags; i++) {
782 en_dbg(DRV, priv, " frag:%d - size:%d prefix:%d align:%d "
783 "stride:%d last_offset:%d\n", i,
784 priv->frag_info[i].frag_size,
785 priv->frag_info[i].frag_prefix_size,
786 priv->frag_info[i].frag_align,
787 priv->frag_info[i].frag_stride,
788 priv->frag_info[i].last_offset);
792 /* RSS related functions */
794 static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn,
795 struct mlx4_en_rx_ring *ring,
796 enum mlx4_qp_state *state,
799 struct mlx4_en_dev *mdev = priv->mdev;
800 struct mlx4_qp_context *context;
803 context = kmalloc(sizeof *context , GFP_KERNEL);
805 en_err(priv, "Failed to allocate qp context\n");
809 err = mlx4_qp_alloc(mdev->dev, qpn, qp);
811 en_err(priv, "Failed to allocate qp #%x\n", qpn);
814 qp->event = mlx4_en_sqp_event;
816 memset(context, 0, sizeof *context);
817 mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 0, 0,
818 qpn, ring->cqn, context);
819 context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma);
821 err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state);
823 mlx4_qp_remove(mdev->dev, qp);
824 mlx4_qp_free(mdev->dev, qp);
826 mlx4_en_update_rx_prod_db(ring);
832 /* Allocate rx qp's and configure them according to rss map */
833 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
835 struct mlx4_en_dev *mdev = priv->mdev;
836 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
837 struct mlx4_qp_context context;
838 struct mlx4_en_rss_context *rss_context;
840 int rss_xor = mdev->profile.rss_xor;
841 u8 rss_mask = mdev->profile.rss_mask;
846 en_dbg(DRV, priv, "Configuring rss steering\n");
847 err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num,
851 en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num);
855 for (i = 0; i < priv->rx_ring_num; i++) {
856 qpn = rss_map->base_qpn + i;
857 err = mlx4_en_config_rss_qp(priv, qpn, &priv->rx_ring[i],
866 /* Configure RSS indirection qp */
867 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &priv->base_qpn);
869 en_err(priv, "Failed to reserve range for RSS "
873 err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
875 en_err(priv, "Failed to allocate RSS indirection QP\n");
878 rss_map->indir_qp.event = mlx4_en_sqp_event;
879 mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
880 priv->rx_ring[0].cqn, &context);
882 ptr = ((void *) &context) + 0x3c;
883 rss_context = (struct mlx4_en_rss_context *) ptr;
884 rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 |
885 (rss_map->base_qpn));
886 rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
887 rss_context->hash_fn = rss_xor & 0x3;
888 rss_context->flags = rss_mask << 2;
890 err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
891 &rss_map->indir_qp, &rss_map->indir_state);
898 mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
899 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
900 mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
901 mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
903 mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
905 for (i = 0; i < good_qps; i++) {
906 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
907 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
908 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
909 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
911 mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
915 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv)
917 struct mlx4_en_dev *mdev = priv->mdev;
918 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
921 mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
922 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
923 mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
924 mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
925 mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
927 for (i = 0; i < priv->rx_ring_num; i++) {
928 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
929 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
930 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
931 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
933 mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);