1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 ******************************************************************************/
19 typedef struct _Dynamic_Initial_Gain_Threshold_
25 u8 Dig_Ext_Port_Stage;
33 u8 CurSTAConnectState;
34 u8 PreSTAConnectState;
35 u8 CurMultiSTAConnectState;
39 u8 BackupIGValue; /* MP DIG */
44 s8 BackoffVal_range_max;
45 s8 BackoffVal_range_min;
68 u8 *pbP2pLinkInProgress;
71 typedef struct false_ALARM_STATISTICS{
77 u32 Cnt_Ofdm_fail_pre; /* For RTL8881A */
81 u32 Cnt_SB_Search_fail;
85 u32 Cnt_BW_USC; /* Gary */
86 u32 Cnt_BW_LSC; /* Gary */
87 }false_ALARM_STATISTICS, *Pfalse_ALARM_STATISTICS;
89 typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
91 DIG_TYPE_THRESH_HIGH = 0,
92 DIG_TYPE_THRESH_LOW = 1,
94 DIG_TYPE_RX_GAIN_MIN = 3,
95 DIG_TYPE_RX_GAIN_MAX = 4,
101 typedef enum tag_ODM_PauseDIG_Type {
102 ODM_PAUSE_DIG = BIT0,
103 ODM_RESUME_DIG = BIT1
104 } ODM_Pause_DIG_TYPE;
106 typedef enum tag_ODM_PauseCCKPD_Type {
107 ODM_PAUSE_CCKPD = BIT0,
108 ODM_RESUME_CCKPD = BIT1
109 } ODM_Pause_CCKPD_TYPE;
111 #define DM_DIG_THRESH_HIGH 40
112 #define DM_DIG_THRESH_LOW 35
114 #define DMfalseALARM_THRESH_LOW 400
115 #define DMfalseALARM_THRESH_HIGH 1000
117 #define DM_DIG_MAX_NIC 0x3e
118 #define DM_DIG_MIN_NIC 0x1e /* 0x22//0x1c */
119 #define DM_DIG_MAX_OF_MIN_NIC 0x3e
121 #define DM_DIG_MAX_AP 0x3e
122 #define DM_DIG_MIN_AP 0x1c
123 #define DM_DIG_MAX_OF_MIN 0x2A /* 0x32 */
124 #define DM_DIG_MIN_AP_DFS 0x20
126 #define DM_DIG_MAX_NIC_HP 0x46
127 #define DM_DIG_MIN_NIC_HP 0x2e
129 #define DM_DIG_MAX_AP_HP 0x42
130 #define DM_DIG_MIN_AP_HP 0x30
132 #define DM_DIG_FA_TH0 0x200/* 0x20 */
134 #define DM_DIG_FA_TH1 0x300
135 #define DM_DIG_FA_TH2 0x400
136 /* this is for 92d */
137 #define DM_DIG_FA_TH0_92D 0x100
138 #define DM_DIG_FA_TH1_92D 0x400
139 #define DM_DIG_FA_TH2_92D 0x600
141 #define DM_DIG_BACKOFF_MAX 12
142 #define DM_DIG_BACKOFF_MIN -4
143 #define DM_DIG_BACKOFF_DEFAULT 10
145 #define DM_DIG_FA_TH0_LPS 4 /* 4 in lps */
146 #define DM_DIG_FA_TH1_LPS 15 /* 15 lps */
147 #define DM_DIG_FA_TH2_LPS 30 /* 30 lps */
148 #define RSSI_OFFSET_DIG 0x05
151 odm_NHMCounterStatisticsInit(
156 odm_NHMCounterStatistics(
171 odm_NHMCounterStatisticsReset(
176 odm_GetNHMCounterStatistics(
181 odm_SearchPwdBLowerBound(
206 ODM_Pause_DIG_TYPE PauseType,
226 odm_FalseAlarmCounterStatistics(
231 odm_FAThresholdCheck(
241 odm_ForbiddenIGICheck(
253 odm_CCKPacketDetectionThresh(
258 ODM_Write_CCK_CCA_Thres(