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staging: rtl8723bs: update to the latest driver
[android-x86/kernel.git] / drivers / staging / rtl8723bs / include / hal_com.h
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  ******************************************************************************/
15 #ifndef __HAL_COMMON_H__
16 #define __HAL_COMMON_H__
17
18 #include "HalVerDef.h"
19 #include "hal_pg.h"
20 #include "hal_phy.h"
21 #include "hal_phy_reg.h"
22 #include "hal_com_reg.h"
23 #include "hal_com_phycfg.h"
24
25 /*------------------------------ Tx Desc definition Macro ------------------------*/
26 /* pragma mark -- Tx Desc related definition. -- */
27 /*  */
28 /*  */
29 /*      Rate */
30 /*  */
31 /*  CCK Rates, TxHT = 0 */
32 #define DESC_RATE1M                                     0x00
33 #define DESC_RATE2M                                     0x01
34 #define DESC_RATE5_5M                           0x02
35 #define DESC_RATE11M                            0x03
36
37 /*  OFDM Rates, TxHT = 0 */
38 #define DESC_RATE6M                                     0x04
39 #define DESC_RATE9M                                     0x05
40 #define DESC_RATE12M                            0x06
41 #define DESC_RATE18M                            0x07
42 #define DESC_RATE24M                            0x08
43 #define DESC_RATE36M                            0x09
44 #define DESC_RATE48M                            0x0a
45 #define DESC_RATE54M                            0x0b
46
47 /*  MCS Rates, TxHT = 1 */
48 #define DESC_RATEMCS0                           0x0c
49 #define DESC_RATEMCS1                           0x0d
50 #define DESC_RATEMCS2                           0x0e
51 #define DESC_RATEMCS3                           0x0f
52 #define DESC_RATEMCS4                           0x10
53 #define DESC_RATEMCS5                           0x11
54 #define DESC_RATEMCS6                           0x12
55 #define DESC_RATEMCS7                           0x13
56 #define DESC_RATEMCS8                           0x14
57 #define DESC_RATEMCS9                           0x15
58 #define DESC_RATEMCS10                          0x16
59 #define DESC_RATEMCS11                          0x17
60 #define DESC_RATEMCS12                          0x18
61 #define DESC_RATEMCS13                          0x19
62 #define DESC_RATEMCS14                          0x1a
63 #define DESC_RATEMCS15                          0x1b
64 #define DESC_RATEMCS16                          0x1C
65 #define DESC_RATEMCS17                          0x1D
66 #define DESC_RATEMCS18                          0x1E
67 #define DESC_RATEMCS19                          0x1F
68 #define DESC_RATEMCS20                          0x20
69 #define DESC_RATEMCS21                          0x21
70 #define DESC_RATEMCS22                          0x22
71 #define DESC_RATEMCS23                          0x23
72 #define DESC_RATEMCS24                          0x24
73 #define DESC_RATEMCS25                          0x25
74 #define DESC_RATEMCS26                          0x26
75 #define DESC_RATEMCS27                          0x27
76 #define DESC_RATEMCS28                          0x28
77 #define DESC_RATEMCS29                          0x29
78 #define DESC_RATEMCS30                          0x2A
79 #define DESC_RATEMCS31                          0x2B
80 #define DESC_RATEVHTSS1MCS0             0x2C
81 #define DESC_RATEVHTSS1MCS1             0x2D
82 #define DESC_RATEVHTSS1MCS2             0x2E
83 #define DESC_RATEVHTSS1MCS3             0x2F
84 #define DESC_RATEVHTSS1MCS4             0x30
85 #define DESC_RATEVHTSS1MCS5             0x31
86 #define DESC_RATEVHTSS1MCS6             0x32
87 #define DESC_RATEVHTSS1MCS7             0x33
88 #define DESC_RATEVHTSS1MCS8             0x34
89 #define DESC_RATEVHTSS1MCS9             0x35
90 #define DESC_RATEVHTSS2MCS0             0x36
91 #define DESC_RATEVHTSS2MCS1             0x37
92 #define DESC_RATEVHTSS2MCS2             0x38
93 #define DESC_RATEVHTSS2MCS3             0x39
94 #define DESC_RATEVHTSS2MCS4             0x3A
95 #define DESC_RATEVHTSS2MCS5             0x3B
96 #define DESC_RATEVHTSS2MCS6             0x3C
97 #define DESC_RATEVHTSS2MCS7             0x3D
98 #define DESC_RATEVHTSS2MCS8             0x3E
99 #define DESC_RATEVHTSS2MCS9             0x3F
100 #define DESC_RATEVHTSS3MCS0             0x40
101 #define DESC_RATEVHTSS3MCS1             0x41
102 #define DESC_RATEVHTSS3MCS2             0x42
103 #define DESC_RATEVHTSS3MCS3             0x43
104 #define DESC_RATEVHTSS3MCS4             0x44
105 #define DESC_RATEVHTSS3MCS5             0x45
106 #define DESC_RATEVHTSS3MCS6             0x46
107 #define DESC_RATEVHTSS3MCS7             0x47
108 #define DESC_RATEVHTSS3MCS8             0x48
109 #define DESC_RATEVHTSS3MCS9             0x49
110 #define DESC_RATEVHTSS4MCS0             0x4A
111 #define DESC_RATEVHTSS4MCS1             0x4B
112 #define DESC_RATEVHTSS4MCS2             0x4C
113 #define DESC_RATEVHTSS4MCS3             0x4D
114 #define DESC_RATEVHTSS4MCS4             0x4E
115 #define DESC_RATEVHTSS4MCS5             0x4F
116 #define DESC_RATEVHTSS4MCS6             0x50
117 #define DESC_RATEVHTSS4MCS7             0x51
118 #define DESC_RATEVHTSS4MCS8             0x52
119 #define DESC_RATEVHTSS4MCS9             0x53
120
121 #define HDATA_RATE(rate)\
122 (rate ==DESC_RATE1M)?"CCK_1M":\
123 (rate ==DESC_RATE2M)?"CCK_2M":\
124 (rate ==DESC_RATE5_5M)?"CCK5_5M":\
125 (rate ==DESC_RATE11M)?"CCK_11M":\
126 (rate ==DESC_RATE6M)?"OFDM_6M":\
127 (rate ==DESC_RATE9M)?"OFDM_9M":\
128 (rate ==DESC_RATE12M)?"OFDM_12M":\
129 (rate ==DESC_RATE18M)?"OFDM_18M":\
130 (rate ==DESC_RATE24M)?"OFDM_24M":\
131 (rate ==DESC_RATE36M)?"OFDM_36M":\
132 (rate ==DESC_RATE48M)?"OFDM_48M":\
133 (rate ==DESC_RATE54M)?"OFDM_54M":\
134 (rate ==DESC_RATEMCS0)?"MCS0":\
135 (rate ==DESC_RATEMCS1)?"MCS1":\
136 (rate ==DESC_RATEMCS2)?"MCS2":\
137 (rate ==DESC_RATEMCS3)?"MCS3":\
138 (rate ==DESC_RATEMCS4)?"MCS4":\
139 (rate ==DESC_RATEMCS5)?"MCS5":\
140 (rate ==DESC_RATEMCS6)?"MCS6":\
141 (rate ==DESC_RATEMCS7)?"MCS7":\
142 (rate ==DESC_RATEMCS8)?"MCS8":\
143 (rate ==DESC_RATEMCS9)?"MCS9":\
144 (rate ==DESC_RATEMCS10)?"MCS10":\
145 (rate ==DESC_RATEMCS11)?"MCS11":\
146 (rate ==DESC_RATEMCS12)?"MCS12":\
147 (rate ==DESC_RATEMCS13)?"MCS13":\
148 (rate ==DESC_RATEMCS14)?"MCS14":\
149 (rate ==DESC_RATEMCS15)?"MCS15":\
150 (rate ==DESC_RATEVHTSS1MCS0)?"VHTSS1MCS0":\
151 (rate ==DESC_RATEVHTSS1MCS1)?"VHTSS1MCS1":\
152 (rate ==DESC_RATEVHTSS1MCS2)?"VHTSS1MCS2":\
153 (rate ==DESC_RATEVHTSS1MCS3)?"VHTSS1MCS3":\
154 (rate ==DESC_RATEVHTSS1MCS4)?"VHTSS1MCS4":\
155 (rate ==DESC_RATEVHTSS1MCS5)?"VHTSS1MCS5":\
156 (rate ==DESC_RATEVHTSS1MCS6)?"VHTSS1MCS6":\
157 (rate ==DESC_RATEVHTSS1MCS7)?"VHTSS1MCS7":\
158 (rate ==DESC_RATEVHTSS1MCS8)?"VHTSS1MCS8":\
159 (rate ==DESC_RATEVHTSS1MCS9)?"VHTSS1MCS9":\
160 (rate ==DESC_RATEVHTSS2MCS0)?"VHTSS2MCS0":\
161 (rate ==DESC_RATEVHTSS2MCS1)?"VHTSS2MCS1":\
162 (rate ==DESC_RATEVHTSS2MCS2)?"VHTSS2MCS2":\
163 (rate ==DESC_RATEVHTSS2MCS3)?"VHTSS2MCS3":\
164 (rate ==DESC_RATEVHTSS2MCS4)?"VHTSS2MCS4":\
165 (rate ==DESC_RATEVHTSS2MCS5)?"VHTSS2MCS5":\
166 (rate ==DESC_RATEVHTSS2MCS6)?"VHTSS2MCS6":\
167 (rate ==DESC_RATEVHTSS2MCS7)?"VHTSS2MCS7":\
168 (rate ==DESC_RATEVHTSS2MCS8)?"VHTSS2MCS8":\
169 (rate ==DESC_RATEVHTSS2MCS9)?"VHTSS2MCS9":"UNKNOW"
170
171
172 enum{
173         UP_LINK,
174         DOWN_LINK,
175 };
176 typedef enum _RT_MEDIA_STATUS {
177         RT_MEDIA_DISCONNECT = 0,
178         RT_MEDIA_CONNECT       = 1
179 } RT_MEDIA_STATUS;
180
181 #define MAX_DLFW_PAGE_SIZE                      4096    /*  @ page : 4k bytes */
182 enum FIRMWARE_SOURCE {
183         FW_SOURCE_IMG_FILE = 0,
184         FW_SOURCE_HEADER_FILE = 1,              /* from header file */
185 };
186
187 /*  BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. */
188 /* define MAX_TX_QUEUE          9 */
189
190 #define TX_SELE_HQ                      BIT(0)          /*  High Queue */
191 #define TX_SELE_LQ                      BIT(1)          /*  Low Queue */
192 #define TX_SELE_NQ                      BIT(2)          /*  Normal Queue */
193 #define TX_SELE_EQ                      BIT(3)          /*  Extern Queue */
194
195 #define PageNum_128(_Len)               (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
196 #define PageNum_256(_Len)               (u32)(((_Len)>>8) + ((_Len)&0xFF ? 1:0))
197 #define PageNum_512(_Len)               (u32)(((_Len)>>9) + ((_Len)&0x1FF ? 1:0))
198 #define PageNum(_Len, _Size)            (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1:0))
199
200
201 u8 rtw_hal_data_init(struct adapter *padapter);
202 void rtw_hal_data_deinit(struct adapter *padapter);
203
204 void dump_chip_info(HAL_VERSION ChipVersion);
205
206 u8 /* return the final channel plan decision */
207 hal_com_config_channel_plan(
208 struct adapter *padapter,
209 u8      hw_channel_plan,        /* channel plan from HW (efuse/eeprom) */
210 u8      sw_channel_plan,        /* channel plan from SW (registry/module param) */
211 u8      def_channel_plan,       /* channel plan used when the former two is invalid */
212 bool            AutoLoadFail
213         );
214
215 bool
216 HAL_IsLegalChannel(
217 struct adapter *Adapter,
218 u32             Channel
219         );
220
221 u8 MRateToHwRate(u8 rate);
222
223 u8 HwRateToMRate(u8 rate);
224
225 void HalSetBrateCfg(
226         struct adapter *        Adapter,
227         u8      *mBratesOS,
228         u16             *pBrateCfg);
229
230 bool
231 Hal_MappingOutPipe(
232 struct adapter *padapter,
233 u8 NumOutPipe
234         );
235
236 void hal_init_macaddr(struct adapter *adapter);
237
238 void rtw_init_hal_com_default_value(struct adapter * Adapter);
239
240 void c2h_evt_clear(struct adapter *adapter);
241 s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf);
242
243 u8  rtw_hal_networktype_to_raid(struct adapter *adapter, struct sta_info *psta);
244 u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type);
245 void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta);
246
247 void hw_var_port_switch (struct adapter *adapter);
248
249 void SetHwReg(struct adapter *padapter, u8 variable, u8 *val);
250 void GetHwReg(struct adapter *padapter, u8 variable, u8 *val);
251 void rtw_hal_check_rxfifo_full(struct adapter *adapter);
252
253 u8 SetHalDefVar(struct adapter *adapter, enum HAL_DEF_VARIABLE variable,
254                 void *value);
255 u8 GetHalDefVar(struct adapter *adapter, enum HAL_DEF_VARIABLE variable,
256                 void *value);
257
258 bool eqNByte(u8 *str1, u8 *str2, u32 num);
259
260 bool IsHexDigit(char chTmp);
261
262 u32 MapCharToHexDigit(char chTmp);
263
264 bool GetHexValueFromString(char *szStr, u32 *pu4bVal, u32 *pu4bMove);
265
266 bool GetFractionValueFromString(char *szStr, u8 *pInteger, u8 *pFraction,
267                                 u32 *pu4bMove);
268
269 bool IsCommentString(char *szStr);
270
271 bool ParseQualifiedString(char *In, u32 *Start, char *Out, char LeftQualifier,
272                           char RightQualifier);
273
274 bool GetU1ByteIntegerFromStringInDecimal(char *str, u8 *in);
275
276 bool isAllSpaceOrTab(u8 *data, u8 size);
277
278 void linked_info_dump(struct adapter *padapter, u8 benable);
279 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
280 void rtw_get_raw_rssi_info(void *sel, struct adapter *padapter);
281 void rtw_store_phy_info(struct adapter *padapter, union recv_frame *prframe);
282 void rtw_dump_raw_rssi_info(struct adapter *padapter);
283 #endif
284
285 #define         HWSET_MAX_SIZE                  512
286
287 void rtw_bb_rf_gain_offset(struct adapter *padapter);
288
289 void GetHalODMVar(struct adapter *Adapter,
290         enum HAL_ODM_VARIABLE           eVariable,
291         void *                          pValue1,
292         void *                          pValue2);
293 void SetHalODMVar(
294         struct adapter *                        Adapter,
295         enum HAL_ODM_VARIABLE           eVariable,
296         void *                          pValue1,
297         bool                                    bSet);
298
299 #ifdef CONFIG_BACKGROUND_NOISE_MONITOR
300 struct noise_info
301 {
302         u8 bPauseDIG;
303         u8 IGIValue;
304         u32 max_time;/* ms */
305         u8 chan;
306 };
307 #endif
308
309 #endif /* __HAL_COMMON_H__ */