x86, tsc: Set the NONSTOP_TSC_S3 feature for ValleyView Soc

BZ: 164108

As it has the same feature as MFLD/CLV/MRFLD.

Change-Id: Ia08c0f4ed0f5bcedf6249d0ee05f5a8a35092e34
Signed-off-by: Feng Tang <feng.tang@intel.com>

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 3ca2721..d3a3cbf 100644 (file)
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -97,6 +97,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
                switch (c->x86_model) {
                case 0x27:      /* Penwell */
                case 0x35:      /* Cloverview */
+               case 0x37:      /* ValleyView */
                case 0x4A:      /* Merrifield */
                        set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
                        break;