1 /****************************************************************************
2 ****************************************************************************
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
10 ****************************************************************************
11 ****************************************************************************/
12 #ifndef __ASM_ARCH_OMAP_MCBSP_H
13 #define __ASM_ARCH_OMAP_MCBSP_H
15 #include <asm/hardware.h>
17 #define OMAP730_MCBSP1_BASE 0xfffb1000
18 #define OMAP730_MCBSP2_BASE 0xfffb1800
20 #define OMAP1510_MCBSP1_BASE 0xe1011800
21 #define OMAP1510_MCBSP2_BASE 0xfffb1000
22 #define OMAP1510_MCBSP3_BASE 0xe1017000
24 #define OMAP1610_MCBSP1_BASE 0xe1011800
25 #define OMAP1610_MCBSP2_BASE 0xfffb1000
26 #define OMAP1610_MCBSP3_BASE 0xe1017000
28 #define OMAP24XX_MCBSP1_BASE 0x48074000
29 #define OMAP24XX_MCBSP2_BASE 0x48076000
31 #define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg)
32 #define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg)
37 #define RSYNC_ERR 0x0008
38 #define RINTM(value) ((value)<<4)
41 #define CLKSTP(value) ((value)<<11)
42 #define RJUST(value) ((value)<<13)
48 #define XSYNC_ERR 0x0008
49 #define XINTM(value) ((value)<<4)
59 #define DR_STAT 0x0010
60 #define DX_STAT 0x0020
61 #define CLKS_STAT 0x0040
69 #define IDLE_EN 0x4000
71 #define RWDLEN1(value) ((value)<<5)
72 #define RFRLEN1(value) ((value)<<8)
74 #define XWDLEN1(value) ((value)<<5)
75 #define XFRLEN1(value) ((value)<<8)
77 #define RDATDLY(value) (value)
79 #define RCOMPAND(value) ((value)<<3)
80 #define RWDLEN2(value) ((value)<<5)
81 #define RFRLEN2(value) ((value)<<8)
84 #define XDATDLY(value) (value)
86 #define XCOMPAND(value) ((value)<<3)
87 #define XWDLEN2(value) ((value)<<5)
88 #define XFRLEN2(value) ((value)<<8)
91 #define CLKGDV(value) (value)
92 #define FWID(value) ((value)<<8)
94 #define FPER(value) (value)
101 #define RCBLK(value) ((value)<<2)
102 #define RPABLK(value) ((value)<<5)
103 #define RPBBLK(value) ((value)<<7)
105 #define XMCM(value) (value)
106 #define XCBLK(value) ((value)<<2)
107 #define XPABLK(value) ((value)<<5)
108 #define XPBBLK(value) ((value)<<7)
110 struct omap_mcbsp_reg_cfg {
142 typedef int __bitwise omap_mcbsp_io_type_t;
143 #define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1)
144 #define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2)
147 OMAP_MCBSP_WORD_8 = 0,
153 } omap_mcbsp_word_length;
156 OMAP_MCBSP_CLK_RISING = 0,
157 OMAP_MCBSP_CLK_FALLING,
158 } omap_mcbsp_clk_polarity;
161 OMAP_MCBSP_FS_ACTIVE_HIGH = 0,
162 OMAP_MCBSP_FS_ACTIVE_LOW,
163 } omap_mcbsp_fs_polarity;
166 OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0,
167 OMAP_MCBSP_CLK_STP_MODE_DELAY,
168 } omap_mcbsp_clk_stp_mode;
171 OMAP_MCBSP_SPI_MASTER = 0,
172 OMAP_MCBSP_SPI_SLAVE,
173 } omap_mcbsp_spi_mode;
175 struct omap_mcbsp_spi_cfg {
176 omap_mcbsp_spi_mode spi_mode;
177 omap_mcbsp_clk_polarity rx_clock_polarity;
178 omap_mcbsp_clk_polarity tx_clock_polarity;
179 omap_mcbsp_fs_polarity fsx_polarity;
181 omap_mcbsp_clk_stp_mode clk_stp_mode;
182 omap_mcbsp_word_length word_length;