firm/bare_metal/common/ntshell/vtrecv.c

   1 /**
   2  * @file vtrecv.c
   3  * @brief VT100互換の受信用パーサの実装。
   4  * @details
   5  * An implementation of Paul Williams' DEC compatible state machine parser
   6  * This code is in the public domain.
   7  *
   8  * @author Joshua Haberman <joshua@reverberate.org>
   9  * @author Shinichiro Nakamura : Modified for Natural Tiny Shell (NT-Shell)
  10  */
  11
  12 #include "vtrecv.h"
  13
  14 /**
  15  * @brief オリジナルに含まれるLUTを使うかどうかを決定する。
  16  * @details
  17  * オリジナルでは、シーケンスの遷移をテーブル参照で実装してあった。
  18  * 15のステートで取りうる256パターンの入力を全網羅するテーブルである。
  19  * これは3840個のテーブルデータを持つことになる。
  20  *
  21  * テーブル参照はメモリに対してリニアアクセス可能なプロセッサにおいて
  22  * 固定時間で動作する。テーブル参照のメリットは固定時間での処理である。
  23  *
  24  * 一方、新たに実装した方法は、重複するデータが多数存在する事に着目した
  25  * もので、区間毎に適用するシーケンスを定義したテーブルを用いる。
  26  * これはテーブルを線形探索するため後方にあるデータになるほど動作は遅い。
  27  * しかし、コードサイズはオリジナルの全網羅形式のテーブルよりも小さい。
  28  *
  29  * @retval 0 使わない。
  30  * @retval 1 使う。
  31  */
  32 #define USE_ORIGINAL_LUT (0)
  33
  34 static state_change_t GET_STATE_TABLE(const int state, const int ch);
  35 static vtrecv_action_t GET_ENTRY_ACTIONS(const int state);
  36 static vtrecv_action_t GET_EXIT_ACTIONS(const int state);
  37
  38 static int vtrecv_strlen(const char *s)
  39 {
  40     const char *p = s;
  41     int cnt = 0;
  42     while (*p) {
  43         cnt++;
  44         p++;
  45     }
  46     return cnt;
  47 }
  48
  49 #if (USE_ORIGINAL_LUT==1)
  50 static const state_change_t STATE_TABLE[15][256] = {
  51     {  /* VTRECV_STATE_ANYWHERE */
  52         0,
  53         0,
  54         0,
  55         0,
  56         0,
  57         0,
  58         0,
  59         0,
  60         0,
  61         0,
  62         0,
  63         0,
  64         0,
  65         0,
  66         0,
  67         0,
  68         0,
  69         0,
  70         0,
  71         0,
  72         0,
  73         0,
  74         0,
  75         0,
  76         /*24 */  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
  77         0,
  78         /*26 */  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
  79         /*27 */  0                                | (VTRECV_STATE_ESCAPE              << 4),
  80         0,
  81         0,
  82         0,
  83         0,
  84         0,
  85         0,
  86         0,
  87         0,
  88         0,
  89         0,
  90         0,
  91         0,
  92         0,
  93         0,
  94         0,
  95         0,
  96         0,
  97         0,
  98         0,
  99         0,
 100         0,
 101         0,
 102         0,
 103         0,
 104         0,
 105         0,
 106         0,
 107         0,
 108         0,
 109         0,
 110         0,
 111         0,
 112         0,
 113         0,
 114         0,
 115         0,
 116         0,
 117         0,
 118         0,
 119         0,
 120         0,
 121         0,
 122         0,
 123         0,
 124         0,
 125         0,
 126         0,
 127         0,
 128         0,
 129         0,
 130         0,
 131         0,
 132         0,
 133         0,
 134         0,
 135         0,
 136         0,
 137         0,
 138         0,
 139         0,
 140         0,
 141         0,
 142         0,
 143         0,
 144         0,
 145         0,
 146         0,
 147         0,
 148         0,
 149         0,
 150         0,
 151         0,
 152         0,
 153         0,
 154         0,
 155         0,
 156         0,
 157         0,
 158         0,
 159         0,
 160         0,
 161         0,
 162         0,
 163         0,
 164         0,
 165         0,
 166         0,
 167         0,
 168         0,
 169         0,
 170         0,
 171         0,
 172         0,
 173         0,
 174         0,
 175         0,
 176         0,
 177         0,
 178         0,
 179         0,
 180         /*128*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 181         /*129*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 182         /*130*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 183         /*131*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 184         /*132*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 185         /*133*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 186         /*134*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 187         /*135*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 188         /*136*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 189         /*137*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 190         /*138*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 191         /*139*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 192         /*140*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 193         /*141*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 194         /*142*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 195         /*143*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 196         /*144*/  0                                | (VTRECV_STATE_DCS_ENTRY           << 4),
 197         /*145*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 198         /*146*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 199         /*147*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 200         /*148*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 201         /*149*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 202         /*150*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 203         /*151*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 204         /*152*/  0                                | (VTRECV_STATE_SOS_PM_APC_STRING   << 4),
 205         /*153*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 206         /*154*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 207         /*155*/  0                                | (VTRECV_STATE_CSI_ENTRY           << 4),
 208         /*156*/  VTRECV_ACTION_EXECUTE            | (VTRECV_STATE_GROUND              << 4),
 209         /*157*/  0                                | (VTRECV_STATE_OSC_STRING          << 4),
 210         /*158*/  0                                | (VTRECV_STATE_SOS_PM_APC_STRING   << 4),
 211         /*159*/  0                                | (VTRECV_STATE_SOS_PM_APC_STRING   << 4),
 212     },
 213     {  /* VTRECV_STATE_CSI_ENTRY */
 214         /*0  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 215         /*1  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 216         /*2  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 217         /*3  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 218         /*4  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 219         /*5  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 220         /*6  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 221         /*7  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 222         /*8  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 223         /*9  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 224         /*10 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 225         /*11 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 226         /*12 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 227         /*13 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 228         /*14 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 229         /*15 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 230         /*16 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 231         /*17 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 232         /*18 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 233         /*19 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 234         /*20 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 235         /*21 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 236         /*22 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 237         /*23 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 238         0,
 239         /*25 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 240         0,
 241         0,
 242         /*28 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 243         /*29 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 244         /*30 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 245         /*31 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 246         /*32 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 247         /*33 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 248         /*34 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 249         /*35 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 250         /*36 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 251         /*37 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 252         /*38 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 253         /*39 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 254         /*40 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 255         /*41 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 256         /*42 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 257         /*43 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 258         /*44 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 259         /*45 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 260         /*46 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 261         /*47 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 262         /*48 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 263         /*49 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 264         /*50 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 265         /*51 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 266         /*52 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 267         /*53 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 268         /*54 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 269         /*55 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 270         /*56 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 271         /*57 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 272         /*58 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 273         /*59 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_CSI_PARAM           << 4),
 274         /*60 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_PARAM           << 4),
 275         /*61 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_PARAM           << 4),
 276         /*62 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_PARAM           << 4),
 277         /*63 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_PARAM           << 4),
 278         /*64 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 279         /*65 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 280         /*66 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 281         /*67 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 282         /*68 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 283         /*69 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 284         /*70 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 285         /*71 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 286         /*72 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 287         /*73 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 288         /*74 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 289         /*75 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 290         /*76 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 291         /*77 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 292         /*78 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 293         /*79 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 294         /*80 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 295         /*81 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 296         /*82 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 297         /*83 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 298         /*84 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 299         /*85 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 300         /*86 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 301         /*87 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 302         /*88 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 303         /*89 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 304         /*90 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 305         /*91 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 306         /*92 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 307         /*93 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 308         /*94 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 309         /*95 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 310         /*96 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 311         /*97 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 312         /*98 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 313         /*99 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 314         /*100*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 315         /*101*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 316         /*102*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 317         /*103*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 318         /*104*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 319         /*105*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 320         /*106*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 321         /*107*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 322         /*108*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 323         /*109*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 324         /*110*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 325         /*111*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 326         /*112*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 327         /*113*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 328         /*114*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 329         /*115*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 330         /*116*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 331         /*117*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 332         /*118*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 333         /*119*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 334         /*120*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 335         /*121*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 336         /*122*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 337         /*123*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 338         /*124*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 339         /*125*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 340         /*126*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 341         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 342     },
 343     {  /* VTRECV_STATE_CSI_IGNORE */
 344         /*0  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 345         /*1  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 346         /*2  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 347         /*3  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 348         /*4  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 349         /*5  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 350         /*6  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 351         /*7  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 352         /*8  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 353         /*9  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 354         /*10 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 355         /*11 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 356         /*12 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 357         /*13 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 358         /*14 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 359         /*15 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 360         /*16 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 361         /*17 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 362         /*18 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 363         /*19 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 364         /*20 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 365         /*21 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 366         /*22 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 367         /*23 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 368         0,
 369         /*25 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 370         0,
 371         0,
 372         /*28 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 373         /*29 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 374         /*30 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 375         /*31 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 376         /*32 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 377         /*33 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 378         /*34 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 379         /*35 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 380         /*36 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 381         /*37 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 382         /*38 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 383         /*39 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 384         /*40 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 385         /*41 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 386         /*42 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 387         /*43 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 388         /*44 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 389         /*45 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 390         /*46 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 391         /*47 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 392         /*48 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 393         /*49 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 394         /*50 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 395         /*51 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 396         /*52 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 397         /*53 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 398         /*54 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 399         /*55 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 400         /*56 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 401         /*57 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 402         /*58 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 403         /*59 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 404         /*60 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 405         /*61 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 406         /*62 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 407         /*63 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 408         /*64 */  0                                | (VTRECV_STATE_GROUND              << 4),
 409         /*65 */  0                                | (VTRECV_STATE_GROUND              << 4),
 410         /*66 */  0                                | (VTRECV_STATE_GROUND              << 4),
 411         /*67 */  0                                | (VTRECV_STATE_GROUND              << 4),
 412         /*68 */  0                                | (VTRECV_STATE_GROUND              << 4),
 413         /*69 */  0                                | (VTRECV_STATE_GROUND              << 4),
 414         /*70 */  0                                | (VTRECV_STATE_GROUND              << 4),
 415         /*71 */  0                                | (VTRECV_STATE_GROUND              << 4),
 416         /*72 */  0                                | (VTRECV_STATE_GROUND              << 4),
 417         /*73 */  0                                | (VTRECV_STATE_GROUND              << 4),
 418         /*74 */  0                                | (VTRECV_STATE_GROUND              << 4),
 419         /*75 */  0                                | (VTRECV_STATE_GROUND              << 4),
 420         /*76 */  0                                | (VTRECV_STATE_GROUND              << 4),
 421         /*77 */  0                                | (VTRECV_STATE_GROUND              << 4),
 422         /*78 */  0                                | (VTRECV_STATE_GROUND              << 4),
 423         /*79 */  0                                | (VTRECV_STATE_GROUND              << 4),
 424         /*80 */  0                                | (VTRECV_STATE_GROUND              << 4),
 425         /*81 */  0                                | (VTRECV_STATE_GROUND              << 4),
 426         /*82 */  0                                | (VTRECV_STATE_GROUND              << 4),
 427         /*83 */  0                                | (VTRECV_STATE_GROUND              << 4),
 428         /*84 */  0                                | (VTRECV_STATE_GROUND              << 4),
 429         /*85 */  0                                | (VTRECV_STATE_GROUND              << 4),
 430         /*86 */  0                                | (VTRECV_STATE_GROUND              << 4),
 431         /*87 */  0                                | (VTRECV_STATE_GROUND              << 4),
 432         /*88 */  0                                | (VTRECV_STATE_GROUND              << 4),
 433         /*89 */  0                                | (VTRECV_STATE_GROUND              << 4),
 434         /*90 */  0                                | (VTRECV_STATE_GROUND              << 4),
 435         /*91 */  0                                | (VTRECV_STATE_GROUND              << 4),
 436         /*92 */  0                                | (VTRECV_STATE_GROUND              << 4),
 437         /*93 */  0                                | (VTRECV_STATE_GROUND              << 4),
 438         /*94 */  0                                | (VTRECV_STATE_GROUND              << 4),
 439         /*95 */  0                                | (VTRECV_STATE_GROUND              << 4),
 440         /*96 */  0                                | (VTRECV_STATE_GROUND              << 4),
 441         /*97 */  0                                | (VTRECV_STATE_GROUND              << 4),
 442         /*98 */  0                                | (VTRECV_STATE_GROUND              << 4),
 443         /*99 */  0                                | (VTRECV_STATE_GROUND              << 4),
 444         /*100*/  0                                | (VTRECV_STATE_GROUND              << 4),
 445         /*101*/  0                                | (VTRECV_STATE_GROUND              << 4),
 446         /*102*/  0                                | (VTRECV_STATE_GROUND              << 4),
 447         /*103*/  0                                | (VTRECV_STATE_GROUND              << 4),
 448         /*104*/  0                                | (VTRECV_STATE_GROUND              << 4),
 449         /*105*/  0                                | (VTRECV_STATE_GROUND              << 4),
 450         /*106*/  0                                | (VTRECV_STATE_GROUND              << 4),
 451         /*107*/  0                                | (VTRECV_STATE_GROUND              << 4),
 452         /*108*/  0                                | (VTRECV_STATE_GROUND              << 4),
 453         /*109*/  0                                | (VTRECV_STATE_GROUND              << 4),
 454         /*110*/  0                                | (VTRECV_STATE_GROUND              << 4),
 455         /*111*/  0                                | (VTRECV_STATE_GROUND              << 4),
 456         /*112*/  0                                | (VTRECV_STATE_GROUND              << 4),
 457         /*113*/  0                                | (VTRECV_STATE_GROUND              << 4),
 458         /*114*/  0                                | (VTRECV_STATE_GROUND              << 4),
 459         /*115*/  0                                | (VTRECV_STATE_GROUND              << 4),
 460         /*116*/  0                                | (VTRECV_STATE_GROUND              << 4),
 461         /*117*/  0                                | (VTRECV_STATE_GROUND              << 4),
 462         /*118*/  0                                | (VTRECV_STATE_GROUND              << 4),
 463         /*119*/  0                                | (VTRECV_STATE_GROUND              << 4),
 464         /*120*/  0                                | (VTRECV_STATE_GROUND              << 4),
 465         /*121*/  0                                | (VTRECV_STATE_GROUND              << 4),
 466         /*122*/  0                                | (VTRECV_STATE_GROUND              << 4),
 467         /*123*/  0                                | (VTRECV_STATE_GROUND              << 4),
 468         /*124*/  0                                | (VTRECV_STATE_GROUND              << 4),
 469         /*125*/  0                                | (VTRECV_STATE_GROUND              << 4),
 470         /*126*/  0                                | (VTRECV_STATE_GROUND              << 4),
 471         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 472     },
 473     {  /* VTRECV_STATE_CSI_INTERMEDIATE */
 474         /*0  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 475         /*1  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 476         /*2  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 477         /*3  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 478         /*4  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 479         /*5  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 480         /*6  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 481         /*7  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 482         /*8  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 483         /*9  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 484         /*10 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 485         /*11 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 486         /*12 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 487         /*13 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 488         /*14 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 489         /*15 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 490         /*16 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 491         /*17 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 492         /*18 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 493         /*19 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 494         /*20 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 495         /*21 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 496         /*22 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 497         /*23 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 498         0,
 499         /*25 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 500         0,
 501         0,
 502         /*28 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 503         /*29 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 504         /*30 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 505         /*31 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 506         /*32 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 507         /*33 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 508         /*34 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 509         /*35 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 510         /*36 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 511         /*37 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 512         /*38 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 513         /*39 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 514         /*40 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 515         /*41 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 516         /*42 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 517         /*43 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 518         /*44 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 519         /*45 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 520         /*46 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 521         /*47 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
 522         /*48 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 523         /*49 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 524         /*50 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 525         /*51 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 526         /*52 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 527         /*53 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 528         /*54 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 529         /*55 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 530         /*56 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 531         /*57 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 532         /*58 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 533         /*59 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 534         /*60 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 535         /*61 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 536         /*62 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 537         /*63 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 538         /*64 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 539         /*65 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 540         /*66 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 541         /*67 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 542         /*68 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 543         /*69 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 544         /*70 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 545         /*71 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 546         /*72 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 547         /*73 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 548         /*74 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 549         /*75 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 550         /*76 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 551         /*77 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 552         /*78 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 553         /*79 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 554         /*80 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 555         /*81 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 556         /*82 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 557         /*83 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 558         /*84 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 559         /*85 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 560         /*86 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 561         /*87 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 562         /*88 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 563         /*89 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 564         /*90 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 565         /*91 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 566         /*92 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 567         /*93 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 568         /*94 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 569         /*95 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 570         /*96 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 571         /*97 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 572         /*98 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 573         /*99 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 574         /*100*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 575         /*101*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 576         /*102*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 577         /*103*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 578         /*104*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 579         /*105*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 580         /*106*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 581         /*107*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 582         /*108*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 583         /*109*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 584         /*110*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 585         /*111*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 586         /*112*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 587         /*113*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 588         /*114*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 589         /*115*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 590         /*116*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 591         /*117*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 592         /*118*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 593         /*119*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 594         /*120*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 595         /*121*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 596         /*122*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 597         /*123*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 598         /*124*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 599         /*125*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 600         /*126*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 601         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 602     },
 603     {  /* VTRECV_STATE_CSI_PARAM */
 604         /*0  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 605         /*1  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 606         /*2  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 607         /*3  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 608         /*4  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 609         /*5  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 610         /*6  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 611         /*7  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 612         /*8  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 613         /*9  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 614         /*10 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 615         /*11 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 616         /*12 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 617         /*13 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 618         /*14 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 619         /*15 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 620         /*16 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 621         /*17 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 622         /*18 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 623         /*19 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 624         /*20 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 625         /*21 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 626         /*22 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 627         /*23 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 628         0,
 629         /*25 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 630         0,
 631         0,
 632         /*28 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 633         /*29 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 634         /*30 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 635         /*31 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
 636         /*32 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 637         /*33 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 638         /*34 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 639         /*35 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 640         /*36 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 641         /*37 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 642         /*38 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 643         /*39 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 644         /*40 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 645         /*41 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 646         /*42 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 647         /*43 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 648         /*44 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 649         /*45 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 650         /*46 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 651         /*47 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_CSI_INTERMEDIATE    << 4),
 652         /*48 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 653         /*49 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 654         /*50 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 655         /*51 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 656         /*52 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 657         /*53 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 658         /*54 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 659         /*55 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 660         /*56 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 661         /*57 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 662         /*58 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 663         /*59 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
 664         /*60 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 665         /*61 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 666         /*62 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 667         /*63 */  0                                | (VTRECV_STATE_CSI_IGNORE          << 4),
 668         /*64 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 669         /*65 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 670         /*66 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 671         /*67 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 672         /*68 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 673         /*69 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 674         /*70 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 675         /*71 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 676         /*72 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 677         /*73 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 678         /*74 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 679         /*75 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 680         /*76 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 681         /*77 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 682         /*78 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 683         /*79 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 684         /*80 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 685         /*81 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 686         /*82 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 687         /*83 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 688         /*84 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 689         /*85 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 690         /*86 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 691         /*87 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 692         /*88 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 693         /*89 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 694         /*90 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 695         /*91 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 696         /*92 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 697         /*93 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 698         /*94 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 699         /*95 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 700         /*96 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 701         /*97 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 702         /*98 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 703         /*99 */  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 704         /*100*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 705         /*101*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 706         /*102*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 707         /*103*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 708         /*104*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 709         /*105*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 710         /*106*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 711         /*107*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 712         /*108*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 713         /*109*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 714         /*110*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 715         /*111*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 716         /*112*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 717         /*113*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 718         /*114*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 719         /*115*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 720         /*116*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 721         /*117*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 722         /*118*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 723         /*119*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 724         /*120*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 725         /*121*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 726         /*122*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 727         /*123*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 728         /*124*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 729         /*125*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 730         /*126*/  VTRECV_ACTION_CSI_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
 731         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 732     },
 733     {  /* VTRECV_STATE_DCS_ENTRY */
 734         /*0  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 735         /*1  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 736         /*2  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 737         /*3  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 738         /*4  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 739         /*5  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 740         /*6  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 741         /*7  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 742         /*8  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 743         /*9  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 744         /*10 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 745         /*11 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 746         /*12 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 747         /*13 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 748         /*14 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 749         /*15 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 750         /*16 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 751         /*17 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 752         /*18 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 753         /*19 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 754         /*20 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 755         /*21 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 756         /*22 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 757         /*23 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 758         0,
 759         /*25 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 760         0,
 761         0,
 762         /*28 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 763         /*29 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 764         /*30 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 765         /*31 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 766         /*32 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 767         /*33 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 768         /*34 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 769         /*35 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 770         /*36 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 771         /*37 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 772         /*38 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 773         /*39 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 774         /*40 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 775         /*41 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 776         /*42 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 777         /*43 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 778         /*44 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 779         /*45 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 780         /*46 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 781         /*47 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
 782         /*48 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 783         /*49 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 784         /*50 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 785         /*51 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 786         /*52 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 787         /*53 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 788         /*54 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 789         /*55 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 790         /*56 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 791         /*57 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 792         /*58 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
 793         /*59 */  VTRECV_ACTION_PARAM              | (VTRECV_STATE_DCS_PARAM           << 4),
 794         /*60 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_PARAM           << 4),
 795         /*61 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_PARAM           << 4),
 796         /*62 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_PARAM           << 4),
 797         /*63 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_PARAM           << 4),
 798         /*64 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 799         /*65 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 800         /*66 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 801         /*67 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 802         /*68 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 803         /*69 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 804         /*70 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 805         /*71 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 806         /*72 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 807         /*73 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 808         /*74 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 809         /*75 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 810         /*76 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 811         /*77 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 812         /*78 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 813         /*79 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 814         /*80 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 815         /*81 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 816         /*82 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 817         /*83 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 818         /*84 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 819         /*85 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 820         /*86 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 821         /*87 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 822         /*88 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 823         /*89 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 824         /*90 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 825         /*91 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 826         /*92 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 827         /*93 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 828         /*94 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 829         /*95 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 830         /*96 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 831         /*97 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 832         /*98 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 833         /*99 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 834         /*100*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 835         /*101*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 836         /*102*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 837         /*103*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 838         /*104*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 839         /*105*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 840         /*106*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 841         /*107*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 842         /*108*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 843         /*109*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 844         /*110*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 845         /*111*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 846         /*112*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 847         /*113*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 848         /*114*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 849         /*115*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 850         /*116*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 851         /*117*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 852         /*118*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 853         /*119*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 854         /*120*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 855         /*121*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 856         /*122*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 857         /*123*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 858         /*124*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 859         /*125*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 860         /*126*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
 861         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 862     },
 863     {  /* VTRECV_STATE_DCS_IGNORE */
 864         /*0  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 865         /*1  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 866         /*2  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 867         /*3  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 868         /*4  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 869         /*5  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 870         /*6  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 871         /*7  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 872         /*8  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 873         /*9  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 874         /*10 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 875         /*11 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 876         /*12 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 877         /*13 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 878         /*14 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 879         /*15 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 880         /*16 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 881         /*17 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 882         /*18 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 883         /*19 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 884         /*20 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 885         /*21 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 886         /*22 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 887         /*23 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 888         0,
 889         /*25 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 890         0,
 891         0,
 892         /*28 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 893         /*29 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 894         /*30 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 895         /*31 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 896         /*32 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 897         /*33 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 898         /*34 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 899         /*35 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 900         /*36 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 901         /*37 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 902         /*38 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 903         /*39 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 904         /*40 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 905         /*41 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 906         /*42 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 907         /*43 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 908         /*44 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 909         /*45 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 910         /*46 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 911         /*47 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 912         /*48 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 913         /*49 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 914         /*50 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 915         /*51 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 916         /*52 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 917         /*53 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 918         /*54 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 919         /*55 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 920         /*56 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 921         /*57 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 922         /*58 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 923         /*59 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 924         /*60 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 925         /*61 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 926         /*62 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 927         /*63 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 928         /*64 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 929         /*65 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 930         /*66 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 931         /*67 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 932         /*68 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 933         /*69 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 934         /*70 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 935         /*71 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 936         /*72 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 937         /*73 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 938         /*74 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 939         /*75 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 940         /*76 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 941         /*77 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 942         /*78 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 943         /*79 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 944         /*80 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 945         /*81 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 946         /*82 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 947         /*83 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 948         /*84 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 949         /*85 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 950         /*86 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 951         /*87 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 952         /*88 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 953         /*89 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 954         /*90 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 955         /*91 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 956         /*92 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 957         /*93 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 958         /*94 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 959         /*95 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 960         /*96 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 961         /*97 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 962         /*98 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 963         /*99 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 964         /*100*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 965         /*101*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 966         /*102*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 967         /*103*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 968         /*104*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 969         /*105*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 970         /*106*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 971         /*107*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 972         /*108*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 973         /*109*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 974         /*110*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 975         /*111*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 976         /*112*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 977         /*113*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 978         /*114*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 979         /*115*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 980         /*116*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 981         /*117*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 982         /*118*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 983         /*119*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 984         /*120*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 985         /*121*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 986         /*122*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 987         /*123*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 988         /*124*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 989         /*125*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 990         /*126*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 991         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
 992         0,
 993         0,
 994         0,
 995         0,
 996         0,
 997         0,
 998         0,
 999         0,
1000         0,
1001         0,
1002         0,
1003         0,
1004         0,
1005         0,
1006         0,
1007         0,
1008         0,
1009         0,
1010         0,
1011         0,
1012         0,
1013         0,
1014         0,
1015         0,
1016         0,
1017         0,
1018         0,
1019         0,
1020         /*156*/  0                                | (VTRECV_STATE_GROUND              << 4),
1021     },
1022     {  /* VTRECV_STATE_DCS_INTERMEDIATE */
1023         /*0  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1024         /*1  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1025         /*2  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1026         /*3  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1027         /*4  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1028         /*5  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1029         /*6  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1030         /*7  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1031         /*8  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1032         /*9  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1033         /*10 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1034         /*11 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1035         /*12 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1036         /*13 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1037         /*14 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1038         /*15 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1039         /*16 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1040         /*17 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1041         /*18 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1042         /*19 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1043         /*20 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1044         /*21 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1045         /*22 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1046         /*23 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1047         0,
1048         /*25 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1049         0,
1050         0,
1051         /*28 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1052         /*29 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1053         /*30 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1054         /*31 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1055         /*32 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1056         /*33 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1057         /*34 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1058         /*35 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1059         /*36 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1060         /*37 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1061         /*38 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1062         /*39 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1063         /*40 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1064         /*41 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1065         /*42 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1066         /*43 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1067         /*44 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1068         /*45 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1069         /*46 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1070         /*47 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1071         /*48 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1072         /*49 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1073         /*50 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1074         /*51 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1075         /*52 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1076         /*53 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1077         /*54 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1078         /*55 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1079         /*56 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1080         /*57 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1081         /*58 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1082         /*59 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1083         /*60 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1084         /*61 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1085         /*62 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1086         /*63 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1087         /*64 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1088         /*65 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1089         /*66 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1090         /*67 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1091         /*68 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1092         /*69 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1093         /*70 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1094         /*71 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1095         /*72 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1096         /*73 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1097         /*74 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1098         /*75 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1099         /*76 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1100         /*77 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1101         /*78 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1102         /*79 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1103         /*80 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1104         /*81 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1105         /*82 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1106         /*83 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1107         /*84 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1108         /*85 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1109         /*86 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1110         /*87 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1111         /*88 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1112         /*89 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1113         /*90 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1114         /*91 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1115         /*92 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1116         /*93 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1117         /*94 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1118         /*95 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1119         /*96 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1120         /*97 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1121         /*98 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1122         /*99 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1123         /*100*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1124         /*101*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1125         /*102*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1126         /*103*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1127         /*104*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1128         /*105*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1129         /*106*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1130         /*107*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1131         /*108*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1132         /*109*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1133         /*110*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1134         /*111*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1135         /*112*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1136         /*113*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1137         /*114*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1138         /*115*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1139         /*116*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1140         /*117*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1141         /*118*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1142         /*119*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1143         /*120*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1144         /*121*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1145         /*122*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1146         /*123*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1147         /*124*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1148         /*125*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1149         /*126*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1150         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1151     },
1152     {  /* VTRECV_STATE_DCS_PARAM */
1153         /*0  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1154         /*1  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1155         /*2  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1156         /*3  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1157         /*4  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1158         /*5  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1159         /*6  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1160         /*7  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1161         /*8  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1162         /*9  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1163         /*10 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1164         /*11 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1165         /*12 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1166         /*13 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1167         /*14 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1168         /*15 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1169         /*16 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1170         /*17 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1171         /*18 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1172         /*19 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1173         /*20 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1174         /*21 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1175         /*22 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1176         /*23 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1177         0,
1178         /*25 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1179         0,
1180         0,
1181         /*28 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1182         /*29 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1183         /*30 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1184         /*31 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1185         /*32 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1186         /*33 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1187         /*34 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1188         /*35 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1189         /*36 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1190         /*37 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1191         /*38 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1192         /*39 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1193         /*40 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1194         /*41 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1195         /*42 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1196         /*43 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1197         /*44 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1198         /*45 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1199         /*46 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1200         /*47 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_DCS_INTERMEDIATE    << 4),
1201         /*48 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1202         /*49 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1203         /*50 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1204         /*51 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1205         /*52 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1206         /*53 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1207         /*54 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1208         /*55 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1209         /*56 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1210         /*57 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1211         /*58 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1212         /*59 */  VTRECV_ACTION_PARAM              | (0                                 << 4),
1213         /*60 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1214         /*61 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1215         /*62 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1216         /*63 */  0                                | (VTRECV_STATE_DCS_IGNORE          << 4),
1217         /*64 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1218         /*65 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1219         /*66 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1220         /*67 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1221         /*68 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1222         /*69 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1223         /*70 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1224         /*71 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1225         /*72 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1226         /*73 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1227         /*74 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1228         /*75 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1229         /*76 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1230         /*77 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1231         /*78 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1232         /*79 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1233         /*80 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1234         /*81 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1235         /*82 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1236         /*83 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1237         /*84 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1238         /*85 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1239         /*86 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1240         /*87 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1241         /*88 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1242         /*89 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1243         /*90 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1244         /*91 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1245         /*92 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1246         /*93 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1247         /*94 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1248         /*95 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1249         /*96 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1250         /*97 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1251         /*98 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1252         /*99 */  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1253         /*100*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1254         /*101*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1255         /*102*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1256         /*103*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1257         /*104*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1258         /*105*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1259         /*106*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1260         /*107*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1261         /*108*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1262         /*109*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1263         /*110*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1264         /*111*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1265         /*112*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1266         /*113*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1267         /*114*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1268         /*115*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1269         /*116*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1270         /*117*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1271         /*118*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1272         /*119*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1273         /*120*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1274         /*121*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1275         /*122*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1276         /*123*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1277         /*124*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1278         /*125*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1279         /*126*/  0                                | (VTRECV_STATE_DCS_PASSTHROUGH     << 4),
1280         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1281     },
1282     {  /* VTRECV_STATE_DCS_PASSTHROUGH */
1283         /*0  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1284         /*1  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1285         /*2  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1286         /*3  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1287         /*4  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1288         /*5  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1289         /*6  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1290         /*7  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1291         /*8  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1292         /*9  */  VTRECV_ACTION_PUT                | (0                                 << 4),
1293         /*10 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1294         /*11 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1295         /*12 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1296         /*13 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1297         /*14 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1298         /*15 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1299         /*16 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1300         /*17 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1301         /*18 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1302         /*19 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1303         /*20 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1304         /*21 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1305         /*22 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1306         /*23 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1307         0,
1308         /*25 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1309         0,
1310         0,
1311         /*28 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1312         /*29 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1313         /*30 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1314         /*31 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1315         /*32 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1316         /*33 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1317         /*34 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1318         /*35 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1319         /*36 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1320         /*37 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1321         /*38 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1322         /*39 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1323         /*40 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1324         /*41 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1325         /*42 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1326         /*43 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1327         /*44 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1328         /*45 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1329         /*46 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1330         /*47 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1331         /*48 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1332         /*49 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1333         /*50 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1334         /*51 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1335         /*52 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1336         /*53 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1337         /*54 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1338         /*55 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1339         /*56 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1340         /*57 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1341         /*58 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1342         /*59 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1343         /*60 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1344         /*61 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1345         /*62 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1346         /*63 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1347         /*64 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1348         /*65 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1349         /*66 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1350         /*67 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1351         /*68 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1352         /*69 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1353         /*70 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1354         /*71 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1355         /*72 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1356         /*73 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1357         /*74 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1358         /*75 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1359         /*76 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1360         /*77 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1361         /*78 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1362         /*79 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1363         /*80 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1364         /*81 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1365         /*82 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1366         /*83 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1367         /*84 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1368         /*85 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1369         /*86 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1370         /*87 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1371         /*88 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1372         /*89 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1373         /*90 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1374         /*91 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1375         /*92 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1376         /*93 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1377         /*94 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1378         /*95 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1379         /*96 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1380         /*97 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1381         /*98 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1382         /*99 */  VTRECV_ACTION_PUT                | (0                                 << 4),
1383         /*100*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1384         /*101*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1385         /*102*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1386         /*103*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1387         /*104*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1388         /*105*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1389         /*106*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1390         /*107*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1391         /*108*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1392         /*109*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1393         /*110*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1394         /*111*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1395         /*112*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1396         /*113*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1397         /*114*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1398         /*115*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1399         /*116*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1400         /*117*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1401         /*118*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1402         /*119*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1403         /*120*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1404         /*121*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1405         /*122*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1406         /*123*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1407         /*124*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1408         /*125*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1409         /*126*/  VTRECV_ACTION_PUT                | (0                                 << 4),
1410         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1411         0,
1412         0,
1413         0,
1414         0,
1415         0,
1416         0,
1417         0,
1418         0,
1419         0,
1420         0,
1421         0,
1422         0,
1423         0,
1424         0,
1425         0,
1426         0,
1427         0,
1428         0,
1429         0,
1430         0,
1431         0,
1432         0,
1433         0,
1434         0,
1435         0,
1436         0,
1437         0,
1438         0,
1439         /*156*/  0                                | (VTRECV_STATE_GROUND              << 4),
1440     },
1441     {  /* VTRECV_STATE_ESCAPE */
1442         /*0  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1443         /*1  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1444         /*2  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1445         /*3  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1446         /*4  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1447         /*5  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1448         /*6  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1449         /*7  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1450         /*8  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1451         /*9  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1452         /*10 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1453         /*11 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1454         /*12 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1455         /*13 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1456         /*14 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1457         /*15 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1458         /*16 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1459         /*17 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1460         /*18 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1461         /*19 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1462         /*20 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1463         /*21 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1464         /*22 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1465         /*23 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1466         0,
1467         /*25 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1468         0,
1469         0,
1470         /*28 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1471         /*29 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1472         /*30 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1473         /*31 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1474         /*32 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1475         /*33 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1476         /*34 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1477         /*35 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1478         /*36 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1479         /*37 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1480         /*38 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1481         /*39 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1482         /*40 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1483         /*41 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1484         /*42 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1485         /*43 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1486         /*44 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1487         /*45 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1488         /*46 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1489         /*47 */  VTRECV_ACTION_COLLECT            | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4),
1490         /*48 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1491         /*49 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1492         /*50 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1493         /*51 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1494         /*52 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1495         /*53 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1496         /*54 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1497         /*55 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1498         /*56 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1499         /*57 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1500         /*58 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1501         /*59 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1502         /*60 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1503         /*61 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1504         /*62 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1505         /*63 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1506         /*64 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1507         /*65 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1508         /*66 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1509         /*67 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1510         /*68 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1511         /*69 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1512         /*70 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1513         /*71 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1514         /*72 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1515         /*73 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1516         /*74 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1517         /*75 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1518         /*76 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1519         /*77 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1520         /*78 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1521         /*79 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1522         /*80 */  0                                | (VTRECV_STATE_DCS_ENTRY           << 4),
1523         /*81 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1524         /*82 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1525         /*83 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1526         /*84 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1527         /*85 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1528         /*86 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1529         /*87 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1530         /*88 */  0                                | (VTRECV_STATE_SOS_PM_APC_STRING   << 4),
1531         /*89 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1532         /*90 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1533         /*91 */  0                                | (VTRECV_STATE_CSI_ENTRY           << 4),
1534         /*92 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1535         /*93 */  0                                | (VTRECV_STATE_OSC_STRING          << 4),
1536         /*94 */  0                                | (VTRECV_STATE_SOS_PM_APC_STRING   << 4),
1537         /*95 */  0                                | (VTRECV_STATE_SOS_PM_APC_STRING   << 4),
1538         /*96 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1539         /*97 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1540         /*98 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1541         /*99 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1542         /*100*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1543         /*101*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1544         /*102*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1545         /*103*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1546         /*104*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1547         /*105*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1548         /*106*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1549         /*107*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1550         /*108*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1551         /*109*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1552         /*110*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1553         /*111*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1554         /*112*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1555         /*113*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1556         /*114*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1557         /*115*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1558         /*116*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1559         /*117*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1560         /*118*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1561         /*119*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1562         /*120*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1563         /*121*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1564         /*122*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1565         /*123*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1566         /*124*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1567         /*125*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1568         /*126*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1569         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1570     },
1571     {  /* VTRECV_STATE_ESCAPE_INTERMEDIATE */
1572         /*0  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1573         /*1  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1574         /*2  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1575         /*3  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1576         /*4  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1577         /*5  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1578         /*6  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1579         /*7  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1580         /*8  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1581         /*9  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1582         /*10 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1583         /*11 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1584         /*12 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1585         /*13 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1586         /*14 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1587         /*15 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1588         /*16 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1589         /*17 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1590         /*18 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1591         /*19 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1592         /*20 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1593         /*21 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1594         /*22 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1595         /*23 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1596         0,
1597         /*25 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1598         0,
1599         0,
1600         /*28 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1601         /*29 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1602         /*30 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1603         /*31 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1604         /*32 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1605         /*33 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1606         /*34 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1607         /*35 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1608         /*36 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1609         /*37 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1610         /*38 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1611         /*39 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1612         /*40 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1613         /*41 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1614         /*42 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1615         /*43 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1616         /*44 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1617         /*45 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1618         /*46 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1619         /*47 */  VTRECV_ACTION_COLLECT            | (0                                 << 4),
1620         /*48 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1621         /*49 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1622         /*50 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1623         /*51 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1624         /*52 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1625         /*53 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1626         /*54 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1627         /*55 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1628         /*56 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1629         /*57 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1630         /*58 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1631         /*59 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1632         /*60 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1633         /*61 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1634         /*62 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1635         /*63 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1636         /*64 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1637         /*65 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1638         /*66 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1639         /*67 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1640         /*68 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1641         /*69 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1642         /*70 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1643         /*71 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1644         /*72 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1645         /*73 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1646         /*74 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1647         /*75 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1648         /*76 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1649         /*77 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1650         /*78 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1651         /*79 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1652         /*80 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1653         /*81 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1654         /*82 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1655         /*83 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1656         /*84 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1657         /*85 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1658         /*86 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1659         /*87 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1660         /*88 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1661         /*89 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1662         /*90 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1663         /*91 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1664         /*92 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1665         /*93 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1666         /*94 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1667         /*95 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1668         /*96 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1669         /*97 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1670         /*98 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1671         /*99 */  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1672         /*100*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1673         /*101*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1674         /*102*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1675         /*103*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1676         /*104*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1677         /*105*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1678         /*106*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1679         /*107*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1680         /*108*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1681         /*109*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1682         /*110*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1683         /*111*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1684         /*112*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1685         /*113*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1686         /*114*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1687         /*115*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1688         /*116*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1689         /*117*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1690         /*118*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1691         /*119*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1692         /*120*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1693         /*121*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1694         /*122*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1695         /*123*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1696         /*124*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1697         /*125*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1698         /*126*/  VTRECV_ACTION_ESC_DISPATCH       | (VTRECV_STATE_GROUND              << 4),
1699         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1700     },
1701     {  /* VTRECV_STATE_GROUND */
1702         /*0  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1703         /*1  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1704         /*2  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1705         /*3  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1706         /*4  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1707         /*5  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1708         /*6  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1709         /*7  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1710         /*8  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1711         /*9  */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1712         /*10 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1713         /*11 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1714         /*12 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1715         /*13 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1716         /*14 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1717         /*15 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1718         /*16 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1719         /*17 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1720         /*18 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1721         /*19 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1722         /*20 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1723         /*21 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1724         /*22 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1725         /*23 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1726         0,
1727         /*25 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1728         0,
1729         0,
1730         /*28 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1731         /*29 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1732         /*30 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1733         /*31 */  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1734         /*32 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1735         /*33 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1736         /*34 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1737         /*35 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1738         /*36 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1739         /*37 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1740         /*38 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1741         /*39 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1742         /*40 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1743         /*41 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1744         /*42 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1745         /*43 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1746         /*44 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1747         /*45 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1748         /*46 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1749         /*47 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1750         /*48 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1751         /*49 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1752         /*50 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1753         /*51 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1754         /*52 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1755         /*53 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1756         /*54 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1757         /*55 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1758         /*56 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1759         /*57 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1760         /*58 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1761         /*59 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1762         /*60 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1763         /*61 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1764         /*62 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1765         /*63 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1766         /*64 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1767         /*65 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1768         /*66 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1769         /*67 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1770         /*68 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1771         /*69 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1772         /*70 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1773         /*71 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1774         /*72 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1775         /*73 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1776         /*74 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1777         /*75 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1778         /*76 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1779         /*77 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1780         /*78 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1781         /*79 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1782         /*80 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1783         /*81 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1784         /*82 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1785         /*83 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1786         /*84 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1787         /*85 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1788         /*86 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1789         /*87 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1790         /*88 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1791         /*89 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1792         /*90 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1793         /*91 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1794         /*92 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1795         /*93 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1796         /*94 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1797         /*95 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1798         /*96 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1799         /*97 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1800         /*98 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1801         /*99 */  VTRECV_ACTION_PRINT              | (0                                 << 4),
1802         /*100*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1803         /*101*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1804         /*102*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1805         /*103*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1806         /*104*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1807         /*105*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1808         /*106*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1809         /*107*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1810         /*108*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1811         /*109*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1812         /*110*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1813         /*111*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1814         /*112*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1815         /*113*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1816         /*114*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1817         /*115*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1818         /*116*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1819         /*117*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1820         /*118*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1821         /*119*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1822         /*120*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1823         /*121*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1824         /*122*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1825         /*123*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1826         /*124*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1827         /*125*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1828         /*126*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1829         /*127*/  VTRECV_ACTION_PRINT              | (0                                 << 4),
1830         /*128*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1831         /*129*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1832         /*130*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1833         /*131*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1834         /*132*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1835         /*133*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1836         /*134*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1837         /*135*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1838         /*136*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1839         /*137*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1840         /*138*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1841         /*139*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1842         /*140*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1843         /*141*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1844         /*142*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1845         /*143*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1846         0,
1847         /*145*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1848         /*146*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1849         /*147*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1850         /*148*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1851         /*149*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1852         /*150*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1853         /*151*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1854         /*152*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1855         /*153*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1856         /*154*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1857         0,
1858         /*156*/  VTRECV_ACTION_EXECUTE            | (0                                 << 4),
1859     },
1860     {  /* VTRECV_STATE_OSC_STRING */
1861         /*0  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1862         /*1  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1863         /*2  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1864         /*3  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1865         /*4  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1866         /*5  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1867         /*6  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1868         /*7  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1869         /*8  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1870         /*9  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1871         /*10 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1872         /*11 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1873         /*12 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1874         /*13 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1875         /*14 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1876         /*15 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1877         /*16 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1878         /*17 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1879         /*18 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1880         /*19 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1881         /*20 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1882         /*21 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1883         /*22 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1884         /*23 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1885         0,
1886         /*25 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1887         0,
1888         0,
1889         /*28 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1890         /*29 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1891         /*30 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1892         /*31 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
1893         /*32 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1894         /*33 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1895         /*34 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1896         /*35 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1897         /*36 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1898         /*37 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1899         /*38 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1900         /*39 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1901         /*40 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1902         /*41 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1903         /*42 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1904         /*43 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1905         /*44 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1906         /*45 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1907         /*46 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1908         /*47 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1909         /*48 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1910         /*49 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1911         /*50 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1912         /*51 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1913         /*52 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1914         /*53 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1915         /*54 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1916         /*55 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1917         /*56 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1918         /*57 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1919         /*58 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1920         /*59 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1921         /*60 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1922         /*61 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1923         /*62 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1924         /*63 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1925         /*64 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1926         /*65 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1927         /*66 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1928         /*67 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1929         /*68 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1930         /*69 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1931         /*70 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1932         /*71 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1933         /*72 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1934         /*73 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1935         /*74 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1936         /*75 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1937         /*76 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1938         /*77 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1939         /*78 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1940         /*79 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1941         /*80 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1942         /*81 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1943         /*82 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1944         /*83 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1945         /*84 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1946         /*85 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1947         /*86 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1948         /*87 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1949         /*88 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1950         /*89 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1951         /*90 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1952         /*91 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1953         /*92 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1954         /*93 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1955         /*94 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1956         /*95 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1957         /*96 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1958         /*97 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1959         /*98 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1960         /*99 */  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1961         /*100*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1962         /*101*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1963         /*102*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1964         /*103*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1965         /*104*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1966         /*105*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1967         /*106*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1968         /*107*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1969         /*108*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1970         /*109*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1971         /*110*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1972         /*111*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1973         /*112*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1974         /*113*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1975         /*114*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1976         /*115*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1977         /*116*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1978         /*117*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1979         /*118*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1980         /*119*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1981         /*120*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1982         /*121*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1983         /*122*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1984         /*123*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1985         /*124*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1986         /*125*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1987         /*126*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1988         /*127*/  VTRECV_ACTION_OSC_PUT            | (0                                 << 4),
1989         0,
1990         0,
1991         0,
1992         0,
1993         0,
1994         0,
1995         0,
1996         0,
1997         0,
1998         0,
1999         0,
2000         0,
2001         0,
2002         0,
2003         0,
2004         0,
2005         0,
2006         0,
2007         0,
2008         0,
2009         0,
2010         0,
2011         0,
2012         0,
2013         0,
2014         0,
2015         0,
2016         0,
2017         /*156*/  0                                | (VTRECV_STATE_GROUND              << 4),
2018     },
2019     {  /* VTRECV_STATE_SOS_PM_APC_STRING */
2020         /*0  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2021         /*1  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2022         /*2  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2023         /*3  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2024         /*4  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2025         /*5  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2026         /*6  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2027         /*7  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2028         /*8  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2029         /*9  */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2030         /*10 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2031         /*11 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2032         /*12 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2033         /*13 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2034         /*14 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2035         /*15 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2036         /*16 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2037         /*17 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2038         /*18 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2039         /*19 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2040         /*20 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2041         /*21 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2042         /*22 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2043         /*23 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2044         0,
2045         /*25 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2046         0,
2047         0,
2048         /*28 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2049         /*29 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2050         /*30 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2051         /*31 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2052         /*32 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2053         /*33 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2054         /*34 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2055         /*35 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2056         /*36 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2057         /*37 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2058         /*38 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2059         /*39 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2060         /*40 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2061         /*41 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2062         /*42 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2063         /*43 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2064         /*44 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2065         /*45 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2066         /*46 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2067         /*47 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2068         /*48 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2069         /*49 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2070         /*50 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2071         /*51 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2072         /*52 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2073         /*53 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2074         /*54 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2075         /*55 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2076         /*56 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2077         /*57 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2078         /*58 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2079         /*59 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2080         /*60 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2081         /*61 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2082         /*62 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2083         /*63 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2084         /*64 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2085         /*65 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2086         /*66 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2087         /*67 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2088         /*68 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2089         /*69 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2090         /*70 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2091         /*71 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2092         /*72 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2093         /*73 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2094         /*74 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2095         /*75 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2096         /*76 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2097         /*77 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2098         /*78 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2099         /*79 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2100         /*80 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2101         /*81 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2102         /*82 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2103         /*83 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2104         /*84 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2105         /*85 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2106         /*86 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2107         /*87 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2108         /*88 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2109         /*89 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2110         /*90 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2111         /*91 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2112         /*92 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2113         /*93 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2114         /*94 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2115         /*95 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2116         /*96 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2117         /*97 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2118         /*98 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2119         /*99 */  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2120         /*100*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2121         /*101*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2122         /*102*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2123         /*103*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2124         /*104*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2125         /*105*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2126         /*106*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2127         /*107*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2128         /*108*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2129         /*109*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2130         /*110*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2131         /*111*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2132         /*112*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2133         /*113*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2134         /*114*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2135         /*115*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2136         /*116*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2137         /*117*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2138         /*118*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2139         /*119*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2140         /*120*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2141         /*121*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2142         /*122*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2143         /*123*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2144         /*124*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2145         /*125*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2146         /*126*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2147         /*127*/  VTRECV_ACTION_IGNORE             | (0                                 << 4),
2148         0,
2149         0,
2150         0,
2151         0,
2152         0,
2153         0,
2154         0,
2155         0,
2156         0,
2157         0,
2158         0,
2159         0,
2160         0,
2161         0,
2162         0,
2163         0,
2164         0,
2165         0,
2166         0,
2167         0,
2168         0,
2169         0,
2170         0,
2171         0,
2172         0,
2173         0,
2174         0,
2175         0,
2176         /*156*/  0                                | (VTRECV_STATE_GROUND              << 4),
2177     },
2178 };
2179 #else
2180 typedef struct {
2181     int state;
2182     unsigned char code_start;
2183     unsigned char code_end;
2184     state_change_t state_change;
2185 } state_table_t;
2186
2187 static const state_table_t table[] = {
2188     /*
2189      * ANYWHERE
2190      */
2191     {VTRECV_STATE_ANYWHERE,             0x18, 0x18, VTRECV_ACTION_EXECUTE       | (VTRECV_STATE_GROUND              << 4)},
2192     {VTRECV_STATE_ANYWHERE,             0x1a, 0x1a, VTRECV_ACTION_EXECUTE       | (VTRECV_STATE_GROUND              << 4)},
2193     {VTRECV_STATE_ANYWHERE,             0x80, 0x8f, VTRECV_ACTION_EXECUTE       | (VTRECV_STATE_GROUND              << 4)},
2194     {VTRECV_STATE_ANYWHERE,             0x91, 0x97, VTRECV_ACTION_EXECUTE       | (VTRECV_STATE_GROUND              << 4)},
2195     {VTRECV_STATE_ANYWHERE,             0x99, 0x99, VTRECV_ACTION_EXECUTE       | (VTRECV_STATE_GROUND              << 4)},
2196     {VTRECV_STATE_ANYWHERE,             0x9a, 0x9a, VTRECV_ACTION_EXECUTE       | (VTRECV_STATE_GROUND              << 4)},
2197     {VTRECV_STATE_ANYWHERE,             0x9c, 0x9c, VTRECV_ACTION_EXECUTE       | (VTRECV_STATE_GROUND              << 4)},
2198     {VTRECV_STATE_ANYWHERE,             0x1b, 0x1b, 0                           | (VTRECV_STATE_ESCAPE              << 4)},
2199     {VTRECV_STATE_ANYWHERE,             0x98, 0x98, 0                           | (VTRECV_STATE_SOS_PM_APC_STRING   << 4)},
2200     {VTRECV_STATE_ANYWHERE,             0x9e, 0x9e, 0                           | (VTRECV_STATE_SOS_PM_APC_STRING   << 4)},
2201     {VTRECV_STATE_ANYWHERE,             0x9f, 0x9f, 0                           | (VTRECV_STATE_SOS_PM_APC_STRING   << 4)},
2202     {VTRECV_STATE_ANYWHERE,             0x90, 0x90, 0                           | (VTRECV_STATE_DCS_ENTRY           << 4)},
2203     {VTRECV_STATE_ANYWHERE,             0x9d, 0x9d, 0                           | (VTRECV_STATE_OSC_STRING          << 4)},
2204     {VTRECV_STATE_ANYWHERE,             0x9b, 0x9b, 0                           | (VTRECV_STATE_CSI_ENTRY           << 4)},
2205     /*
2206      * GROUND
2207      */
2208     {VTRECV_STATE_GROUND,               0x00, 0x17, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2209     {VTRECV_STATE_GROUND,               0x19, 0x19, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2210     {VTRECV_STATE_GROUND,               0x1c, 0x1f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2211     {VTRECV_STATE_GROUND,               0x20, 0x7f, VTRECV_ACTION_PRINT         | (0                                << 4)},
2212     {VTRECV_STATE_GROUND,               0x80, 0x8f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2213     {VTRECV_STATE_GROUND,               0x91, 0x9a, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2214     {VTRECV_STATE_GROUND,               0x9c, 0x9c, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2215     /*
2216      * ESCAPE
2217      */
2218     {VTRECV_STATE_ESCAPE,               0x00, 0x17, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2219     {VTRECV_STATE_ESCAPE,               0x19, 0x19, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2220     {VTRECV_STATE_ESCAPE,               0x1c, 0x1f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2221     {VTRECV_STATE_ESCAPE,               0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2222     {VTRECV_STATE_ESCAPE,               0x20, 0x2f, VTRECV_ACTION_COLLECT       | (VTRECV_STATE_ESCAPE_INTERMEDIATE << 4)},
2223     {VTRECV_STATE_ESCAPE,               0x30, 0x4f, VTRECV_ACTION_ESC_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2224     {VTRECV_STATE_ESCAPE,               0x51, 0x57, VTRECV_ACTION_ESC_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2225     {VTRECV_STATE_ESCAPE,               0x59, 0x59, VTRECV_ACTION_ESC_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2226     {VTRECV_STATE_ESCAPE,               0x5a, 0x5a, VTRECV_ACTION_ESC_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2227     {VTRECV_STATE_ESCAPE,               0x5c, 0x5c, VTRECV_ACTION_ESC_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2228     {VTRECV_STATE_ESCAPE,               0x60, 0x7e, VTRECV_ACTION_ESC_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2229     {VTRECV_STATE_ESCAPE,               0x5b, 0x5b, 0                           | (VTRECV_STATE_CSI_ENTRY           << 4)},
2230     {VTRECV_STATE_ESCAPE,               0x5d, 0x5d, 0                           | (VTRECV_STATE_OSC_STRING          << 4)},
2231     {VTRECV_STATE_ESCAPE,               0x50, 0x50, 0                           | (VTRECV_STATE_DCS_ENTRY           << 4)},
2232     {VTRECV_STATE_ESCAPE,               0x58, 0x58, 0                           | (VTRECV_STATE_SOS_PM_APC_STRING   << 4)},
2233     {VTRECV_STATE_ESCAPE,               0x5e, 0x5e, 0                           | (VTRECV_STATE_SOS_PM_APC_STRING   << 4)},
2234     {VTRECV_STATE_ESCAPE,               0x5f, 0x5f, 0                           | (VTRECV_STATE_SOS_PM_APC_STRING   << 4)},
2235     /*
2236      * ESCAPE_INTERMEDIATE
2237      */
2238     {VTRECV_STATE_ESCAPE_INTERMEDIATE,  0x00, 0x17, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2239     {VTRECV_STATE_ESCAPE_INTERMEDIATE,  0x19, 0x19, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2240     {VTRECV_STATE_ESCAPE_INTERMEDIATE,  0x1c, 0x1f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2241     {VTRECV_STATE_ESCAPE_INTERMEDIATE,  0x20, 0x2f, VTRECV_ACTION_COLLECT       | (0                                << 4)},
2242     {VTRECV_STATE_ESCAPE_INTERMEDIATE,  0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2243     {VTRECV_STATE_ESCAPE_INTERMEDIATE,  0x30, 0x7e, VTRECV_ACTION_ESC_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2244     /*
2245      * CSI_ENTRY
2246      */
2247     {VTRECV_STATE_CSI_ENTRY,            0x00, 0x17, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2248     {VTRECV_STATE_CSI_ENTRY,            0x19, 0x19, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2249     {VTRECV_STATE_CSI_ENTRY,            0x1c, 0x1f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2250     {VTRECV_STATE_CSI_ENTRY,            0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2251     {VTRECV_STATE_CSI_ENTRY,            0x20, 0x2f, VTRECV_ACTION_COLLECT       | (VTRECV_STATE_CSI_INTERMEDIATE    << 4)},
2252     {VTRECV_STATE_CSI_ENTRY,            0x3a, 0x3a, 0                           | (VTRECV_STATE_CSI_IGNORE          << 4)},
2253     {VTRECV_STATE_CSI_ENTRY,            0x30, 0x39, VTRECV_ACTION_PARAM         | (VTRECV_STATE_CSI_PARAM           << 4)},
2254     {VTRECV_STATE_CSI_ENTRY,            0x3b, 0x3b, VTRECV_ACTION_PARAM         | (VTRECV_STATE_CSI_PARAM           << 4)},
2255     {VTRECV_STATE_CSI_ENTRY,            0x3c, 0x3f, VTRECV_ACTION_COLLECT       | (VTRECV_STATE_CSI_PARAM           << 4)},
2256     {VTRECV_STATE_CSI_ENTRY,            0x40, 0x7e, VTRECV_ACTION_CSI_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2257     /*
2258      * CSI_IGNORE
2259      */
2260     {VTRECV_STATE_CSI_IGNORE,           0x00, 0x17, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2261     {VTRECV_STATE_CSI_IGNORE,           0x19, 0x19, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2262     {VTRECV_STATE_CSI_IGNORE,           0x1c, 0x1f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2263     {VTRECV_STATE_CSI_IGNORE,           0x20, 0x3f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2264     {VTRECV_STATE_CSI_IGNORE,           0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2265     {VTRECV_STATE_CSI_IGNORE,           0x40, 0x7e, 0                           | (VTRECV_STATE_GROUND              << 4)},
2266     /*
2267      * CSI_PARAM
2268      */
2269     {VTRECV_STATE_CSI_PARAM,            0x00, 0x17, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2270     {VTRECV_STATE_CSI_PARAM,            0x19, 0x19, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2271     {VTRECV_STATE_CSI_PARAM,            0x1c, 0x1f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2272     {VTRECV_STATE_CSI_PARAM,            0x30, 0x39, VTRECV_ACTION_PARAM         | (0                                << 4)},
2273     {VTRECV_STATE_CSI_PARAM,            0x3b, 0x3b, VTRECV_ACTION_PARAM         | (0                                << 4)},
2274     {VTRECV_STATE_CSI_PARAM,            0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2275     {VTRECV_STATE_CSI_PARAM,            0x3a, 0x3a, 0                           | (VTRECV_STATE_CSI_IGNORE          << 4)},
2276     {VTRECV_STATE_CSI_PARAM,            0x3c, 0x3f, 0                           | (VTRECV_STATE_CSI_IGNORE          << 4)},
2277     {VTRECV_STATE_CSI_PARAM,            0x20, 0x2f, VTRECV_ACTION_COLLECT       | (VTRECV_STATE_CSI_INTERMEDIATE    << 4)},
2278     {VTRECV_STATE_CSI_PARAM,            0x40, 0x7e, VTRECV_ACTION_CSI_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2279     /*
2280      * CSI_INTERMEDIATE
2281      */
2282     {VTRECV_STATE_CSI_INTERMEDIATE,     0x00, 0x17, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2283     {VTRECV_STATE_CSI_INTERMEDIATE,     0x19, 0x19, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2284     {VTRECV_STATE_CSI_INTERMEDIATE,     0x1c, 0x1f, VTRECV_ACTION_EXECUTE       | (0                                << 4)},
2285     {VTRECV_STATE_CSI_INTERMEDIATE,     0x20, 0x2f, VTRECV_ACTION_COLLECT       | (0                                << 4)},
2286     {VTRECV_STATE_CSI_INTERMEDIATE,     0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2287     {VTRECV_STATE_CSI_INTERMEDIATE,     0x30, 0x3f, 0                           | (VTRECV_STATE_CSI_IGNORE          << 4)},
2288     {VTRECV_STATE_CSI_INTERMEDIATE,     0x40, 0x7e, VTRECV_ACTION_CSI_DISPATCH  | (VTRECV_STATE_GROUND              << 4)},
2289     /*
2290      * DCS_ENTRY
2291      */
2292     {VTRECV_STATE_DCS_ENTRY,            0x00, 0x17, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2293     {VTRECV_STATE_DCS_ENTRY,            0x19, 0x19, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2294     {VTRECV_STATE_DCS_ENTRY,            0x1c, 0x1f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2295     {VTRECV_STATE_DCS_ENTRY,            0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2296     {VTRECV_STATE_DCS_ENTRY,            0x3a, 0x3a, 0                           | (VTRECV_STATE_DCS_IGNORE          << 4)},
2297     {VTRECV_STATE_DCS_ENTRY,            0x20, 0x2f, VTRECV_ACTION_COLLECT       | (VTRECV_STATE_DCS_INTERMEDIATE    << 4)},
2298     {VTRECV_STATE_DCS_ENTRY,            0x30, 0x39, VTRECV_ACTION_PARAM         | (VTRECV_STATE_DCS_PARAM           << 4)},
2299     {VTRECV_STATE_DCS_ENTRY,            0x3b, 0x3b, VTRECV_ACTION_PARAM         | (VTRECV_STATE_DCS_PARAM           << 4)},
2300     {VTRECV_STATE_DCS_ENTRY,            0x3c, 0x3f, VTRECV_ACTION_COLLECT       | (VTRECV_STATE_DCS_PARAM           << 4)},
2301     {VTRECV_STATE_DCS_ENTRY,            0x40, 0x7e, 0                           | (VTRECV_STATE_DCS_PASSTHROUGH     << 4)},
2302     /*
2303      * DCS_INTERMEDIATE
2304      */
2305     {VTRECV_STATE_DCS_INTERMEDIATE,     0x00, 0x17, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2306     {VTRECV_STATE_DCS_INTERMEDIATE,     0x19, 0x19, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2307     {VTRECV_STATE_DCS_INTERMEDIATE,     0x1c, 0x1f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2308     {VTRECV_STATE_DCS_INTERMEDIATE,     0x20, 0x2f, VTRECV_ACTION_COLLECT       | (0                                << 4)},
2309     {VTRECV_STATE_DCS_INTERMEDIATE,     0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2310     {VTRECV_STATE_DCS_INTERMEDIATE,     0x30, 0x3f, 0                           | (VTRECV_STATE_DCS_IGNORE          << 4)},
2311     {VTRECV_STATE_DCS_INTERMEDIATE,     0x40, 0x7e, 0                           | (VTRECV_STATE_DCS_PASSTHROUGH     << 4)},
2312     /*
2313      * DCS_IGNORE
2314      */
2315     {VTRECV_STATE_DCS_IGNORE,           0x00, 0x17, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2316     {VTRECV_STATE_DCS_IGNORE,           0x19, 0x19, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2317     {VTRECV_STATE_DCS_IGNORE,           0x1c, 0x1f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2318     {VTRECV_STATE_DCS_IGNORE,           0x20, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2319     {VTRECV_STATE_DCS_IGNORE,           0x9c, 0x9c, 0                           | (VTRECV_STATE_GROUND              << 4)},
2320     /*
2321      * DCS_PARAM
2322      */
2323     {VTRECV_STATE_DCS_PARAM,            0x00, 0x17, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2324     {VTRECV_STATE_DCS_PARAM,            0x19, 0x19, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2325     {VTRECV_STATE_DCS_PARAM,            0x1c, 0x1f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2326     {VTRECV_STATE_DCS_PARAM,            0x30, 0x39, VTRECV_ACTION_PARAM         | (0                                << 4)},
2327     {VTRECV_STATE_DCS_PARAM,            0x3b, 0x3b, VTRECV_ACTION_PARAM         | (0                                << 4)},
2328     {VTRECV_STATE_DCS_PARAM,            0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2329     {VTRECV_STATE_DCS_PARAM,            0x3a, 0x3a, 0                           | (VTRECV_STATE_DCS_IGNORE          << 4)},
2330     {VTRECV_STATE_DCS_PARAM,            0x3c, 0x3f, 0                           | (VTRECV_STATE_DCS_IGNORE          << 4)},
2331     {VTRECV_STATE_DCS_PARAM,            0x20, 0x2f, VTRECV_ACTION_COLLECT       | (VTRECV_STATE_DCS_INTERMEDIATE    << 4)},
2332     {VTRECV_STATE_DCS_PARAM,            0x40, 0x7e, 0                           | (VTRECV_STATE_DCS_PASSTHROUGH     << 4)},
2333     /*
2334      * DCS_PASSTHROUGH
2335      */
2336     {VTRECV_STATE_DCS_PASSTHROUGH,      0x00, 0x17, VTRECV_ACTION_PUT           | (0                                << 4)},
2337     {VTRECV_STATE_DCS_PASSTHROUGH,      0x19, 0x19, VTRECV_ACTION_PUT           | (0                                << 4)},
2338     {VTRECV_STATE_DCS_PASSTHROUGH,      0x1c, 0x1f, VTRECV_ACTION_PUT           | (0                                << 4)},
2339     {VTRECV_STATE_DCS_PASSTHROUGH,      0x20, 0x7e, VTRECV_ACTION_PUT           | (0                                << 4)},
2340     {VTRECV_STATE_DCS_PASSTHROUGH,      0x7f, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2341     {VTRECV_STATE_DCS_PASSTHROUGH,      0x9c, 0x9c, 0                           | (VTRECV_STATE_GROUND              << 4)},
2342     /*
2343      * SOS_PM_APC_STRING
2344      */
2345     {VTRECV_STATE_SOS_PM_APC_STRING,    0x00, 0x17, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2346     {VTRECV_STATE_SOS_PM_APC_STRING,    0x19, 0x19, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2347     {VTRECV_STATE_SOS_PM_APC_STRING,    0x1c, 0x1f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2348     {VTRECV_STATE_SOS_PM_APC_STRING,    0x20, 0x7f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2349     {VTRECV_STATE_SOS_PM_APC_STRING,    0x9c, 0x9c, 0                           | (VTRECV_STATE_GROUND              << 4)},
2350     /*
2351      * OSC_STRING
2352      */
2353     {VTRECV_STATE_OSC_STRING,           0x00, 0x17, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2354     {VTRECV_STATE_OSC_STRING,           0x19, 0x19, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2355     {VTRECV_STATE_OSC_STRING,           0x1c, 0x1f, VTRECV_ACTION_IGNORE        | (0                                << 4)},
2356     {VTRECV_STATE_OSC_STRING,           0x20, 0x7f, VTRECV_ACTION_OSC_PUT       | (0                                << 4)},
2357     {VTRECV_STATE_OSC_STRING,           0x9c, 0x9c, 0                           | (VTRECV_STATE_GROUND              << 4)},
2358 };
2359 #endif
2360
2361 static const vtrecv_action_t ENTRY_ACTIONS[] = {
2362     (vtrecv_action_t)0  /* none for ANYWHERE */,
2363     VTRECV_ACTION_CLEAR, /* CSI_ENTRY */
2364     (vtrecv_action_t)0  /* none for CSI_IGNORE */,
2365     (vtrecv_action_t)0  /* none for CSI_INTERMEDIATE */,
2366     (vtrecv_action_t)0  /* none for CSI_PARAM */,
2367     VTRECV_ACTION_CLEAR, /* DCS_ENTRY */
2368     (vtrecv_action_t)0  /* none for DCS_IGNORE */,
2369     (vtrecv_action_t)0  /* none for DCS_INTERMEDIATE */,
2370     (vtrecv_action_t)0  /* none for DCS_PARAM */,
2371     VTRECV_ACTION_HOOK, /* DCS_PASSTHROUGH */
2372     VTRECV_ACTION_CLEAR, /* ESCAPE */
2373     (vtrecv_action_t)0  /* none for ESCAPE_INTERMEDIATE */,
2374     (vtrecv_action_t)0  /* none for GROUND */,
2375     VTRECV_ACTION_OSC_START, /* OSC_STRING */
2376     (vtrecv_action_t)0  /* none for SOS_PM_APC_STRING */,
2377 };
2378
2379 static const vtrecv_action_t EXIT_ACTIONS[] = {
2380     (vtrecv_action_t)0  /* none for ANYWHERE */,
2381     (vtrecv_action_t)0  /* none for CSI_ENTRY */,
2382     (vtrecv_action_t)0  /* none for CSI_IGNORE */,
2383     (vtrecv_action_t)0  /* none for CSI_INTERMEDIATE */,
2384     (vtrecv_action_t)0  /* none for CSI_PARAM */,
2385     (vtrecv_action_t)0  /* none for DCS_ENTRY */,
2386     (vtrecv_action_t)0  /* none for DCS_IGNORE */,
2387     (vtrecv_action_t)0  /* none for DCS_INTERMEDIATE */,
2388     (vtrecv_action_t)0  /* none for DCS_PARAM */,
2389     VTRECV_ACTION_UNHOOK, /* DCS_PASSTHROUGH */
2390     (vtrecv_action_t)0  /* none for ESCAPE */,
2391     (vtrecv_action_t)0  /* none for ESCAPE_INTERMEDIATE */,
2392     (vtrecv_action_t)0  /* none for GROUND */,
2393     VTRECV_ACTION_OSC_END, /* OSC_STRING */
2394     (vtrecv_action_t)0  /* none for SOS_PM_APC_STRING */,
2395 };
2396
2397 state_change_t GET_STATE_TABLE(const int state, const int ch)
2398 {
2399 #if (USE_ORIGINAL_LUT==1)
2400     /*
2401      * テーブル参照による実現。
2402      * 固定時間で動作するが、コードサイズは比較的大きい。
2403      */
2404     return STATE_TABLE[state][ch];
2405 #else
2406     /*
2407      * プログラムによる線形探索バージョン。
2408      * テーブルの後方にあるデータになるほど動作は遅い。
2409      * コードサイズはテーブル参照よりも小さい。
2410      */
2411     const int N = sizeof(table) / sizeof(table[0]);
2412     const state_table_t *tp = &table[0];
2413     int i;
2414     for (i = 0; i < N; i++) {
2415         if (tp->state == state) {
2416             if ((tp->code_start <= ch) && (ch <= tp->code_end)) {
2417                 return tp->state_change;
2418             }
2419         }
2420         tp++;
2421     }
2422     return 0;
2423 #endif
2424 }
2425
2426 vtrecv_action_t GET_ENTRY_ACTIONS(const int state)
2427 {
2428     return ENTRY_ACTIONS[state];
2429 }
2430
2431 vtrecv_action_t GET_EXIT_ACTIONS(const int state)
2432 {
2433     return EXIT_ACTIONS[state];
2434 }
2435
2436 void vtrecv_init(vtrecv_t *parser, vtrecv_callback_t cb)
2437 {
2438     parser->state                 = VTRECV_STATE_GROUND;
2439     parser->intermediate_chars[0] = '\0';
2440     parser->num_params            = 0;
2441     parser->ignore_flagged        = 0;
2442     parser->cb                    = cb;
2443 }
2444
2445 static void do_action(vtrecv_t *parser, vtrecv_action_t action, char ch)
2446 {
2447     /* Some actions we handle internally (like parsing parameters), others
2448      * we hand to our client for processing */
2449
2450     switch(action) {
2451         case VTRECV_ACTION_PRINT:
2452         case VTRECV_ACTION_EXECUTE:
2453         case VTRECV_ACTION_HOOK:
2454         case VTRECV_ACTION_PUT:
2455         case VTRECV_ACTION_OSC_START:
2456         case VTRECV_ACTION_OSC_PUT:
2457         case VTRECV_ACTION_OSC_END:
2458         case VTRECV_ACTION_UNHOOK:
2459         case VTRECV_ACTION_CSI_DISPATCH:
2460         case VTRECV_ACTION_ESC_DISPATCH:
2461             parser->cb(parser, action, ch);
2462             break;
2463
2464         case VTRECV_ACTION_IGNORE:
2465             /* do nothing */
2466             break;
2467
2468         case VTRECV_ACTION_COLLECT:
2469             {
2470                 /* Append the character to the intermediate params */
2471                 int num_intermediate_chars = vtrecv_strlen((char*)parser->intermediate_chars);
2472
2473                 if(num_intermediate_chars + 1 > MAX_INTERMEDIATE_CHARS)
2474                     parser->ignore_flagged = 1;
2475                 else
2476                     parser->intermediate_chars[num_intermediate_chars++] = ch;
2477
2478                 break;
2479             }
2480
2481         case VTRECV_ACTION_PARAM:
2482             {
2483                 /* process the param character */
2484                 if(ch == ';')
2485                 {
2486                     parser->num_params += 1;
2487                     parser->params[parser->num_params-1] = 0;
2488                 }
2489                 else
2490                 {
2491                     /* the character is a digit */
2492                     int current_param;
2493
2494                     if(parser->num_params == 0)
2495                     {
2496                         parser->num_params = 1;
2497                         parser->params[0]  = 0;
2498                     }
2499
2500                     current_param = parser->num_params - 1;
2501                     parser->params[current_param] *= 10;
2502                     parser->params[current_param] += (ch - '0');
2503                 }
2504
2505                 break;
2506             }
2507
2508         case VTRECV_ACTION_CLEAR:
2509             parser->intermediate_chars[0] = '\0';
2510             parser->num_params            = 0;
2511             parser->ignore_flagged        = 0;
2512             break;
2513
2514         default:
2515             // Internal error: Unknown action.
2516             break;
2517     }
2518 }
2519
2520 static void do_state_change(vtrecv_t *parser, state_change_t change, char ch)
2521 {
2522     /* A state change is an action and/or a new state to transition to. */
2523
2524     vtrecv_state_t  new_state = STATE(change);
2525     vtrecv_action_t action    = ACTION(change);
2526
2527
2528     if(new_state)
2529     {
2530         /* Perform up to three actions:
2531          *   1. the exit action of the old state
2532          *   2. the action associated with the transition
2533          *   3. the entry actionk of the new action
2534          */
2535
2536         vtrecv_action_t exit_action = GET_EXIT_ACTIONS(parser->state);
2537         vtrecv_action_t entry_action = GET_ENTRY_ACTIONS(new_state);
2538
2539         if(exit_action)
2540             do_action(parser, exit_action, 0);
2541
2542         if(action)
2543             do_action(parser, action, ch);
2544
2545         if(entry_action)
2546             do_action(parser, entry_action, 0);
2547
2548         parser->state = new_state;
2549     }
2550     else
2551     {
2552         do_action(parser, action, ch);
2553     }
2554 }
2555
2556 void vtrecv_execute(vtrecv_t *parser, unsigned char *data, int len)
2557 {
2558     int i;
2559     for (i = 0; i < len; i++) {
2560         unsigned char ch = data[i];
2561
2562         /* If a transition is defined from the "anywhere" state, always
2563          * use that.  Otherwise use the transition from the current state. */
2564
2565         state_change_t change = GET_STATE_TABLE(VTRECV_STATE_ANYWHERE, ch);
2566
2567         if(!change)
2568             change = GET_STATE_TABLE(parser->state, ch);
2569
2570         do_state_change(parser, change, data[i]);
2571     }
2572 }
2573