* ===============================================================
*/
+#include <builtins.h>
#include <cdefBF592-A.h>
#include "bfin_util.h"
}
}
+/* Visual DSP++のregister_handler関数実装 */
+void bfin_util_register_handler(interrupt_kind kind, ex_handler_fn_gcc fn)
+{
+ uint32_t l_mask;
+
+ if ((ik_emulation > kind) || (kind > ik_ivg15)) {
+ return;
+ }
+
+ *((ex_handler_fn_gcc*)&(((uint32_t*)EVT0)[(int32_t)kind])) = fn;
+ l_mask = cli();
+ l_mask |= 1u << (int32_t)kind;
+ sti(l_mask);
+}
+
#ifndef BFIN_UTIL_H
#define BFIN_UTIL_H
+#include <sys/exception.h>
+
+typedef __attribute__((interrupt_handler)) void (*ex_handler_fn_gcc)(void);
+
void bfin_util_usleep(const uint32_t usec);
+void bfin_util_register_handler(interrupt_kind kind, ex_handler_fn_gcc fn);
#endif
#include <builtins.h>
#include <sys/exception.h>
#include "rotenc.h"
+#include "bfin_util.h"
/*
* PA : PF6
* SW : PF10
*/
-/* \e$B%7%9%F%`%/%m%C%/\e(B(100MHz) */
+/* System clock frequency : 100MHz */
#define SCLOCK_HZ (100000000)
#define INIT_PORT() \
ROTENC_CALLBACK callback = NULL;
void *user_obj = NULL;
-typedef __attribute__((interrupt_handler)) void (*ex_handler_fn_gcc)(void);
-
static __attribute__((interrupt_handler)) void rotenc_isr(void)
{
- /* \e$B3d$j9~$_%9%F!<%?%9$N99?7\e(B */
+ /* Update the interrupt status */
*pTIMER_STATUS = TIMIL1;
ssync();
}
}
-/* Visual DSP++\e$B$N\e(Bregister_handler\e$B4X?t<BAu\e(B */
-static void vdsp_register_handler(interrupt_kind kind, ex_handler_fn_gcc fn)
-{
- uint32_t l_mask;
-
- if((ik_emulation > kind) || (kind > ik_ivg15)) return;
-
- *((ex_handler_fn_gcc*)&(((uint32_t*)EVT0)[(int32_t)kind])) = fn;
- l_mask = cli();
- l_mask |= 1u << (int32_t)kind;
- sti(l_mask);
-}
-
void rotenc_init(ROTENC_CALLBACK func, void *extobj)
{
INIT_PORT();
callback = func;
user_obj = extobj;
- /* \e$B3d$j9~$_%O%s%I%i$r\e(BIVG11\e$B$KEPO?\e(B */
- vdsp_register_handler(ik_ivg11, rotenc_isr);
+ /* Register interrupt handler to IVG11 */
+ bfin_util_register_handler(ik_ivg11, rotenc_isr);
*pSIC_IMASK |= IRQ_TIMER1;
- /* GP\e$B%?%$%^\e(B1\e$B$N@_Dj\e(B */
- /* 1ms\e$BC10L$K3d$j9~$_$,$+$+$k$h$&$K@_Dj\e(B */
+ /* Setup GP Timer 1 */
+ /* 1ms/event */
*pTIMER1_CONFIG = OUT_DIS | IRQ_ENA | PERIOD_CNT | PWM_OUT;
*pTIMER1_PERIOD = SCLOCK_HZ / 1000;
*pTIMER1_WIDTH = 1;
#include <sys/exception.h>
#include <stdint.h>
#include "twi.h"
+#include "bfin_util.h"
#define TWI_COUNT(x) (DCNT & ((x) << 6))
int32_t count;
} twi_xfer_param;
-typedef __attribute__((interrupt_handler)) void (*ex_handler_fn_gcc)(void);
-
/* TWI割り込みのプロトタイプ宣言 */
static __attribute__((interrupt_handler)) void twi_isr(void);
static twi_xfer_param sf_twi_xfer_param;
-/* Visual DSP++のregister_handler関数実装 */
-static void vdsp_register_handler(interrupt_kind kind, ex_handler_fn_gcc fn)
-{
- uint32_t l_mask;
-
- if((ik_emulation > kind) || (kind > ik_ivg15)) return;
-
- *((ex_handler_fn_gcc*)&(((uint32_t*)EVT0)[(int32_t)kind])) = fn;
- l_mask = cli();
- l_mask |= 1u << (int32_t)kind;
- sti(l_mask);
-}
-
void twi_init(void)
{
*pTWI_CONTROL = 0;
*pTWI_FIFO_CTL = 0;
/* 割り込みハンドラをIVG12に登録 */
- vdsp_register_handler(ik_ivg12, twi_isr);
+ bfin_util_register_handler(ik_ivg12, twi_isr);
*pSIC_IMASK |= IRQ_TWI;
}
#include "uzura.h"
#include "mmc.h"
#include "uart.h"
+#include "bfin_util.h"
#define SCLOCK_HZ (100000000) /**< システムクロック(100MHz) */
#define DMA_SAMPLE_SIZE (256) /**< 1回のサンプルサイズ */
-typedef __attribute__((interrupt_handler)) void (*ex_handler_fn_gcc)(void);
-
static void setup_pll(uint8_t mul_val, uint8_t div_val);
static void __attribute__((interrupt_handler)) sport_rx_isr();
bufidx_dma_target = (bufidx_dma_target ^ 1) & 1;
}
-static void vdsp_register_handler(interrupt_kind kind, ex_handler_fn_gcc fn)
-{
- uint32_t mask;
-
- if ((ik_emulation > kind) || (kind > ik_ivg15)) {
- return;
- }
-
- *((ex_handler_fn_gcc*)&(((uint32_t*)EVT0)[(int32_t)kind])) = fn;
- mask = cli();
- mask |= 1u << (int32_t)kind;
- sti(mask);
-}
-
void uzura_init(UZURA *p, void *user_data)
{
FATFS fatfs;
* 割り込みハンドラの登録。
* IVG9が登録先。
*/
- vdsp_register_handler(ik_ivg9, sport_rx_isr);
+ bfin_util_register_handler(ik_ivg9, sport_rx_isr);
*pSIC_IMASK |= IRQ_DMA1;
/*