4 void init_gdtidt(void)
\r
7 IO_SegmentDescriptor *gdt = system.io.mem.segment.gdt;
\r
8 IO_GateDescriptor *idt = system.io.interrupt.idt;
\r
10 for(i =0; i < 8192; i++){
\r
11 set_segmdesc(gdt + i, 0, 0, 0);
\r
13 set_segmdesc(gdt + 1, 0xffffffff, 0x00000000, AR_DATA32_RW);
\r
14 set_segmdesc(gdt + 2, 0x0007ffff, 0x00280000, AR_CODE32_ER);
\r
15 load_gdtr(0xffff, (int)gdt);
\r
17 for(i = 0; i < 256; i++) {
\r
18 set_gatedesc(idt + i, 0, 0, 0);
\r
20 load_idtr(0x7ff, (int)idt);
\r
22 set_gatedesc(idt+0x00, (int) asm_inthandler00, 2 * 8, AR_INTGATE32);
\r
23 set_gatedesc(idt+0x01, (int) asm_inthandler01, 2 * 8, AR_INTGATE32);
\r
24 set_gatedesc(idt+0x02, (int) asm_inthandler02, 2 * 8, AR_INTGATE32);
\r
25 set_gatedesc(idt+0x03, (int) asm_inthandler03, 2 * 8, AR_INTGATE32);
\r
26 set_gatedesc(idt+0x04, (int) asm_inthandler04, 2 * 8, AR_INTGATE32);
\r
27 set_gatedesc(idt+0x05, (int) asm_inthandler05, 2 * 8, AR_INTGATE32);
\r
28 set_gatedesc(idt+0x06, (int) asm_inthandler06, 2 * 8, AR_INTGATE32);
\r
29 set_gatedesc(idt+0x07, (int) asm_inthandler07, 2 * 8, AR_INTGATE32);
\r
30 set_gatedesc(idt+0x08, (int) asm_inthandler08, 2 * 8, AR_INTGATE32);
\r
31 set_gatedesc(idt+0x09, (int) asm_inthandler09, 2 * 8, AR_INTGATE32);
\r
32 set_gatedesc(idt+0x0a, (int) asm_inthandler0a, 2 * 8, AR_INTGATE32);
\r
33 set_gatedesc(idt+0x0b, (int) asm_inthandler0b, 2 * 8, AR_INTGATE32);
\r
34 set_gatedesc(idt+0x0c, (int) asm_inthandler0c, 2 * 8, AR_INTGATE32);
\r
35 set_gatedesc(idt+0x0d, (int) asm_inthandler0d, 2 * 8, AR_INTGATE32);
\r
36 set_gatedesc(idt+0x0e, (int) asm_inthandler0e, 2 * 8, AR_INTGATE32);
\r
37 set_gatedesc(idt+0x0f, (int) asm_inthandler0f, 2 * 8, AR_INTGATE32);
\r
38 set_gatedesc(idt+0x10, (int) asm_inthandler10, 2 * 8, AR_INTGATE32);
\r
39 set_gatedesc(idt+0x11, (int) asm_inthandler11, 2 * 8, AR_INTGATE32);
\r
40 set_gatedesc(idt+0x12, (int) asm_inthandler12, 2 * 8, AR_INTGATE32);
\r
41 set_gatedesc(idt+0x13, (int) asm_inthandler13, 2 * 8, AR_INTGATE32);
\r
42 set_gatedesc(idt+0x14, (int) asm_inthandler14, 2 * 8, AR_INTGATE32);
\r
43 set_gatedesc(idt+0x15, (int) asm_inthandler15, 2 * 8, AR_INTGATE32);
\r
44 set_gatedesc(idt+0x16, (int) asm_inthandler16, 2 * 8, AR_INTGATE32);
\r
45 set_gatedesc(idt+0x17, (int) asm_inthandler17, 2 * 8, AR_INTGATE32);
\r
46 set_gatedesc(idt+0x18, (int) asm_inthandler18, 2 * 8, AR_INTGATE32);
\r
47 set_gatedesc(idt+0x19, (int) asm_inthandler19, 2 * 8, AR_INTGATE32);
\r
48 set_gatedesc(idt+0x1a, (int) asm_inthandler1a, 2 * 8, AR_INTGATE32);
\r
49 set_gatedesc(idt+0x1b, (int) asm_inthandler1b, 2 * 8, AR_INTGATE32);
\r
50 set_gatedesc(idt+0x1c, (int) asm_inthandler1c, 2 * 8, AR_INTGATE32);
\r
51 set_gatedesc(idt+0x1d, (int) asm_inthandler1d, 2 * 8, AR_INTGATE32);
\r
52 set_gatedesc(idt+0x1e, (int) asm_inthandler1e, 2 * 8, AR_INTGATE32);
\r
53 set_gatedesc(idt+0x1f, (int) asm_inthandler1f, 2 * 8, AR_INTGATE32);
\r
55 set_gatedesc(idt+0x40, (int) asm_hrb_api, 2 * 8, AR_INTGATE32 + AR_APP);
\r
60 void set_segmdesc(IO_SegmentDescriptor *sd, uint limit, int base, int ar)
\r
62 if(limit > 0xfffff){
\r
64 limit = limit >> 12;
\r
66 sd->limit_low = limit & 0xffff;
\r
67 sd->base_low = base & 0xffff;
\r
68 sd->base_mid = (base >> 16) & 0xff;
\r
69 sd->access_right = ar & 0xff;
\r
70 sd->limit_high = ((limit >> 16) & 0x0f) | ((ar >> 8) & 0xf0);
\r
71 sd->base_high = (base >> 24) & 0xff;
\r
75 void set_gatedesc(IO_GateDescriptor *gd, int offset, int selector, int ar)
\r
77 gd->offset_low = offset & 0xffff;
\r
78 gd->selector = selector;
\r
79 gd->dw_count = (ar >> 8) & 0xff;
\r
80 gd->access_right = ar & 0xff;
\r
81 gd->offset_high = (offset >> 16) & 0xffff;
\r