source/src/vm/device.h

   1 /*
   2         Skelton for retropc emulator
   3
   4         Author : Takeda.Toshiya
   5         Date   : 2006.08.18 -
   6
   7         [ device base class ]
   8 */
   9
  10 #ifndef _DEVICE_H_
  11 #define _DEVICE_H_
  12
  13 #include <stdarg.h>
  14 #include "vm.h"
  15 #include "../emu.h"
  16 #if defined(_USE_QT)
  17 #include "osd.h"
  18 #include "csp_logger.h"
  19 #define USE_DEVICE_NAME
  20 #endif
  21
  22 #if defined(USE_DEVICES_SHARED_LIB)
  23 #include "libcpu_newdev/device.h"
  24
  25 #else
  26 // max devices connected to the output port
  27 #define MAX_OUTPUT      16
  28
  29 // common signal id
  30 #define SIG_CPU_IRQ             101
  31 #define SIG_CPU_FIRQ            102
  32 #define SIG_CPU_NMI             103
  33 #define SIG_CPU_BUSREQ          104
  34 #define SIG_CPU_DEBUG           105
  35
  36 #define SIG_PRINTER_DATA        201
  37 #define SIG_PRINTER_STROBE      202
  38 #define SIG_PRINTER_RESET       203
  39 #define SIG_PRINTER_BUSY        204
  40 #define SIG_PRINTER_ACK         205
  41 #define SIG_PRINTER_SELECT      206
  42
  43 #define SIG_SCSI_DAT            301
  44 #define SIG_SCSI_BSY            302
  45 #define SIG_SCSI_CD             303
  46 #define SIG_SCSI_IO             304
  47 #define SIG_SCSI_MSG            305
  48 #define SIG_SCSI_REQ            306
  49 #define SIG_SCSI_SEL            307
  50 #define SIG_SCSI_ATN            308
  51 #define SIG_SCSI_ACK            309
  52 #define SIG_SCSI_RST            310
  53
  54 class DEVICE
  55 {
  56 protected:
  57         VM* vm;
  58         EMU* emu;
  59 public:
  60         DEVICE(VM* parent_vm, EMU* parent_emu) : vm(parent_vm), emu(parent_emu)
  61         {
  62                 strncpy(this_device_name, "Base Device", 128);
  63                 prev_device = vm->last_device;
  64                 next_device = NULL;
  65                 if(vm->first_device == NULL) {
  66                         // this is the first device
  67                         vm->first_device = this;
  68                         this_device_id = 0;
  69                 } else {
  70                         // this is not the first device
  71                         vm->last_device->next_device = this;
  72                         this_device_id = vm->last_device->this_device_id + 1;
  73                 }
  74                 vm->last_device = this;
  75
  76                 // primary event manager
  77                 event_manager = NULL;
  78         }
  79         //ToDo: Will implement real destructor per real classes and below destructor decl. with "virtual".
  80         // This makes warning:
  81         //"deleting object of polymorphic class type 'DEVICE' which has non-virtual
  82         // destructor might cause undefined behavior [-Wdelete-non-virtual-dtor]".
  83         ~DEVICE(void) {}
  84
  85         virtual void initialize() {}
  86         virtual void release() {}
  87
  88         virtual void update_config() {}
  89         virtual void save_state(FILEIO* state_fio) {}
  90         virtual bool load_state(FILEIO* state_fio)
  91         {
  92                 return true;
  93         }
  94
  95         // control
  96         virtual void reset() {}
  97         virtual void special_reset()
  98         {
  99                 reset();
 100         }
 101
 102         // NOTE: the virtual bus interface functions for 16/32bit access invite the cpu is little endian.
 103         // if the cpu is big endian, you need to implement them in the virtual machine memory/io classes.
 104
 105         // memory bus
 106         virtual void write_data8(uint32_t addr, uint32_t data) {}
 107         virtual uint32_t read_data8(uint32_t addr)
 108         {
 109                 return 0xff;
 110         }
 111         virtual void write_data16(uint32_t addr, uint32_t data)
 112         {
 113                 write_data8(addr, data & 0xff);
 114                 write_data8(addr + 1, (data >> 8) & 0xff);
 115         }
 116         virtual uint32_t read_data16(uint32_t addr)
 117         {
 118                 uint32_t val = read_data8(addr);
 119                 val |= read_data8(addr + 1) << 8;
 120                 return val;
 121         }
 122         virtual void write_data32(uint32_t addr, uint32_t data)
 123         {
 124                 write_data16(addr, data & 0xffff);
 125                 write_data16(addr + 2, (data >> 16) & 0xffff);
 126         }
 127         virtual uint32_t read_data32(uint32_t addr)
 128         {
 129                 uint32_t val = read_data16(addr);
 130                 val |= read_data16(addr + 2) << 16;
 131                 return val;
 132         }
 133         virtual void write_data8w(uint32_t addr, uint32_t data, int* wait)
 134         {
 135                 *wait = 0;
 136                 write_data8(addr, data);
 137         }
 138         virtual uint32_t read_data8w(uint32_t addr, int* wait)
 139         {
 140                 *wait = 0;
 141                 return read_data8(addr);
 142         }
 143         virtual void write_data16w(uint32_t addr, uint32_t data, int* wait)
 144         {
 145                 int wait_l, wait_h;
 146                 write_data8w(addr, data & 0xff, &wait_l);
 147                 write_data8w(addr + 1, (data >> 8) & 0xff, &wait_h);
 148                 *wait = wait_l + wait_h;
 149         }
 150         virtual uint32_t read_data16w(uint32_t addr, int* wait)
 151         {
 152                 int wait_l, wait_h;
 153                 uint32_t val = read_data8w(addr, &wait_l);
 154                 val |= read_data8w(addr + 1, &wait_h) << 8;
 155                 *wait = wait_l + wait_h;
 156                 return val;
 157         }
 158         virtual void write_data32w(uint32_t addr, uint32_t data, int* wait)
 159         {
 160                 int wait_l, wait_h;
 161                 write_data16w(addr, data & 0xffff, &wait_l);
 162                 write_data16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
 163                 *wait = wait_l + wait_h;
 164         }
 165         virtual uint32_t read_data32w(uint32_t addr, int* wait)
 166         {
 167                 int wait_l, wait_h;
 168                 uint32_t val = read_data16w(addr, &wait_l);
 169                 val |= read_data16w(addr + 2, &wait_h) << 16;
 170                 *wait = wait_l + wait_h;
 171                 return val;
 172         }
 173         virtual uint32_t fetch_op(uint32_t addr, int *wait)
 174         {
 175                 return read_data8w(addr, wait);
 176         }
 177         virtual void write_dma_data8(uint32_t addr, uint32_t data)
 178         {
 179                 write_data8(addr, data);
 180         }
 181         virtual uint32_t read_dma_data8(uint32_t addr)
 182         {
 183                 return read_data8(addr);
 184         }
 185         virtual void write_dma_data16(uint32_t addr, uint32_t data)
 186         {
 187                 write_data16(addr, data);
 188         }
 189         virtual uint32_t read_dma_data16(uint32_t addr)
 190         {
 191                 return read_data16(addr);
 192         }
 193         virtual void write_dma_data32(uint32_t addr, uint32_t data)
 194         {
 195                 write_data32(addr, data);
 196         }
 197         virtual uint32_t read_dma_data32(uint32_t addr)
 198         {
 199                 return read_data32(addr);
 200         }
 201         virtual void write_dma_data8w(uint32_t addr, uint32_t data, int* wait)
 202         {
 203                 write_data8w(addr, data, wait);
 204         }
 205         virtual uint32_t read_dma_data8w(uint32_t addr, int* wait)
 206         {
 207                 return read_data8w(addr, wait);
 208         }
 209         virtual void write_dma_data16w(uint32_t addr, uint32_t data, int* wait)
 210         {
 211                 write_data16w(addr, data, wait);
 212         }
 213         virtual uint32_t read_dma_data16w(uint32_t addr, int* wait)
 214         {
 215                 return read_data16w(addr, wait);
 216         }
 217         virtual void write_dma_data32w(uint32_t addr, uint32_t data, int* wait)
 218         {
 219                 write_data32w(addr, data, wait);
 220         }
 221         virtual uint32_t read_dma_data32w(uint32_t addr, int* wait)
 222         {
 223                 return read_data32w(addr, wait);
 224         }
 225
 226         // i/o bus
 227         virtual void write_io8(uint32_t addr, uint32_t data) {}
 228         virtual uint32_t read_io8(uint32_t addr)
 229         {
 230 #ifdef IOBUS_RETURN_ADDR
 231                 return (addr & 1 ? addr >> 8 : addr) & 0xff;
 232 #else
 233                 return 0xff;
 234 #endif
 235         }
 236         virtual void write_io16(uint32_t addr, uint32_t data)
 237         {
 238                 write_io8(addr, data & 0xff);
 239                 write_io8(addr + 1, (data >> 8) & 0xff);
 240         }
 241         virtual uint32_t read_io16(uint32_t addr)
 242         {
 243                 uint32_t val = read_io8(addr);
 244                 val |= read_io8(addr + 1) << 8;
 245                 return val;
 246         }
 247         virtual void write_io32(uint32_t addr, uint32_t data)
 248         {
 249                 write_io16(addr, data & 0xffff);
 250                 write_io16(addr + 2, (data >> 16) & 0xffff);
 251         }
 252         virtual uint32_t read_io32(uint32_t addr)
 253         {
 254                 uint32_t val = read_io16(addr);
 255                 val |= read_io16(addr + 2) << 16;
 256                 return val;
 257         }
 258         virtual void write_io8w(uint32_t addr, uint32_t data, int* wait)
 259         {
 260                 *wait = 0;
 261                 write_io8(addr, data);
 262         }
 263         virtual uint32_t read_io8w(uint32_t addr, int* wait)
 264         {
 265                 *wait = 0;
 266                 return read_io8(addr);
 267         }
 268         virtual void write_io16w(uint32_t addr, uint32_t data, int* wait)
 269         {
 270                 int wait_l, wait_h;
 271                 write_io8w(addr, data & 0xff, &wait_l);
 272                 write_io8w(addr + 1, (data >> 8) & 0xff, &wait_h);
 273                 *wait = wait_l + wait_h;
 274         }
 275         virtual uint32_t read_io16w(uint32_t addr, int* wait)
 276         {
 277                 int wait_l, wait_h;
 278                 uint32_t val = read_io8w(addr, &wait_l);
 279                 val |= read_io8w(addr + 1, &wait_h) << 8;
 280                 *wait = wait_l + wait_h;
 281                 return val;
 282         }
 283         virtual void write_io32w(uint32_t addr, uint32_t data, int* wait)
 284         {
 285                 int wait_l, wait_h;
 286                 write_io16w(addr, data & 0xffff, &wait_l);
 287                 write_io16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
 288                 *wait = wait_l + wait_h;
 289         }
 290         virtual uint32_t read_io32w(uint32_t addr, int* wait)
 291         {
 292                 int wait_l, wait_h;
 293                 uint32_t val = read_io16w(addr, &wait_l);
 294                 val |= read_io16w(addr + 2, &wait_h) << 16;
 295                 *wait = wait_l + wait_h;
 296                 return val;
 297         }
 298         virtual void write_dma_io8(uint32_t addr, uint32_t data)
 299         {
 300                 write_io8(addr, data);
 301         }
 302         virtual uint32_t read_dma_io8(uint32_t addr)
 303         {
 304                 return read_io8(addr);
 305         }
 306         virtual void write_dma_io16(uint32_t addr, uint32_t data)
 307         {
 308                 write_io16(addr, data);
 309         }
 310         virtual uint32_t read_dma_io16(uint32_t addr)
 311         {
 312                 return read_io16(addr);
 313         }
 314         virtual void write_dma_io32(uint32_t addr, uint32_t data)
 315         {
 316                 write_io32(addr, data);
 317         }
 318         virtual uint32_t read_dma_io32(uint32_t addr)
 319         {
 320                 return read_io32(addr);
 321         }
 322         virtual void write_dma_io8w(uint32_t addr, uint32_t data, int* wait)
 323         {
 324                 write_io8w(addr, data, wait);
 325         }
 326         virtual uint32_t read_dma_io8w(uint32_t addr, int* wait)
 327         {
 328                 return read_io8w(addr, wait);
 329         }
 330         virtual void write_dma_io16w(uint32_t addr, uint32_t data, int* wait)
 331         {
 332                 write_io16w(addr, data, wait);
 333         }
 334         virtual uint32_t read_dma_io16w(uint32_t addr, int* wait)
 335         {
 336                 return read_io16w(addr, wait);
 337         }
 338         virtual void write_dma_io32w(uint32_t addr, uint32_t data, int* wait)
 339         {
 340                 write_io32w(addr, data, wait);
 341         }
 342         virtual uint32_t read_dma_io32w(uint32_t addr, int* wait)
 343         {
 344                 return read_io32w(addr, wait);
 345         }
 346
 347         // memory mapped i/o
 348         virtual void write_memory_mapped_io8(uint32_t addr, uint32_t data)
 349         {
 350                 write_io8(addr, data);
 351         }
 352         virtual uint32_t read_memory_mapped_io8(uint32_t addr)
 353         {
 354                 return read_io8(addr);
 355         }
 356         virtual void write_memory_mapped_io16(uint32_t addr, uint32_t data)
 357         {
 358                 write_memory_mapped_io8(addr, data & 0xff);
 359                 write_memory_mapped_io8(addr + 1, (data >> 8) & 0xff);
 360         }
 361         virtual uint32_t read_memory_mapped_io16(uint32_t addr)
 362         {
 363                 uint32_t val = read_memory_mapped_io8(addr);
 364                 val |= read_memory_mapped_io8(addr + 1) << 8;
 365                 return val;
 366         }
 367         virtual void write_memory_mapped_io32(uint32_t addr, uint32_t data)
 368         {
 369                 write_memory_mapped_io16(addr, data & 0xffff);
 370                 write_memory_mapped_io16(addr + 2, (data >> 16) & 0xffff);
 371         }
 372         virtual uint32_t read_memory_mapped_io32(uint32_t addr)
 373         {
 374                 uint32_t val = read_memory_mapped_io16(addr);
 375                 val |= read_memory_mapped_io16(addr + 2) << 16;
 376                 return val;
 377         }
 378         virtual void write_memory_mapped_io8w(uint32_t addr, uint32_t data, int* wait)
 379         {
 380                 *wait = 0;
 381                 write_memory_mapped_io8(addr, data);
 382         }
 383         virtual uint32_t read_memory_mapped_io8w(uint32_t addr, int* wait)
 384         {
 385                 *wait = 0;
 386                 return read_memory_mapped_io8(addr);
 387         }
 388         virtual void write_memory_mapped_io16w(uint32_t addr, uint32_t data, int* wait)
 389         {
 390                 int wait_l, wait_h;
 391                 write_memory_mapped_io8w(addr, data & 0xff, &wait_l);
 392                 write_memory_mapped_io8w(addr + 1, (data >> 8) & 0xff, &wait_h);
 393                 *wait = wait_l + wait_h;
 394         }
 395         virtual uint32_t read_memory_mapped_io16w(uint32_t addr, int* wait)
 396         {
 397                 int wait_l, wait_h;
 398                 uint32_t val = read_memory_mapped_io8w(addr, &wait_l);
 399                 val |= read_memory_mapped_io8w(addr + 1, &wait_h) << 8;
 400                 *wait = wait_l + wait_h;
 401                 return val;
 402         }
 403         virtual void write_memory_mapped_io32w(uint32_t addr, uint32_t data, int* wait)
 404         {
 405                 int wait_l, wait_h;
 406                 write_memory_mapped_io16w(addr, data & 0xffff, &wait_l);
 407                 write_memory_mapped_io16w(addr + 2, (data >> 16) & 0xffff, &wait_h);
 408                 *wait = wait_l + wait_h;
 409         }
 410         virtual uint32_t read_memory_mapped_io32w(uint32_t addr, int* wait)
 411         {
 412                 int wait_l, wait_h;
 413                 uint32_t val = read_memory_mapped_io16w(addr, &wait_l);
 414                 val |= read_memory_mapped_io16w(addr + 2, &wait_h) << 16;
 415                 *wait = wait_l + wait_h;
 416                 return val;
 417         }
 418
 419         // device to device
 420         typedef struct {
 421                 DEVICE *device;
 422                 int id;
 423                 uint32_t mask;
 424                 int shift;
 425         } output_t;
 426
 427         typedef struct {
 428                 int count;
 429                 output_t item[MAX_OUTPUT];
 430         } outputs_t;
 431
 432         virtual void initialize_output_signals(outputs_t *items)
 433         {
 434                 items->count = 0;
 435         }
 436         virtual void register_output_signal(outputs_t *items, DEVICE *device, int id, uint32_t mask, int shift)
 437         {
 438                 int c = items->count++;
 439                 items->item[c].device = device;
 440                 items->item[c].id = id;
 441                 items->item[c].mask = mask;
 442                 items->item[c].shift = shift;
 443         }
 444         virtual void register_output_signal(outputs_t *items, DEVICE *device, int id, uint32_t mask)
 445         {
 446                 int c = items->count++;
 447                 items->item[c].device = device;
 448                 items->item[c].id = id;
 449                 items->item[c].mask = mask;
 450                 items->item[c].shift = 0;
 451         }
 452         virtual void write_signals(outputs_t *items, uint32_t data)
 453         {
 454                 for(int i = 0; i < items->count; i++) {
 455                         output_t *item = &items->item[i];
 456                         int shift = item->shift;
 457                         uint32_t val = (shift < 0) ? (data >> (-shift)) : (data << shift);
 458                         uint32_t mask = (shift < 0) ? (item->mask >> (-shift)) : (item->mask << shift);
 459                         item->device->write_signal(item->id, val, mask);
 460                 }
 461         };
 462         virtual void write_signal(int id, uint32_t data, uint32_t mask) {}
 463         virtual uint32_t read_signal(int ch)
 464         {
 465                 return 0;
 466         }
 467
 468         // z80 daisy chain
 469         virtual void set_context_intr(DEVICE* device, uint32_t bit) {}
 470         virtual void set_context_child(DEVICE* device) {}
 471
 472         // interrupt device to device
 473         virtual void set_intr_iei(bool val) {}
 474
 475         // interrupt device to cpu
 476         virtual void set_intr_line(bool line, bool pending, uint32_t bit) {}
 477
 478         // interrupt cpu to device
 479         virtual uint32_t get_intr_ack()
 480         {
 481                 return 0xff;
 482         }
 483         virtual void notify_intr_reti() {}
 484         virtual void notify_intr_ei() {}
 485
 486         // dma
 487         virtual void do_dma() {}
 488
 489         // cpu
 490         virtual int run(int clock)
 491         {
 492                 // when clock == -1, run one opecode
 493                 return (clock == -1 ? 1 : clock);
 494         }
 495         virtual void set_extra_clock(int clock) {}
 496         virtual int get_extra_clock()
 497         {
 498                 return 0;
 499         }
 500         virtual uint32_t get_pc()
 501         {
 502                 return 0;
 503         }
 504         virtual uint32_t get_next_pc()
 505         {
 506                 return 0;
 507         }
 508
 509         // bios
 510         virtual bool bios_call_i86(uint32_t PC, uint16_t regs[], uint16_t sregs[], int32_t* ZeroFlag, int32_t* CarryFlag)
 511         {
 512                 return false;
 513         }
 514         virtual bool bios_int_i86(int intnum, uint16_t regs[], uint16_t sregs[], int32_t* ZeroFlag, int32_t* CarryFlag)
 515         {
 516                 return false;
 517         }
 518         virtual bool bios_ret_z80(uint16_t PC, pair_t* af, pair_t* bc, pair_t* de, pair_t* hl, pair_t* ix, pair_t* iy, uint8_t* iff1)   {
 519                 return false;
 520         }
 521         // misc
 522         const _TCHAR *get_device_name(void)
 523         {
 524                 return (const _TCHAR *)this_device_name;
 525         }
 526
 527         // event manager
 528         DEVICE* event_manager;
 529
 530         virtual void set_context_event_manager(DEVICE* device)
 531         {
 532                 event_manager = device;
 533         }
 534         virtual int get_event_manager_id()
 535         {
 536                 if(event_manager == NULL) {
 537                         event_manager = vm->first_device->next_device;
 538                 }
 539                 return event_manager->this_device_id;
 540         }
 541         virtual void register_event(DEVICE* device, int event_id, double usec, bool loop, int* register_id)
 542         {
 543                 if(event_manager == NULL) {
 544                         event_manager = vm->first_device->next_device;
 545                 }
 546                 event_manager->register_event(device, event_id, usec, loop, register_id);
 547         }
 548         virtual void register_event_by_clock(DEVICE* device, int event_id, uint64_t clock, bool loop, int* register_id)
 549         {
 550                 if(event_manager == NULL) {
 551                         event_manager = vm->first_device->next_device;
 552                 }
 553                 event_manager->register_event_by_clock(device, event_id, clock, loop, register_id);
 554         }
 555         virtual void cancel_event(DEVICE* device, int register_id)
 556         {
 557                 if(event_manager == NULL) {
 558                         event_manager = vm->first_device->next_device;
 559                 }
 560                 event_manager->cancel_event(device, register_id);
 561         }
 562         virtual void register_frame_event(DEVICE* device)
 563         {
 564                 if(event_manager == NULL) {
 565                         event_manager = vm->first_device->next_device;
 566                 }
 567                 event_manager->register_frame_event(device);
 568         }
 569         virtual void register_vline_event(DEVICE* device)
 570         {
 571                 if(event_manager == NULL) {
 572                         event_manager = vm->first_device->next_device;
 573                 }
 574                 event_manager->register_vline_event(device);
 575         }
 576         virtual uint32_t get_event_remaining_clock(int register_id)
 577         {
 578                 if(event_manager == NULL) {
 579                         event_manager = vm->first_device->next_device;
 580                 }
 581                 return event_manager->get_event_remaining_clock(register_id);
 582         }
 583         virtual double get_event_remaining_usec(int register_id)
 584         {
 585                 if(event_manager == NULL) {
 586                         event_manager = vm->first_device->next_device;
 587                 }
 588                 return event_manager->get_event_remaining_usec(register_id);
 589         }
 590         virtual uint32_t get_current_clock()
 591         {
 592                 if(event_manager == NULL) {
 593                         event_manager = vm->first_device->next_device;
 594                 }
 595                 return event_manager->get_current_clock();
 596         }
 597         virtual uint32_t get_passed_clock(uint32_t prev)
 598         {
 599                 if(event_manager == NULL) {
 600                         event_manager = vm->first_device->next_device;
 601                 }
 602                 return event_manager->get_passed_clock(prev);
 603         }
 604         virtual double get_passed_usec(uint32_t prev)
 605         {
 606                 if(event_manager == NULL) {
 607                         event_manager = vm->first_device->next_device;
 608                 }
 609                 return event_manager->get_passed_usec(prev);
 610         }
 611         virtual uint32_t get_cpu_pc(int index)
 612         {
 613                 if(event_manager == NULL) {
 614                         event_manager = vm->first_device->next_device;
 615                 }
 616                 return event_manager->get_cpu_pc(index);
 617         }
 618         virtual void request_skip_frames()
 619         {
 620                 if(event_manager == NULL) {
 621                         event_manager = vm->first_device->next_device;
 622                 }
 623                 event_manager->request_skip_frames();
 624         }
 625         virtual void set_frames_per_sec(double frames)
 626         {
 627                 if(event_manager == NULL) {
 628                         event_manager = vm->first_device->next_device;
 629                 }
 630                 event_manager->set_frames_per_sec(frames);
 631         }
 632         virtual void set_lines_per_frame(int lines)
 633         {
 634                 if(event_manager == NULL) {
 635                         event_manager = vm->first_device->next_device;
 636                 }
 637                 event_manager->set_lines_per_frame(lines);
 638         }
 639         // Force reder sound immediately when device's status has changed.
 640         // You must call this after you changing registers (or enything).
 641         // If has problems, try set_realtime_render.
 642         // See mb8877.cpp and ym2203.cpp.
 643         // -- 20161010 K.O
 644         virtual void touch_sound(void)
 645         {
 646                 if(event_manager == NULL) {
 647                         event_manager = vm->first_device->next_device;
 648                 }
 649                 event_manager->touch_sound();
 650         }
 651         // Force render per 1 sample automatically.
 652         // See pcm1bit.cpp .
 653         // -- 20161010 K.O
 654         virtual void set_realtime_render(DEVICE* device = this, bool flag)
 655         {
 656                 if(event_manager == NULL) {
 657                         event_manager = vm->first_device->next_device;
 658                 }
 659                 if(device != event_manager) event_manager->set_realtime_render(device, flag);
 660         }
 661         virtual void update_timing(int new_clocks, double new_frames_per_sec, int new_lines_per_frame) {}
 662
 663         // event callback
 664         virtual void event_callback(int event_id, int err) {}
 665         virtual void event_pre_frame() {}       // this event is to update timing settings
 666         virtual void event_frame() {}
 667         virtual void event_vline(int v, int clock) {}
 668         virtual void event_hsync(int v, int h, int clock) {}
 669
 670         // sound
 671         virtual void mix(int32_t* buffer, int cnt) {}
 672         virtual void set_volume(int ch, int decibel_l, int decibel_r) {} // +1 equals +0.5dB (same as fmgen)
 673         virtual void set_device_name(const _TCHAR *format, ...)
 674         {
 675                 if(format != NULL) {
 676                         va_list ap;
 677                         _TCHAR buffer[1024];
 678
 679                         va_start(ap, format);
 680                         my_vstprintf_s(buffer, 1024, format, ap);
 681                         va_end(ap);
 682
 683                         my_tcscpy_s(this_device_name, 128, buffer);
 684 #ifdef _USE_QT
 685                         emu->get_osd()->set_vm_node(this_device_id, buffer);
 686 #endif
 687                 }
 688         }
 689         virtual void out_debug_log(const char *fmt, ...)
 690         {
 691                 char strbuf[4096];
 692                 va_list ap;
 693
 694                 va_start(ap, fmt);
 695                 vsnprintf(strbuf, 4095, fmt, ap);
 696                 emu->out_debug_log("%s", strbuf);
 697                 va_end(ap);
 698         }
 699
 700 #ifdef USE_DEBUGGER
 701         // debugger
 702         virtual void *get_debugger()
 703         {
 704                 return NULL;
 705         }
 706         virtual uint32_t get_debug_prog_addr_mask()
 707         {
 708                 return 0;
 709         }
 710         virtual uint32_t get_debug_data_addr_mask()
 711         {
 712                 return 0;
 713         }
 714         virtual void write_debug_data8(uint32_t addr, uint32_t data) {}
 715         virtual uint32_t read_debug_data8(uint32_t addr)
 716         {
 717                 return 0xff;
 718         }
 719         virtual void write_debug_data16(uint32_t addr, uint32_t data)
 720         {
 721                 write_debug_data8(addr, data & 0xff);
 722                 write_debug_data8(addr + 1, (data >> 8) & 0xff);
 723         }
 724         virtual uint32_t read_debug_data16(uint32_t addr)
 725         {
 726                 uint32_t val = read_debug_data8(addr);
 727                 val |= read_debug_data8(addr + 1) << 8;
 728                 return val;
 729         }
 730         virtual void write_debug_data32(uint32_t addr, uint32_t data)
 731         {
 732                 write_debug_data16(addr, data & 0xffff);
 733                 write_debug_data16(addr + 2, (data >> 16) & 0xffff);
 734         }
 735         virtual uint32_t read_debug_data32(uint32_t addr)
 736         {
 737                 uint32_t val = read_debug_data16(addr);
 738                 val |= read_debug_data16(addr + 2) << 16;
 739                 return val;
 740         }
 741         virtual void write_debug_io8(uint32_t addr, uint32_t data) {}
 742         virtual uint32_t read_debug_io8(uint32_t addr)
 743         {
 744                 return 0xff;
 745         }
 746         virtual void write_debug_io16(uint32_t addr, uint32_t data)
 747         {
 748                 write_debug_io8(addr, data & 0xff);
 749                 write_debug_io8(addr + 1, (data >> 8) & 0xff);
 750         }
 751         virtual uint32_t read_debug_io16(uint32_t addr)
 752         {
 753                 uint32_t val = read_debug_io8(addr);
 754                 val |= read_debug_io8(addr + 1) << 8;
 755                 return val;
 756         }
 757         virtual void write_debug_io32(uint32_t addr, uint32_t data)
 758         {
 759                 write_debug_io16(addr, data & 0xffff);
 760                 write_debug_io16(addr + 2, (data >> 16) & 0xffff);
 761         }
 762         virtual uint32_t read_debug_io32(uint32_t addr)
 763         {
 764                 uint32_t val = read_debug_io16(addr);
 765                 val |= read_debug_io16(addr + 2) << 16;
 766                 return val;
 767         }
 768         virtual bool write_debug_reg(const _TCHAR *reg, uint32_t data)
 769         {
 770                 return false;
 771         }
 772         virtual void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len) {}
 773         virtual int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len)
 774         {
 775                 return 0;
 776         }
 777 #endif
 778         _TCHAR this_device_name[128];
 779
 780         DEVICE* prev_device;
 781         DEVICE* next_device;
 782         int this_device_id;
 783 };
 784 #endif //USE_DEVICES_SHARED_LIB
 785
 786 #endif