source/src/vm/fm7/fm7_mainmem.cpp

   1 /*
   2  * Main memory without MMR for FM-7 [FM7_MAINMEM]
   3  *  Author: K.Ohta
   4  *  Date  : 2015.01.01-
   5  *
   6  */
   7
   8 #include "fm7_mainmem.h"
   9
  10
  11 void FM7_MAINMEM::reset()
  12 {
  13         int i;
  14         waitfactor = 0;
  15         waitcount = 0;
  16         ioaccess_wait = false;
  17         sub_halted = (display->read_signal(SIG_DISPLAY_HALT) == 0) ? false : true;
  18         //sub_halted = false;
  19 #if defined(_FM77AV_VARIANTS)
  20         memset(fm7_bootram, 0x00, 0x1f0);
  21         if((config.boot_mode & 3) == 0) {
  22                 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1800], 0x1e0 * sizeof(uint8));
  23         } else {
  24                 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1a00], 0x1e0 * sizeof(uint8));
  25         }
  26         fm7_bootram[0x1fe] = 0xfe; // Set reset vector.
  27         fm7_bootram[0x1ff] = 0x00; //
  28         initiator_enabled = true;
  29         boot_ram_write = true;
  30 #elif defined(_FM77_VARIANTS)
  31         boot_ram_write = false;
  32 #endif
  33         bootmode = config.boot_mode & 3;
  34 #if defined(HAS_MMR)
  35         if((config.dipswitch & FM7_DIPSW_EXTRAM) != 0) {
  36                 extram_connected = true;
  37         } else {
  38                 extram_connected = false;
  39         }
  40 #endif
  41 #if defined(_FM77AV_VARIANTS)
  42         if(dictrom_connected) {
  43                 use_page2_extram = true;
  44         } else {
  45                 use_page2_extram = ((config.dipswitch & FM7_DIPSW_EXTRAM_AV) != 0) ? true : false;
  46         }
  47 #endif
  48 #ifdef HAS_MMR
  49         for(i = 0x00; i < 0x80; i++) {
  50                 mmr_map_data[i] = 0;
  51         }
  52         mmr_segment = 0;
  53         window_offset = 0;
  54         mmr_enabled = false;
  55         mmr_fast = false;
  56         window_enabled = false;
  57 #endif
  58         if(bootmode == 0) { // IF BASIC BOOT THEN ROM
  59                 basicrom_fd0f = true;
  60         } else { // ELSE RAM
  61                 basicrom_fd0f = false;
  62         }
  63         //maincpu->reset();
  64         clockmode = (config.cpu_type == 0) ? true : false;
  65         is_basicrom = (bootmode == 0) ? true : false;
  66         //if(bootmode < 4) bootmode = config.boot_mode & 3;
  67 }
  68
  69
  70
  71 void FM7_MAINMEM::wait()
  72 {
  73         int waitfactor; // If MMR of TWR enabled, factor = 3.
  74                             // If memory, factor = 2?
  75         if(!clockmode) return; // SLOW
  76 #ifdef HAS_MMR
  77         if(!ioaccess_wait) {
  78                 waitfactor = 2;
  79                 ioaccess_wait = true;
  80         } else { // Not MMR, TWR or enabled FAST MMR mode
  81                 waitfactor = 3; // If(MMR or TWR) and NOT FAST MMR factor = 3, else factor = 2
  82                 if(mmr_fast) waitfactor = 2;
  83                 ioaccess_wait = false;
  84         }
  85         if((window_enabled) &&
  86            (mmr_enabled)) waitfactor = 2;
  87 #else
  88         waitfactor = 2;
  89 #endif
  90         if(waitfactor <= 0) return;
  91         waitcount++;
  92         if(waitcount >= waitfactor) {
  93                 if(maincpu != NULL) maincpu->set_extra_clock(1);
  94                 waitcount = 0;
  95         }
  96 }
  97
  98
  99 int FM7_MAINMEM::window_convert(uint32 addr, uint32 *realaddr)
 100 {
 101         uint32 raddr = addr;
 102 #ifdef HAS_MMR
 103         if((addr < 0x8000) && (addr >= 0x7c00)) {
 104                 raddr = ((window_offset * 256) + addr) & 0x0ffff;
 105                 *realaddr = raddr;
 106 #ifdef _FM77AV_VARIANTS
 107                 //printf("TWR hit %04x -> %04x\n", addr, raddr);
 108                 return FM7_MAINMEM_AV_PAGE0; // 0x00000 - 0x0ffff
 109 #else // FM77(L4 or others)
 110                 *realaddr |= 0x20000;
 111                 return FM7_MAINMEM_EXTRAM; // 0x20000 - 0x2ffff
 112 #endif
 113         }
 114         // Window not hit.
 115 #endif
 116         return -1;
 117 }
 118
 119 int FM7_MAINMEM::mmr_convert(uint32 addr, uint32 *realaddr)
 120 {
 121         uint32  raddr = addr & 0x0fff;
 122         uint32  mmr_bank;
 123         uint32  major_bank;
 124
 125 #ifdef HAS_MMR
 126         if(addr >= 0xfc00) return -1;
 127         mmr_bank = mmr_map_data[(addr >> 12) & 0x000f | (mmr_segment << 4)] & 0x007f;
 128
 129         // Reallocated by MMR
 130         // Bank 3x : Standard memories.
 131         if((mmr_bank < 0x3f) && (mmr_bank >= 0x30)) {
 132                 raddr = ((mmr_bank << 12) | raddr) & 0xffff;
 133                 return nonmmr_convert(raddr, realaddr);
 134         }
 135 #ifdef _FM77AV_VARIANTS
 136         else if(mmr_bank == 0x3f) {
 137                 if((raddr >= 0xd80) && (raddr <= 0xd97)) { // MMR AREA
 138                         *realaddr = 0;
 139                         return FM7_MAINMEM_NULL;
 140                 } else {
 141                         raddr = raddr | 0xf000;
 142                         return nonmmr_convert(raddr, realaddr); // Access I/O, Bootrom, even via MMR.
 143                 }
 144         }
 145 #elif defined(_FM77_VARIANTS)
 146         else if(mmr_bank == 0x3f) {
 147                 if((raddr >= 0xc00) && (raddr < 0xe00)) {
 148                         if(is_basicrom) {
 149                                 *realaddr = 0;
 150                                 return FM7_MAINMEM_ZERO;
 151                         } else {
 152                                 *realaddr = raddr - 0xc00;
 153                                 return FM7_MAINMEM_SHADOWRAM;
 154                         }
 155                 } else if(raddr >= 0xe00) {
 156                         *realaddr = addr - 0x0e00;
 157                         if(is_basicrom) {
 158                                 if(diag_load_bootrom_mmr) {
 159                                         return FM7_MAINMEM_BOOTROM_MMR;
 160                                 } else {
 161                                         return FM7_MAINMEM_BOOTROM_BAS;
 162                                 }
 163                         } else {
 164                                 return FM7_MAINMEM_BOOTROM_RAM;
 165                         }
 166                 } else {
 167                         raddr = raddr | 0xf000;
 168                         return nonmmr_convert(raddr, realaddr); // Access I/O, Bootrom, even via MMR.
 169                 }
 170         }
 171 #endif
 172         major_bank = (mmr_bank >> 4) & 0x0f;
 173
 174 #ifdef _FM77AV_VARIANTS
 175         if(major_bank == 0x0) { // PAGE 0
 176                 *realaddr = ((mmr_bank << 12) | raddr) & 0x0ffff;
 177                 return FM7_MAINMEM_AV_PAGE0;
 178         } else if(major_bank == 0x1) { // PAGE 1
 179                 *realaddr = ((mmr_bank << 12) | raddr) & 0x0ffff;
 180                 return FM7_MAINMEM_AV_DIRECTACCESS;
 181         } else  if(major_bank == 0x2) { // PAGE 2
 182 #if defined(CAPABLE_DICTROM)
 183                         //uint32 dbank = mainio->read_data8(FM7_MAINIO_EXTBANK);
 184                         uint32 dbank = extbank;
 185                         switch(mmr_bank) {
 186                         case 0x28:
 187                         case 0x29: // Backuped RAM
 188                                 if(((dbank & 0x80) != 0) && (dictrom_connected)){ // Battery backuped RAM
 189                                         raddr =  raddr & 0x1ff;
 190                                         *realaddr = raddr;
 191                                         return FM7_MAINMEM_BACKUPED_RAM;
 192                                 }
 193                                 break;
 194                         case 0x2e:
 195                                 if(((dbank & 0x40) != 0) && (dictrom_connected)) { // Dictionary ROM
 196                                         dbank = dbank & 0x3f;
 197                                         uint32 extrom = mainio->read_data8(FM7_MAINIO_EXTROM) & 0x80;
 198                                         //uint32 extrom = extrom_bank;
 199                                         if(extrom == 0) { // Dictionary selected.
 200                                                 dbank = dbank << 12;
 201                                                 *realaddr = raddr | dbank;
 202                                                 return FM7_MAINMEM_DICTROM;
 203                                         } else if(dbank <= 0x1f) { // KANJI
 204                                                 *realaddr = (dbank << 12) | raddr;
 205                                                 return FM7_MAINMEM_KANJI_LEVEL1;
 206                                         } else if(dbank <= 0x37) {
 207                                                 dbank = dbank << 12;
 208                                                 *realaddr = (dbank - 0x20000) | raddr;
 209                                                 return FM7_MAINMEM_77AV40_EXTRAROM;
 210                                         } else if(dbank <= 0x3f) {
 211                                                 raddr = ((dbank << 12) - 0x30000) | raddr;
 212                                                 if((raddr >= 0xffe0) || (raddr < 0xfd00)) {
 213                                                         return nonmmr_convert(raddr, realaddr);
 214                                                 } else if((raddr >= 0xfe00) || (raddr < 0xffe0)) {
 215                                                         *realaddr = raddr - 0xfe00;
 216                                                         return FM7_MAINMEM_BOOTROM_DOS;
 217                                                 }
 218                                                 *realaddr = raddr + 0x10000;
 219                                                 return FM7_MAINMEM_77AV40_EXTRAROM;
 220                                         }
 221                                 }
 222                                 break;
 223                         }
 224                         *realaddr = (raddr | (mmr_bank << 12)) & 0x0ffff;
 225                         return FM7_MAINMEM_AV_PAGE2;
 226 #else
 227                 //*realaddr = (raddr | (mmr_bank << 12)) & 0x0ffff;
 228                 if(use_page2_extram) {
 229                         *realaddr = ((mmr_bank << 12) | raddr) & 0x0ffff;
 230                         return FM7_MAINMEM_AV_PAGE2;
 231                 }
 232 #endif
 233         }
 234 #endif
 235 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX)
 236         else if(extram_connected) { // PAGE 4-
 237                 if(major_bank >= (extram_pages + 4)) {
 238                         *realaddr = 0;
 239                         return FM7_MAINMEM_NULL; // $FF
 240                 } else {
 241                         raddr = ((uint32)(mmr_bank - 0x40) << 12) | raddr;
 242                         *realaddr = raddr;
 243                         return FM7_MAINMEM_EXTRAM;
 244                 }
 245         } else {
 246                 if(mmr_bank >= 0x40) {
 247                         *realaddr = 0;
 248                         return FM7_MAINMEM_NULL;
 249                 }
 250         }
 251 #elif defined(_FM77_VARIANTS)
 252         if(extram_connected) { // PAGE 4-
 253                 if((major_bank > extram_pages) || (major_bank >= 3)) {
 254                         *realaddr = 0;
 255                         return FM7_MAINMEM_NULL; // $FF
 256                 } else {
 257                         raddr = ((uint32)mmr_bank << 12) | raddr;
 258                         *realaddr = raddr;
 259                         return FM7_MAINMEM_EXTRAM;
 260                 }
 261         } else {
 262                 *realaddr = 0;
 263                 return FM7_MAINMEM_NULL; // $FF
 264         }
 265 #else // _FM77AV_VARIANTS
 266         if(major_bank > 3) {
 267                 *realaddr = 0;
 268                 return FM7_MAINMEM_NULL; // $FF
 269         }
 270 #endif
 271 #endif // HAS_MMR
 272         *realaddr = 0;
 273         return -1;
 274 }
 275
 276 int FM7_MAINMEM::nonmmr_convert(uint32 addr, uint32 *realaddr)
 277 {
 278         addr &= 0x0ffff;
 279 #ifdef _FM77AV_VARIANTS
 280         if(initiator_enabled) {
 281                 if((addr >= 0x6000) && (addr < 0x8000)) {
 282                     //printf("HIT %02x\n", read_table[FM7_MAINMEM_INITROM].memory[addr - 0x6000]);
 283                         *realaddr = addr - 0x6000;
 284                         return FM7_MAINMEM_INITROM;
 285                 }
 286                 if(addr >= 0xfffe) {
 287                   //printf("HIT %02x\n", read_table[FM7_MAINMEM_INITROM].memory[addr - 0xe000]);
 288                         *realaddr = addr - 0xe000;
 289                         return FM7_MAINMEM_INITROM;
 290                 }
 291         }
 292 #endif
 293
 294         if(addr < 0x8000) {
 295                 *realaddr = addr;
 296                 return FM7_MAINMEM_OMOTE;
 297         } else if(addr < 0xfc00) {
 298                 *realaddr = addr - 0x8000;
 299                 if(basicrom_fd0f) {
 300                         return FM7_MAINMEM_BASICROM;
 301                 }
 302                 return FM7_MAINMEM_URA;
 303         } else  if(addr < 0xfc80) {
 304                 *realaddr = addr - 0xfc00;
 305                 return FM7_MAINMEM_BIOSWORK;
 306         }else if(addr < 0xfd00) {
 307                 *realaddr = addr - 0xfc80;
 308                 return FM7_MAINMEM_SHAREDRAM;
 309         } else if(addr < 0xfe00) {
 310                 wait();
 311                 *realaddr = addr - 0xfd00;
 312                 return FM7_MAINMEM_MMIO;
 313         }else if(addr < 0xffe0){
 314                 wait();
 315                 *realaddr = addr - 0xfe00;
 316 #if defined(_FM77AV_VARIANTS)
 317                 return FM7_MAINMEM_BOOTROM_RAM;
 318 #else
 319                         switch(bootmode) {
 320                         case 0:
 321                                 return FM7_MAINMEM_BOOTROM_BAS;
 322                                 break;
 323                         case 1:
 324                           //printf("BOOT_DOS ADDR=%04x\n", addr);
 325                                 return FM7_MAINMEM_BOOTROM_DOS;
 326                                 break;
 327                         case 2:
 328                                 return FM7_MAINMEM_BOOTROM_MMR;
 329                                 break;
 330                         case 3:
 331                                 return FM7_MAINMEM_BOOTROM_EXTRA;
 332                                 break;
 333 #if defined(_FM77_VARIANTS)
 334                         case 4:
 335                                 return FM7_MAINMEM_BOOTROM_RAM;
 336                                 break;
 337 #endif
 338                         default:
 339                                 return FM7_MAINMEM_BOOTROM_BAS; // Really?
 340                                 break;
 341                 }
 342 #endif
 343         } else if(addr < 0xfffe) { // VECTOR
 344                 *realaddr = addr - 0xffe0;
 345                 return FM7_MAINMEM_VECTOR;
 346         } else if(addr < 0x10000) {
 347                 *realaddr = addr - 0xfffe;
 348                 return FM7_MAINMEM_RESET_VECTOR;
 349         }
 350
 351         emu->out_debug_log("Main: Over run ADDR = %08x", addr);
 352         *realaddr = addr;
 353         return FM7_MAINMEM_NULL;
 354 }
 355
 356 int FM7_MAINMEM::getbank(uint32 addr, uint32 *realaddr)
 357 {
 358         if(realaddr == NULL) return FM7_MAINMEM_NULL; // Not effect.
 359 #ifdef HAS_MMR
 360         if(window_enabled) {
 361                 int stat;
 362                 uint32 raddr;
 363                 stat = window_convert(addr, &raddr);
 364                 //if(stat >= 0) printf("WINDOW CONVERT: %04x to %04x, bank = %02x\n", addr, raddr, stat);
 365                 if(stat >= 0) {
 366                         *realaddr = raddr;
 367                         return stat;
 368                 }
 369         }
 370         if(mmr_enabled) {
 371                 int stat;
 372                 uint32 raddr;
 373                 stat = mmr_convert(addr, &raddr);
 374                 if(stat >= 0) {
 375                   //printf("MMR CONVERT: %04x to %05x, bank = %02x\n", addr, raddr, stat);
 376                         *realaddr = raddr;
 377                         return stat;
 378                 }
 379         }
 380 #endif
 381         addr = addr & 0xffff;
 382         // NOT MMR.
 383         return nonmmr_convert(addr, realaddr);
 384 }
 385
 386 void FM7_MAINMEM::write_signal(int sigid, uint32 data, uint32 mask)
 387 {
 388         bool flag = ((data & mask) != 0);
 389         switch(sigid) {
 390                 case SIG_FM7_SUB_HALT:
 391                         sub_halted = flag;
 392                         break;
 393                 case FM7_MAINIO_IS_BASICROM:
 394                         is_basicrom = flag;
 395                         break;
 396                 case FM7_MAINIO_PUSH_FD0F:
 397                         basicrom_fd0f = flag;
 398                         break;
 399                 case FM7_MAINIO_CLOCKMODE:
 400                         clockmode = flag;
 401                         break;
 402                 case FM7_MAINIO_BOOTMODE:
 403                         bootmode = data & 0x07;
 404                         break;
 405 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
 406                 case FM7_MAINIO_BOOTRAM_RW:
 407                         bootmode = flag;
 408                         break;
 409 #endif
 410 #ifdef _FM77AV_VARIANTS
 411                 case FM7_MAINIO_INITROM_ENABLED:
 412                         initiator_enabled = flag;
 413                         break;
 414                 case FM7_MAINIO_EXTBANK:
 415                         extcard_bank = data & 0xff;
 416                         break;
 417                 case FM7_MAINIO_EXTROM:
 418                         extrom_bank = data & 0xff;
 419                         break;
 420 #endif
 421 #ifdef HAS_MMR
 422                 case FM7_MAINIO_WINDOW_ENABLED:
 423                         window_enabled = flag;
 424                         break;
 425                 case FM7_MAINIO_FASTMMR_ENABLED:
 426                         mmr_fast = flag;
 427                         break;
 428                 case FM7_MAINIO_MMR_ENABLED:
 429                         mmr_enabled = flag;
 430                         break;
 431 #endif
 432         }
 433 }
 434
 435
 436 uint32 FM7_MAINMEM::read_data8(uint32 addr)
 437 {
 438         uint32 realaddr;
 439         int bank;
 440
 441         bank = getbank(addr, &realaddr);
 442         if(bank < 0) {
 443                 emu->out_debug_log("Illegal BANK: ADDR = %04x", addr);
 444                 return 0xff; // Illegal
 445         }
 446         if(bank == FM7_MAINMEM_SHAREDRAM) {
 447                         if(!sub_halted) return 0xff; // Not halt
 448                         return display->read_data8(realaddr  + 0xd380); // Okay?
 449         //} else if(bank == FM7_MAINMEM_MMIO) {
 450         //      return mainio->read_data8(realaddr);
 451         } else if(bank == FM7_MAINMEM_NULL) {
 452                 return 0xff;
 453         }
 454 #if defined(_FM77AV_VARIANTS)
 455         else if(bank == FM7_MAINMEM_AV_DIRECTACCESS) {
 456                 if(!sub_halted) return 0xff; // Not halt
 457                 return display->read_data8(realaddr); // Okay?
 458         }
 459 #endif
 460         else if(read_table[bank].dev != NULL) {
 461                 return read_table[bank].dev->read_data8(realaddr);
 462         } else if(read_table[bank].memory != NULL) {
 463                 return read_table[bank].memory[realaddr];
 464         }
 465         return 0xff; // Dummy
 466 }
 467
 468 void FM7_MAINMEM::write_data8(uint32 addr, uint32 data)
 469 {
 470         uint32 realaddr;
 471         int bank;
 472         if(addr >= FM7_MAINIO_WINDOW_OFFSET) {
 473                 switch(addr) {
 474                 case FM7_MAINIO_WINDOW_OFFSET:
 475                         window_offset = data;
 476                         break;
 477                 case FM7_MAINIO_MMR_SEGMENT:
 478                         mmr_segment = data & 0x0f;
 479                         break;
 480                 default:
 481                         if((addr >= FM7_MAINIO_MMR_BANK) && (addr < (FM7_MAINIO_MMR_BANK + 0x80))){
 482                                 mmr_map_data[addr - FM7_MAINIO_MMR_BANK] = (uint8)data;
 483                         }
 484                         break;
 485                 }
 486                 return;
 487         }
 488         bank = getbank(addr, &realaddr);
 489         if(bank < 0) {
 490                 emu->out_debug_log("Illegal BANK: ADDR = %04x", addr);
 491                 return; // Illegal
 492         }
 493         if(bank == FM7_MAINMEM_SHAREDRAM) {
 494                 if(!sub_halted) return; // Not halt
 495                 display->write_data8(realaddr + 0xd380, data); // Okay?
 496                 return;
 497         //} else if(bank == FM7_MAINMEM_MMIO) {
 498         //      mainio->write_data8(realaddr, (uint8)data);
 499         //      return;
 500         } else if(bank == FM7_MAINMEM_NULL) {
 501                 return;
 502         }
 503 #if defined(_FM77AV_VARIANTS)
 504         else if(bank == FM7_MAINMEM_AV_DIRECTACCESS) {
 505                 if(!sub_halted) return; // Not halt
 506                         display->write_data8(realaddr, data); // Okay?
 507                         return;
 508         }
 509 #endif
 510 #if defined(HAS_MMR)
 511         else if(bank == FM7_MAINMEM_BOOTROM_RAM) {
 512                 if(!boot_ram_write) return;
 513                 write_table[bank].memory[realaddr] = (uint8)data;
 514                 return;
 515         }
 516 #endif
 517         else if(write_table[bank].dev != NULL) {
 518                 write_table[bank].dev->write_data8(realaddr, data);
 519         }    else if(write_table[bank].memory != NULL) {
 520                 write_table[bank].memory[realaddr] = (uint8)data;
 521         }
 522 }
 523
 524 // Read / Write data(s) as big endian.
 525 uint32 FM7_MAINMEM::read_data16(uint32 addr)
 526 {
 527         uint32 hi, lo;
 528         uint32 val;
 529
 530         hi = read_data8(addr) & 0xff;
 531         lo = read_data8(addr + 1) & 0xff;
 532
 533         val = hi * 256 + lo;
 534         return val;
 535 }
 536
 537 uint32 FM7_MAINMEM::read_data32(uint32 addr)
 538 {
 539         uint32 ah, a2, a3, al;
 540         uint32 val;
 541
 542         ah = read_data8(addr) & 0xff;
 543         a2 = read_data8(addr + 1) & 0xff;
 544         a3 = read_data8(addr + 2) & 0xff;
 545         al = read_data8(addr + 3) & 0xff;
 546
 547         val = ah * (65536 * 256) + a2 * 65536 + a3 * 256 + al;
 548         return val;
 549 }
 550
 551 void FM7_MAINMEM::write_data16(uint32 addr, uint32 data)
 552 {
 553         uint32 d = data;
 554
 555         write_data8(addr + 1, d & 0xff);
 556         d = d / 256;
 557         write_data8(addr + 0, d & 0xff);
 558 }
 559
 560 void FM7_MAINMEM::write_data32(uint32 addr, uint32 data)
 561 {
 562         uint32 d = data;
 563
 564         write_data8(addr + 3, d & 0xff);
 565         d = d / 256;
 566         write_data8(addr + 2, d & 0xff);
 567         d = d / 256;
 568         write_data8(addr + 1, d & 0xff);
 569         d = d / 256;
 570         write_data8(addr + 0, d & 0xff);
 571 }
 572
 573
 574 bool FM7_MAINMEM::get_loadstat_basicrom(void)
 575 {
 576         return diag_load_basicrom;
 577 }
 578
 579 bool FM7_MAINMEM::get_loadstat_bootrom_bas(void)
 580 {
 581         return diag_load_bootrom_bas;
 582 }
 583
 584 bool FM7_MAINMEM::get_loadstat_bootrom_dos(void)
 585 {
 586         return diag_load_bootrom_dos;
 587 }
 588
 589 uint32 FM7_MAINMEM::read_bios(const char *name, uint8 *ptr, uint32 size)
 590 {
 591         FILEIO fio;
 592         uint32 blocks;
 593         _TCHAR *s;
 594
 595         if((name == NULL) || (ptr == NULL))  return 0;
 596         s = emu->bios_path((_TCHAR *)name);
 597         if(s == NULL) return 0;
 598
 599         if(!fio.Fopen(s, FILEIO_READ_BINARY)) return 0;
 600         blocks = fio.Fread(ptr, size, 1);
 601         fio.Fclose();
 602
 603         return blocks * size;
 604 }
 605
 606 uint32 FM7_MAINMEM::write_bios(const char *name, uint8 *ptr, uint32 size)
 607 {
 608         FILEIO fio;
 609         uint32 blocks;
 610         _TCHAR *s;
 611
 612         if((name == NULL) || (ptr == NULL))  return 0;
 613         s = emu->bios_path((_TCHAR *)name);
 614         if(s == NULL) return 0;
 615
 616         fio.Fopen(s, FILEIO_WRITE_BINARY);
 617         blocks = fio.Fwrite(ptr, size, 1);
 618         fio.Fclose();
 619
 620         return blocks * size;
 621 }
 622
 623 FM7_MAINMEM::FM7_MAINMEM(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
 624 {
 625         p_vm = parent_vm;
 626         p_emu = parent_emu;
 627 #if !defined(_FM77AV_VARIANTS)
 628         for(i = 0; i < 4; i++) fm7_bootroms[i] = (uint8 *)malloc(0x200);
 629 #endif
 630         mainio = NULL;
 631         display = NULL;
 632         maincpu = NULL;
 633         kanjiclass1 = NULL;
 634         kanjiclass2 = NULL;
 635 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) ||  defined(_FM77_VARIANTS)
 636         fm7_mainmem_extram = NULL;
 637 #endif
 638 }
 639
 640 FM7_MAINMEM::~FM7_MAINMEM()
 641 {
 642 }
 643
 644 void FM7_MAINMEM::initialize(void)
 645 {
 646         int i;
 647         diag_load_basicrom = false;
 648         diag_load_bootrom_bas = false;
 649         diag_load_bootrom_dos = false;
 650         diag_load_bootrom_mmr = false;
 651 #if defined(_FM77AV_VARIANTS)
 652         dictrom_connected = false;
 653 #endif
 654 #ifdef HAS_MMR
 655         for(i = 0x00; i < 0x80; i++) {
 656                 mmr_map_data[i] = 0;
 657         }
 658         mmr_segment = 0;
 659         window_offset = 0;
 660         mmr_enabled = false;
 661         mmr_fast = false;
 662         window_enabled = false;
 663 #endif
 664 #ifdef _FM77AV_VARIANTS
 665         extcard_bank = 0;
 666         extrom_bank = 0;
 667         initiator_enabled = true;
 668         boot_ram_write = true;
 669 #endif
 670         bootmode = config.boot_mode & 3;
 671         basicrom_fd0f = false;
 672         is_basicrom = (bootmode == 0) ? true : false;
 673         // Initialize table
 674         // $0000-$7FFF
 675         memset(read_table, 0x00, sizeof(read_table));
 676         memset(write_table, 0x00, sizeof(write_table));
 677         i = FM7_MAINMEM_OMOTE;
 678         memset(fm7_mainmem_omote, 0x00, 0x8000 * sizeof(uint8));
 679         read_table[i].memory = fm7_mainmem_omote;
 680         write_table[i].memory = fm7_mainmem_omote;
 681
 682         // $8000-$FBFF
 683         i = FM7_MAINMEM_URA;
 684         memset(fm7_mainmem_ura, 0x00, 0x7c00 * sizeof(uint8));
 685         read_table[i].memory = fm7_mainmem_ura;
 686         write_table[i].memory = fm7_mainmem_ura;
 687
 688
 689         i = FM7_MAINMEM_VECTOR;
 690         memset(fm7_mainmem_bootrom_vector, 0x00, 0x1e);
 691         read_table[i].memory = fm7_mainmem_bootrom_vector;
 692         write_table[i].memory = fm7_mainmem_bootrom_vector;
 693
 694 #if defined(CAPABLE_DICTROM)
 695         diag_load_dictrom = false;
 696         i = FM7_MAINMEM_DICTROM;
 697         memset(fm7_mainmem_extrarom, 0xff, 0x40000 * sizeof(uint8));
 698         read_table[i].memory = fm7_mainmem_dictrom;
 699         write_table[i].memory = NULL;
 700         if(read_bios("DICROM.ROM", fm7_mainmem_dictrom, 0x40000) == 0x40000) diag_load_dictrom = true;
 701         emu->out_debug_log("DICTIONARY ROM READING : %s", diag_load_dictrom ? "OK" : "NG");
 702         dictrom_connected = diag_load_dictrom;
 703
 704         i = FM7_MAINMEM_BACKUPED_RAM;
 705         diag_load_learndata = false;
 706         memset(fm7_mainmem_learndata, 0x00, 0x2000 * sizeof(uint8));
 707         read_table[i].memory = fm7_mainmem_learndata;
 708         write_table[i].memory = fm7_mainmem_learndata;
 709         if(read_bios("USERDIC.DAT", read_table[i].memory, 0x2000) == 0x2000) diag_load_learndata = true;
 710         emu->out_debug_log("DICTIONARY ROM READING : %s", diag_load_learndata ? "OK" : "NG");
 711         if(!diag_load_learndata) write_bios("USERDIC.DAT", fm7_mainmem_learndata, 0x2000);
 712 #endif
 713
 714 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20)
 715         i = FM7_MAINMEM_77AV40_EXTRAROM;
 716         diag_load_extrarom = false;
 717         memset(fm7_mainmem_extrarom, 0xff, 0x20000 * sizeof(uint8));
 718         read_table[i].memory = fm7_mainmem_extrarom;
 719         write_table[i].memory = NULL;
 720         if(read_bios("EXTSUB.ROM", read_table[i].memory, 0xc000) >= 0xc000) diag_load_extrarom = true;
 721         emu->out_debug_log("AV40 EXTRA ROM READING : %s", diag_load_extrarom ? "OK" : "NG");
 722 #endif
 723
 724 #if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
 725         extram_pages = FM77_EXRAM_BANKS;
 726 #if defined(_FM77_VARIANTS)
 727         if(extram_pages > 3) extram_pages = 3;
 728 #else
 729         if(extram_pages > 12) extram_pages = 12;
 730 #endif
 731         if(extram_pages > 0) {
 732                 i = FM7_MAINMEM_EXTRAM;
 733                 fm7_mainmem_extram = (uint8 *)malloc(extram_pages * 0x10000);
 734                 if(fm7_mainmem_extram != NULL) {
 735                         memset(fm7_mainmem_extram, 0x00, extram_pages * 0x10000);
 736                         read_table[i].memory = fm7_mainmem_extram;
 737                         write_table[i].memory = fm7_mainmem_extram;
 738                 }
 739         }
 740 #endif
 741
 742 #if defined(_FM77_VARIANTS)
 743         memset(fm77_shadowram, 0x00, 0x200);
 744         read_table[FM7_MAINMEM_SHADOWRAM].memory = fm77_shadowram;
 745         write_table[FM7_MAINMEM_SHADOWRAM].memory = fm77_shadowram;
 746 #endif
 747 #if !defined(_FM77AV_VARIANTS)
 748         for(i = FM7_MAINMEM_BOOTROM_BAS; i <= FM7_MAINMEM_BOOTROM_EXTRA; i++) {
 749                  memset(fm7_bootroms[i - FM7_MAINMEM_BOOTROM_BAS], 0xff, 0x200);
 750                  read_table[i].memory = fm7_bootroms[i - FM7_MAINMEM_BOOTROM_BAS];
 751                  write_table[i].memory = NULL;
 752         }
 753 #endif
 754 #if defined(_FM8)
 755         if(read_bios("BOOT_BAS8.ROM", fm7_bootroms[0], 0x200) >= 0x1e0) {
 756                 diag_load_bootrom_bas = true;
 757         } else {
 758                 diag_load_bootrom_bas = false;
 759         }
 760         if(read_bios("BOOT_DOS8.ROM", fm7_bootroms[1], 0x200) >= 0x1e0) {
 761                 diag_load_bootrom_dos = true;
 762         } else {
 763                 diag_load_bootrom_dos = false;
 764         }
 765         diag_load_bootrom_mmr = false;
 766 # elif defined(_FM7) || defined(_FMNEW7) || defined(_FM77_VARIANTS)
 767         if(read_bios("BOOT_BAS.ROM", fm7_bootroms[0], 0x200) >= 0x1e0) {
 768                 diag_load_bootrom_bas = true;
 769         } else {
 770                 diag_load_bootrom_bas = false;
 771         }
 772         if(read_bios("BOOT_DOS.ROM", fm7_bootroms[1], 0x200) >= 0x1e0) {
 773                 diag_load_bootrom_dos = true;
 774         } else {
 775                 diag_load_bootrom_dos = false;
 776         }
 777 #  if defined(_FM77_VARIANTS)
 778         if(read_bios("BOOT_MMR.ROM", fm7_bootroms[2], 0x200) >= 0x1e0) {
 779                 diag_load_bootrom_mmr = true;
 780         } else {
 781                 diag_load_bootrom_mmr = false;
 782         }
 783
 784         i = FM7_MAINMEM_BOOTROM_RAM;
 785         memset(fm7_bootram, 0x00, 0x200 * sizeof(uint8)); // RAM
 786         read_table[i].memory = fm7_bootram;
 787         write_table[i].memory = fm7_bootram;
 788 #  else
 789        // FM-7/8
 790         diag_load_bootrom_mmr = false;
 791 #  endif
 792 # elif defined(_FM77AV_VARIANTS)
 793         i = FM7_MAINMEM_AV_PAGE0;
 794         memset(fm7_mainmem_mmrbank_0, 0x00, 0x10000 * sizeof(uint8));
 795         read_table[i].memory = fm7_mainmem_mmrbank_0;
 796         write_table[i].memory = fm7_mainmem_mmrbank_0;
 797
 798         i = FM7_MAINMEM_AV_PAGE2;
 799         memset(fm7_mainmem_mmrbank_2, 0x00, 0x10000 * sizeof(uint8));
 800         read_table[i].memory = fm7_mainmem_mmrbank_2;
 801         write_table[i].memory = fm7_mainmem_mmrbank_2;
 802
 803         i = FM7_MAINMEM_INITROM;
 804         diag_load_initrom = false;
 805         memset(fm7_mainmem_initrom, 0xff, 0x2000 * sizeof(uint8));
 806         read_table[i].memory = fm7_mainmem_initrom;
 807         write_table[i].memory = NULL;
 808         if(read_bios("INITIATE.ROM", read_table[i].memory, 0x2000) >= 0x2000) diag_load_initrom = true;
 809         emu->out_debug_log("77AV INITIATOR ROM READING : %s", diag_load_initrom ? "OK" : "NG");
 810
 811         read_table[FM7_MAINMEM_BOOTROM_BAS].memory = NULL; // Not connected.
 812         read_table[FM7_MAINMEM_BOOTROM_DOS].memory = NULL; // Not connected.
 813         read_table[FM7_MAINMEM_BOOTROM_MMR].memory = NULL; // Not connected.
 814
 815         i = FM7_MAINMEM_BOOTROM_RAM;
 816         memset(fm7_bootram, 0x00, 0x200 * sizeof(uint8)); // RAM
 817         read_table[i].memory = fm7_bootram;
 818         write_table[i].memory = fm7_bootram;
 819         if(diag_load_initrom) diag_load_bootrom_bas = true;
 820         if(diag_load_initrom) diag_load_bootrom_dos = true;
 821         if((config.boot_mode & 0x03) == 0) {
 822                 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1800], 0x1e0 * sizeof(uint8));
 823         } else {
 824                 memcpy(fm7_bootram, &fm7_mainmem_initrom[0x1a00], 0x1e0 * sizeof(uint8));
 825         }
 826         fm7_bootram[0x1fe] = 0xfe; // Set reset vector.
 827         fm7_bootram[0x1ff] = 0x00; //
 828         // FM-7
 829 #endif
 830         emu->out_debug_log("BOOT ROM (basic mode) READING : %s", diag_load_bootrom_bas ? "OK" : "NG");
 831         emu->out_debug_log("BOOT ROM (DOS   mode) READING : %s", diag_load_bootrom_dos ? "OK" : "NG");
 832 #if defined(_FM77_VARIANTS)
 833         emu->out_debug_log("BOOT ROM (MMR   mode) READING : %s", diag_load_bootrom_mmr ? "OK" : "NG");
 834 #endif
 835
 836         i = FM7_MAINMEM_VECTOR;
 837         memset(fm7_mainmem_bootrom_vector, 0x00, 0x1e);
 838         read_table[i].memory = fm7_mainmem_bootrom_vector;
 839         write_table[i].memory = fm7_mainmem_bootrom_vector;
 840
 841 #if !defined(_FM77AV_VARIANTS)
 842         for(i = 0; i <= 3; i++) {
 843                 uint8 *p = fm7_bootroms[i];
 844                 p[0x1fe] = 0xfe; // Set reset vector.
 845                 p[0x1ff] = 0x00; //
 846         }
 847 #endif
 848         i = FM7_MAINMEM_RESET_VECTOR;
 849         fm7_mainmem_reset_vector[0] = 0xfe;
 850         fm7_mainmem_reset_vector[1] = 0x00;
 851
 852         read_table[i].memory = fm7_mainmem_reset_vector;
 853         write_table[i].memory = NULL;
 854
 855         i = FM7_MAINMEM_BASICROM;
 856         memset(fm7_mainmem_basicrom, 0xff, 0x7c00 * sizeof(uint8));
 857         read_table[i].dev = NULL;
 858         read_table[i].memory = fm7_mainmem_basicrom;
 859         write_table[i].dev = NULL;
 860         write_table[i].memory = NULL;
 861 #if !defined(_FM8)
 862         if(read_bios("FBASIC302.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) {
 863                 diag_load_basicrom = true;
 864         } else if(read_bios("FBASIC300.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) {
 865                 diag_load_basicrom = true;
 866         } else if(read_bios("FBASIC30.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) {
 867                 diag_load_basicrom = true;
 868         }
 869
 870 #else // FM8
 871         if(read_bios("FBASIC10.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) diag_load_basicrom = true;
 872 #endif
 873         emu->out_debug_log("BASIC ROM READING : %s", diag_load_basicrom ? "OK" : "NG");
 874
 875         i = FM7_MAINMEM_BIOSWORK;
 876         memset(fm7_mainmem_bioswork, 0x00, 0x80 * sizeof(uint8));
 877         read_table[i].dev = NULL;
 878         read_table[i].memory = fm7_mainmem_bioswork;
 879         write_table[i].dev = NULL;
 880         write_table[i].memory = fm7_mainmem_bioswork;
 881 }
 882
 883 void FM7_MAINMEM::release()
 884 {
 885 # if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
 886         if(fm7_mainmem_extram != NULL) free(fm7_mainmem_extram);
 887 #endif
 888 #if !defined(_FM77AV_VARIANTS)
 889         int i;
 890         for(i = 0; i < 4; i++) {
 891                 if(fm7_bootroms[i] != NULL) free(fm7_bootroms[i]);
 892                 fm7_bootroms[i] = NULL;
 893         }
 894 #endif
 895 //      MEMORY::release();
 896 }
 897
 898 #define STATE_VERSION 2
 899 void FM7_MAINMEM::save_state(FILEIO *state_fio)
 900 {
 901         state_fio->FputUint32_BE(STATE_VERSION);
 902         state_fio->FputInt32_BE(this_device_id);
 903
 904         // V1
 905         state_fio->FputBool(ioaccess_wait);
 906         state_fio->FputInt32_BE(waitfactor);
 907         state_fio->FputInt32_BE(waitcount);
 908
 909         state_fio->FputBool(sub_halted);
 910
 911         state_fio->FputBool(diag_load_basicrom);
 912         state_fio->FputBool(diag_load_bootrom_bas);
 913         state_fio->FputBool(diag_load_bootrom_dos);
 914         state_fio->FputBool(diag_load_bootrom_mmr);
 915         state_fio->Fwrite(fm7_mainmem_omote, sizeof(fm7_mainmem_omote), 1);
 916         state_fio->Fwrite(fm7_mainmem_ura, sizeof(fm7_mainmem_ura), 1);
 917         state_fio->Fwrite(fm7_mainmem_basicrom, sizeof(fm7_mainmem_basicrom), 1);
 918         state_fio->Fwrite(fm7_mainmem_bioswork, sizeof(fm7_mainmem_bioswork), 1);
 919         state_fio->Fwrite(fm7_mainmem_bootrom_vector, sizeof(fm7_mainmem_bootrom_vector), 1);
 920         state_fio->Fwrite(fm7_mainmem_reset_vector, sizeof(fm7_mainmem_reset_vector), 1);
 921
 922         state_fio->Fwrite(fm7_mainmem_null, sizeof(fm7_mainmem_null), 1);
 923 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
 924         state_fio->Fwrite(fm7_bootram, sizeof(fm7_bootram), 1);
 925 #endif
 926 #if !defined(_FM77AV_VARIANTS)
 927         int addr;
 928         for(addr = 0; addr < 4; addr++) state_fio->Fwrite(fm7_bootroms[addr], sizeof(0x200), 1);
 929 #endif
 930 #ifdef _FM77AV_VARIANTS
 931         state_fio->FputBool(dictrom_connected);
 932         state_fio->FputBool(use_page2_extram);
 933
 934         state_fio->FputBool(diag_load_initrom);
 935         state_fio->FputBool(diag_load_dictrom);
 936         state_fio->FputBool(diag_load_learndata);
 937         state_fio->Fwrite(fm7_mainmem_initrom, sizeof(fm7_mainmem_initrom), 1);
 938         state_fio->Fwrite(fm7_mainmem_mmrbank_0, sizeof(fm7_mainmem_mmrbank_0), 1);
 939         state_fio->Fwrite(fm7_mainmem_mmrbank_2, sizeof(fm7_mainmem_mmrbank_2), 1);
 940
 941 # if defined(CAPABLE_DICTROM)
 942         state_fio->FputBool(diag_load_extrarom);
 943         state_fio->Fwrite(fm7_mainmem_extrarom, sizeof(fm7_mainmem_extrarom), 1);
 944         state_fio->Fwrite(fm7_mainmem_dictrom, sizeof(fm7_mainmem_dictrom), 1);
 945         state_fio->Fwrite(fm7_mainmem_learndata, sizeof(fm7_mainmem_learndata), 1);
 946 # endif
 947 #endif
 948
 949 #ifdef HAS_MMR
 950         state_fio->FputBool(extram_connected);
 951 # if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
 952         int pages;
 953         state_fio->FputInt32_BE(extram_pages);
 954         pages = extram_pages;
 955 #  if defined(_FM77_VARIANTS)
 956         if(pages > 3) pages = 3;
 957 #  else
 958         if(pages > 12) pages = 12;
 959 #  endif
 960         if(pages > 0) state_fio->Fwrite(fm7_mainmem_extram, pages * 0x10000, 1);
 961 #  if defined(_FM77_VARIANTS)
 962         state_fio->Fwrite(fm77_shadowram, sizeof(fm77_shadowram), 1);
 963 #  endif
 964 # endif
 965 #endif
 966
 967         { // V2;
 968                 state_fio->FputBool(is_basicrom);
 969                 state_fio->FputBool(clockmode);
 970                 state_fio->FputBool(basicrom_fd0f);
 971                 state_fio->FputUint32_BE(bootmode);
 972 #if defined(_FM77AV_VARIANTS)
 973                 state_fio->FputUint32_BE(extcard_bank);
 974                 state_fio->FputUint32_BE(extrom_bank);
 975                 state_fio->FputBool(initiator_enabled);
 976 #endif
 977 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
 978                 state_fio->FputBool(boot_ram_write);
 979 #endif
 980 #if defined(HAS_MMR)
 981                 state_fio->FputBool(window_enabled);
 982                 state_fio->FputBool(mmr_enabled);
 983                 state_fio->FputBool(mmr_fast);
 984                 state_fio->FputUint16_BE(window_offset);
 985                 state_fio->FputUint8(mmr_segment);
 986                 state_fio->Fwrite(mmr_map_data, sizeof(mmr_map_data), 1);
 987 #endif
 988         }
 989 }
 990
 991 bool FM7_MAINMEM::load_state(FILEIO *state_fio)
 992 {
 993         bool stat = false;
 994         uint32 version;
 995         version = state_fio->FgetUint32_BE();
 996         if(this_device_id != state_fio->FgetInt32_BE()) return false;
 997         if(version >= 1) {
 998                 // V1
 999                 ioaccess_wait = state_fio->FgetBool();
1000                 waitfactor = state_fio->FgetInt32_BE();
1001                 waitcount = state_fio->FgetInt32_BE();
1002
1003                 sub_halted = state_fio->FgetBool();
1004
1005                 diag_load_basicrom = state_fio->FgetBool();
1006                 diag_load_bootrom_bas = state_fio->FgetBool();
1007                 diag_load_bootrom_dos = state_fio->FgetBool();
1008                 diag_load_bootrom_mmr = state_fio->FgetBool();
1009
1010                 state_fio->Fread(fm7_mainmem_omote, sizeof(fm7_mainmem_omote), 1);
1011                 state_fio->Fread(fm7_mainmem_ura, sizeof(fm7_mainmem_ura), 1);
1012                 state_fio->Fread(fm7_mainmem_basicrom, sizeof(fm7_mainmem_basicrom), 1);
1013                 state_fio->Fread(fm7_mainmem_bioswork, sizeof(fm7_mainmem_bioswork), 1);
1014                 state_fio->Fread(fm7_mainmem_bootrom_vector, sizeof(fm7_mainmem_bootrom_vector), 1);
1015                 state_fio->Fread(fm7_mainmem_reset_vector, sizeof(fm7_mainmem_reset_vector), 1);
1016
1017                 state_fio->Fread(fm7_mainmem_null, sizeof(fm7_mainmem_null), 1);
1018 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
1019                 state_fio->Fread(fm7_bootram, sizeof(fm7_bootram), 1);
1020 #endif
1021 #if !defined(_FM77AV_VARIANTS)
1022                 int addr;
1023                 for(addr = 0; addr < 4; addr++) state_fio->Fread(fm7_bootroms[addr], sizeof(0x200), 1);
1024 #endif
1025 #ifdef _FM77AV_VARIANTS
1026                 dictrom_connected = state_fio->FgetBool();
1027                 use_page2_extram = state_fio->FgetBool();
1028
1029                 diag_load_initrom = state_fio->FgetBool();
1030                 diag_load_dictrom = state_fio->FgetBool();
1031                 diag_load_learndata = state_fio->FgetBool();
1032                 state_fio->Fread(fm7_mainmem_initrom, sizeof(fm7_mainmem_initrom), 1);
1033                 state_fio->Fread(fm7_mainmem_mmrbank_0, sizeof(fm7_mainmem_mmrbank_0), 1);
1034                 state_fio->Fread(fm7_mainmem_mmrbank_2, sizeof(fm7_mainmem_mmrbank_2), 1);
1035
1036 # if defined(CAPABLE_DICTROM)
1037                 diag_load_extrarom = state_fio->FgetBool();
1038                 state_fio->Fread(fm7_mainmem_extrarom, sizeof(fm7_mainmem_extrarom), 1);
1039                 state_fio->Fread(fm7_mainmem_dictrom, sizeof(fm7_mainmem_dictrom), 1);
1040                 state_fio->Fread(fm7_mainmem_learndata, sizeof(fm7_mainmem_learndata), 1);
1041 # endif
1042 #endif
1043
1044 #ifdef HAS_MMR
1045                 extram_connected = state_fio->FgetBool();
1046 # if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20) || defined(_FM77_VARIANTS)
1047                 int pages;
1048                 extram_pages = state_fio->FgetInt32_BE();
1049                 pages = extram_pages;
1050 #  if defined(_FM77_VARIANTS)
1051                 if(pages > 3) pages = 3;
1052 #  else
1053                 if(pages > 12) pages = 12;
1054 #  endif
1055                 if(pages > 0) state_fio->Fread(fm7_mainmem_extram, pages * 0x10000, 1);
1056 #  if defined(_FM77_VARIANTS)
1057                 state_fio->Fread(fm77_shadowram, sizeof(fm77_shadowram), 1);
1058 #  endif
1059 # endif
1060 #endif
1061                 if(version == 1) return true;
1062         }
1063         if(version >= 2) { // V2;
1064                 is_basicrom = state_fio->FgetBool();
1065                 clockmode = state_fio->FgetBool();
1066                 basicrom_fd0f = state_fio->FgetBool();
1067                 bootmode = state_fio->FgetUint32_BE();
1068 #if defined(_FM77AV_VARIANTS)
1069                 extcard_bank = state_fio->FgetUint32_BE();
1070                 extrom_bank = state_fio->FgetUint32_BE();
1071                 initiator_enabled = state_fio->FgetBool();
1072 #endif
1073 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
1074                 boot_ram_write = state_fio->FgetBool();
1075 #endif
1076 #if defined(HAS_MMR)
1077                 window_enabled = state_fio->FgetBool();
1078                 mmr_enabled = state_fio->FgetBool();
1079                 mmr_fast = state_fio->FgetBool();
1080                 window_offset = state_fio->FgetUint16_BE();
1081                 mmr_segment = state_fio->FgetUint8();
1082                 state_fio->Fread(mmr_map_data, sizeof(mmr_map_data), 1);
1083 #endif
1084         }
1085         return true;
1086 }