2 * Main memory without MMR for FM-7 [FM7_MAINMEM]
8 #ifndef _FM7_MAINMEM_H_
9 #define _FM7_MAINMEM_H_
11 #include "fm7_common.h"
13 #include "../device.h"
14 #include "../mc6809.h"
16 # if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
17 #define ADDRESS_SPACE 0x100000
18 #elif defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
19 #define ADDRESS_SPACE 0x40000
21 #define ADDRESS_SPACE 0x10000
34 class FM7_MAINMEM : public DEVICE
39 uint8_t (FM7_MAINMEM::*read_func)(uint32_t, bool);
41 void (FM7_MAINMEM::*write_func)(uint32_t, uint32_t, bool);
44 data_func_table_t data_table[ADDRESS_SPACE / 0x80];
46 # if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
47 data_func_table_t mmr_update_table_ext[(0x80 * 0x1000) / 0x80];
48 uint32_t mmr_baseaddr_table_ext[(0x80 * 0x1000) / 0x80];
50 data_func_table_t mmr_update_table_nor[(0x80 * 0x1000) / 0x80];
51 uint32_t mmr_bank_table[(0x80 * 0x1000) / 0x80];
52 uint32_t mmr_baseaddr_table_nor[(0x80 * 0x1000) / 0x80];
68 uint16_t window_offset;
70 uint8_t mmr_map_data[0x80];
76 #ifdef _FM77AV_VARIANTS
77 uint32_t extcard_bank;
79 bool initiator_enabled;
81 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
85 uint8_t fm7_mainmem_omote[0x8000];
86 uint8_t fm7_mainmem_ura[0x7c00];
87 uint8_t fm7_mainmem_basicrom[0x7c00];
88 uint8_t fm7_mainmem_bioswork[0x80];
90 uint8_t *fm7_bootroms[8];
92 uint8_t fm7_mainmem_bootrom_vector[0x1e]; // Without
93 uint8_t fm7_mainmem_reset_vector[2]; // Without
94 uint8_t fm7_mainmem_null[1];
95 #if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
96 uint8_t fm7_bootram[0x200]; // $00000-$0ffff
99 bool diag_load_sm11_14;
100 bool diag_load_sm11_15;
101 # elif defined(_FM77_VARIANTS)
102 bool diag_load_wb11_12;
103 # elif defined(_FM7) || defined(_FMNEW7)
104 bool diag_load_tl11_11;
105 bool diag_load_tl11_12;
108 bool extram_connected;
110 # if defined(_FM77AV_VARIANTS)
111 bool diag_load_initrom;
112 bool diag_load_dictrom;
113 bool diag_load_learndata;
114 bool dictrom_connected;
115 bool dictrom_enabled;
116 bool dictram_enabled;
118 bool use_page2_extram;
119 uint8_t fm7_mainmem_initrom[0x2000]; // $00000-$0ffff
120 uint8_t fm77av_hidden_bootmmr[0x200];
121 uint8_t fm7_mainmem_mmrbank_0[0x10000]; // $00000-$0ffff
122 uint8_t fm7_mainmem_mmrbank_2[0x10000]; // $20000-$2ffff
123 # if defined(CAPABLE_DICTROM)
124 uint8_t fm7_mainmem_dictrom[0x40000]; // $00000-$3ffff, banked
125 uint8_t fm7_mainmem_learndata[0x2000];
127 # if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
128 bool diag_load_extrarom;
129 uint8_t fm7_mainmem_extrarom[0x10000]; // $20000-$2bfff, banked
131 uint32_t extram_size;
132 uint8_t *fm7_mainmem_extram; // $40000- : MAX 768KB ($c0000)
135 # if defined(_FM77_VARIANTS)
137 uint32_t extram_size;
138 uint8_t *fm7_mainmem_extram; // $00000-$2ffff
139 uint8_t fm77_shadowram[0x200];
142 #if defined(CAPABLE_DICTROM)
143 FM7::KANJIROM *kanjiclass1;
144 //KANJIROM *kanjiclass2;
147 FM7::FM7_MAINIO *mainio;
148 FM7::DISPLAY *display;
150 bool diag_load_basicrom;
151 bool diag_load_bootrom_bas;
152 bool diag_load_bootrom_dos;
153 bool diag_load_bootrom_mmr;
154 bool diag_load_bootrom_bubble;
155 bool diag_load_bootrom_bubble_128k;
156 bool diag_load_bootrom_sfd8;
157 bool diag_load_bootrom_2hd;
159 uint32_t mem_waitfactor;
160 uint32_t mem_waitcount;
162 int check_extrom(uint32_t raddr, uint32_t *realaddr);
164 int window_convert(uint32_t addr, uint32_t *realaddr);
165 uint32_t read_bios(const _TCHAR *name, uint8_t *ptr, uint32_t size);
166 uint32_t write_bios(const _TCHAR *name, uint8_t *ptr, uint32_t size);
167 void setclock(int mode);
169 uint8_t read_shared_ram(uint32_t realaddr, bool dmamode);
170 void write_shared_ram(uint32_t realaddr, uint32_t data, bool dmamode);
171 uint8_t read_direct_access(uint32_t realaddr, bool dmamode);
172 void write_direct_access(uint32_t realaddr, uint32_t data, bool dmamode);
173 uint8_t read_kanjirom_level1(uint32_t realaddr, bool dmamode);
174 uint8_t read_kanji_dummyaddr(uint32_t realaddr, bool dmamode);
175 uint8_t read_ura_basicrom(uint32_t addr, bool dmamode);
176 void write_ura_basicrom(uint32_t addr, uint32_t data, bool dmamode);
177 uint8_t read_mmio(uint32_t addr, bool dmamode);
178 void write_mmio(uint32_t addr, uint32_t data, bool dmamode);
179 uint8_t read_bootrom(uint32_t addr, bool dmamode);
180 void write_bootrom(uint32_t addr, uint32_t data, bool dmamode);
181 uint8_t read_page2(uint32_t addr, bool dmamode);
182 void write_page2(uint32_t addr, uint32_t data, bool dmamode);
183 int check_page2(uint32_t addr, uint32_t *realaddr, bool write_state, bool dmamode);
185 void init_data_table(void);
186 uint8_t read_data(uint32_t addr, bool dmamode);
187 void write_data(uint32_t addr, uint32_t data, bool dmamode);
188 uint8_t read_data_tbl(uint32_t addr, bool dmamode);
189 void write_data_tbl(uint32_t addr, uint32_t data, bool dmamode);
191 void update_mmr_jumptable(uint32_t pos);
192 void update_all_mmr_jumptable(void);
193 uint8_t read_segment_3f(uint32_t addr, bool dmamode);
194 void write_segment_3f(uint32_t addr, uint32_t data, bool dmamode);
195 uint8_t read_with_mmr(uint32_t addr, uint32_t segment, uint32_t dmamode);
196 void write_with_mmr(uint32_t addr, uint32_t segment, uint32_t data, uint32_t dmamode);
199 void call_write_signal(T *np, int id, uint32_t data, uint32_t mask)
201 //T *nnp = static_cast<T *>(np);
202 static_cast<T *>(np)->write_signal(id, data, mask);
205 void call_write_data8(T *np, uint32_t addr, uint32_t data)
207 //T *nnp = static_cast<T *>(np);
208 static_cast<T *>(np)->write_data8(addr, data);
211 uint32_t call_read_data8(T *np, uint32_t addr)
213 //T *nnp = static_cast<T *>(np);
214 return static_cast<T *>(np)->read_data8(addr);
217 void call_write_dma_data8(T *np, uint32_t addr, uint32_t data)
219 //T *nnp = static_cast<T *>(np);
220 static_cast<T *>(np)->write_dma_data8(addr, data);
223 uint32_t call_read_dma_data8(T *np, uint32_t addr)
225 //T *nnp = static_cast<T *>(np);
226 return static_cast<T *>(np)->read_dma_data8(addr);
229 FM7_MAINMEM(VM_TEMPLATE* parent_vm, EMU* parent_emu);
231 uint32_t read_data8(uint32_t addr);
232 uint32_t read_dma_data8(uint32_t addr);
233 uint32_t read_dma_io8(uint32_t addr);
234 uint32_t read_data8_main(uint32_t addr, bool dmamode);
236 void write_data8(uint32_t addr, uint32_t data);
237 void write_dma_data8(uint32_t addr, uint32_t data);
238 void write_dma_io8(uint32_t addr, uint32_t data);
239 void write_data8_main(uint32_t addr, uint32_t data, bool dmamode);
241 virtual uint32_t read_data16(uint32_t addr);
242 virtual void write_data16(uint32_t addr, uint32_t data);
244 virtual uint32_t read_data32(uint32_t addr);
245 virtual void write_data32(uint32_t addr, uint32_t data);
247 void initialize(void);
249 void dram_refresh(void);
253 bool get_loadstat_basicrom(void);
254 bool get_loadstat_bootrom_bas(void);
255 bool get_loadstat_bootrom_dos(void);
256 void update_config();
258 void save_state(FILEIO *state_fio);
259 bool load_state(FILEIO *state_fio);
260 bool decl_state(FILEIO *state_fio, bool loading);
262 void set_context_display(DEVICE *p){
263 display = (FM7::DISPLAY *)p;
265 void set_context_maincpu(MC6809 *p){
266 maincpu = (MC6809 *)p;
268 void set_context_mainio(DEVICE *p){
269 mainio = (FM7::FM7_MAINIO *)p;
271 #if defined(CAPABLE_DICTROM)
272 void set_context_kanjirom_class1(DEVICE *p){
273 kanjiclass1 = (FM7::KANJIROM *)p;
276 void write_signal(int sigid, uint32_t data, uint32_t mask);
277 uint32_t read_signal(int sigid);
278 uint32_t read_io8(uint32_t addr);
279 void write_io8(uint32_t addr, uint32_t data);