source/src/vm/fmtowns/towns_memory.h

   1 /*
   2         FUJITSU FM Towns Emulator 'eFMTowns'
   3
   4         Author : Kyuma.Ohta <whatisthis.sowhat _at_ gmail.com>
   5         Date   : 2017.01.07 -
   6
   7         [ memory ]
   8 */
   9
  10 #ifndef _TOWNS_MEMORY_H_
  11 #define _TOWNS_MEMORY_H_
  12
  13 #include "../vm.h"
  14 #include "../../emu.h"
  15 #include "../device.h"
  16
  17 //#define SIG_MEMORY_DISP               0
  18 //#define SIG_MEMORY_VSYNC      1
  19
  20 class I386;
  21 // Bank size = 1GB / 1MB.
  22 // Page 0 (0000:00000 - 0000:fffff) is another routine.
  23 #define TOWNS_BANK_SIZE 1024
  24 // Page0 size is 1MB / 2KB.
  25 #define TOWNS_BANK000_BANK_SIZE 512
  26
  27 // C000:00000 - C1f0:fffff is 32MB / 32KB
  28 #define TOWNS_BANKC0x_BANK_SIZE 1024
  29 // C200:00000 - C230:fffff is 4MB / 2KB
  30 #define TOWNS_BANKC2x_BANK_SIZE 2048
  31
  32 // MAP:
  33 // 00000000 - 000fffff : SYSTEM RAM PAGE 0 (Similar to FMR-50).
  34 // 00100000 - 3fffffff : EXTRA RAM (for i386 native mode.Page size is 1MB.)
  35 // 40000000 - 7fffffff : External I/O BOX.Not accessible.
  36 // 80000000 - bfffffff : VRAM (Reserved 01020000H bytes with earlier Towns.)
  37 // c0000000 - c21fffff : ROM card and dictionaly/font/DOS ROMs.
  38 // c2200000 - c2200fff : PCM RAM (Banked).
  39 // c2201000 - fffbffff : Reserved.
  40 // FFFC0000 - FFFFFFFF : Towns System ROM.
  41
  42 namespace FMTOWNS {
  43 enum {
  44         TOWNS_MEMORY_NORMAL = 0,
  45         TOWNS_MEMORY_FMR_VRAM,
  46         TOWNS_MEMORY_FMR_TEXT,
  47         TOWNS_MEMORY_FMR_VRAM_RESERVE,
  48         TOWNS_MEMORY_SPRITE_ANKCG1,
  49         TOWNS_MEMORY_ANKCG2,
  50
  51         TOWNS_MEMORY_MMIO_0CC,
  52         TOWNS_MEMORY_DICT_0D0,
  53         TOWNS_MEMORY_CMOS_0D8,
  54         TOWNS_MEMORY_PAGE0F8,
  55
  56         TOWNS_MEMORY_TYPE_EXT_MMIO,
  57         TOWNS_MEMORY_TYPE_LEARN_RAM,
  58         TOWNS_MEMORY_TYPE_WAVERAM,
  59         TOWNS_MEMORY_TYPE_SYSTEM_ROM,
  60 };
  61 }
  62 // Please set from config
  63 #define TOWNS_EXTRAM_PAGES 6
  64
  65 class I386;
  66 class BEEP;
  67
  68 namespace FMTOWNS {
  69         class TOWNS_VRAM;
  70         class TOWNS_SPRITE;
  71         class TOWNS_ROM_CARD;
  72         class TOWNS_CMOS;
  73         class TOWNS_PCM;
  74 }
  75
  76 namespace FMTOWNS {
  77 class TOWNS_MEMORY : public DEVICE
  78 {
  79 protected:
  80         I386 *d_cpu;
  81
  82         TOWNS_VRAM* d_vram;
  83         TOWNS_SPRITE* d_sprite;       // 0x81000000 - 0x8101ffff ?
  84         TOWNS_ROM_CARD* d_romcard[2]; // 0xc0000000 - 0xc0ffffff / 0xc1000000 - 0xc1ffffff
  85         TOWNS_CMOS* d_cmos;             // 0xc2140000 - 0xc2141fff
  86         TOWNS_PCM* d_pcm;             // 0xc2200000 - 0xc2200fff
  87         BEEP* d_beep;
  88
  89         bool bankc0_vram;
  90         bool bankf8_ram;
  91         bool bankd0_dict;
  92         bool ankcg_enabled;
  93         uint8_t dict_bank;
  94
  95         uint16_t machine_id;
  96         uint8_t cpu_id;
  97
  98         // ToDo: around DMA
  99         uint32_t dma_addr_mask;
 100         //uint8_t dma_addr_reg;
 101         //uint8_t dma_wrap_reg;
 102
 103         // RAM
 104         uint8_t ram_page0[0xc0000];       // 0x00000000 - 0x000bffff : RAM
 105         //uint8_t vram_plane[0x8000 * 8]; // 0x000c0000 - 0x000c7fff : Plane Accessed VRAM
 106         //uint8_t text_ram[0x1000];       // 0x000c8000 - 0x000c8fff : Character VRAM
 107         //uint8_t vram_reserved[0x1000];    // 0x000c9000 - 0x000c9fff : Resetved
 108         uint8_t ram_0c0[0x8000];          // 0x000ca000 - 0x000cafff : ANKCG1 / IO / RAM
 109         uint8_t ram_0c8[0x2000];          // 0x000ca000 - 0x000cafff : ANKCG1 / IO / RAM
 110
 111         //uint8_t sprite_ram[0x1000];     // 0x000ca000 - 0x000cafff : Sprite RAM
 112         //uint8_t ank_cg1[0x800];         // 0x000ca000 - 0x000ca7ff : ANK CG ROM (FONTROM[0x3d000 - 0x3d7ff])
 113         //uint8_t ank_cg2[0x1000];        // 0x000cb000 - 0x000cbfff : ANK CG ROM (FONTROM[0x3d800 - 0x3e7ff])
 114         uint8_t ram_0ca[0x1000];          // 0x000ca000 - 0x000cafff : ANKCG1 / IO / RAM
 115         uint8_t ram_0cb[0x1000];          // 0x000cb000 - 0x000cbfff : ANKCG2 / RAM
 116         uint8_t ram_0cc[0x4000];          // 0x000cc000 - 0x000cffff : MMIO / RAM
 117         uint8_t ram_0d0[0x8000];          // 0x000d0000 - 0x000d7fff : RAM / BANKED DICTIONARY
 118         uint8_t ram_0d8[0x2000];          // 0x000d8000 - 0x000d9fff : RAM / CMOS
 119         uint8_t ram_0da[0x16000];         // 0x000da000 - 0x000effff : RAM
 120         uint8_t ram_0f0[0x8000];          // 0x000f0000 - 0x000f7fff
 121         uint8_t ram_0f8[0x8000];          // 0x000f8000 - 0x000fffff : RAM/ROM
 122
 123         uint8_t *extram;                  // 0x00100000 - (0x3fffffff) : Size is defined by extram_size;
 124         uint32_t extram_size;
 125
 126         uint32_t vram_wait_val;
 127         uint32_t mem_wait_val;
 128
 129         // ROM
 130         uint8_t rom_msdos[0x80000];   // 0xc2000000 - 0xc207ffff
 131         uint8_t rom_dict[0x80000];    // 0xc2080000 - 0xc20fffff
 132         uint8_t rom_font1[0x40000];   // 0xc2100000 - 0xc23f0000
 133         uint8_t rom_system[0x40000];  // 0xfffc0000 - 0xffffffff
 134 #if 0
 135         uint8_t rom_font20[0x80000];
 136 #endif
 137         // misc
 138         uint32_t vram_size; // Normally 512KB.
 139
 140         uint8_t* read_bank_adrs_cx[0x100000]; // Per 4KB.
 141         uint8_t* write_bank_adrs_cx[0x100000]; // Per 4KB.
 142         DEVICE*   device_bank_adrs_cx[0x100000]; // Per 4KB.
 143         uint32_t type_bank_adrs_cx[0x100000]; // Per 4KB.
 144
 145         void     write_data_base(uint32_t addr, uint32_t data, int* wait, int wordsize);
 146         uint32_t read_data_base(uint32_t addr, int* wait, int wordsize);
 147         bool     check_bank(uint32_t addr, uint32_t *mask, uint32_t *offset, void** readfn, void** writefn, void** readp, void** writep);
 148         virtual void initialize_tables(void);
 149
 150         virtual uint32_t read_mmio(uint32_t addr, int *wait, bool *hit);
 151         virtual void     write_mmio(uint32_t addr, uint32_t data, int *wait, bool *hit);
 152
 153 public:
 154         TOWNS_MEMORY(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu) {
 155                 set_device_name(_T("FMTOWNS_MEMORY"));
 156                 d_cpu = NULL;
 157                 d_vram = NULL;
 158                 d_pcm = NULL;
 159                 d_sprite = NULL;
 160                 d_romcard[0] = d_romcard[1] = NULL;
 161                 d_beep = NULL;
 162                 machine_id = 0;
 163         }
 164         ~TOWNS_MEMORY() {}
 165
 166         // common functions
 167         void initialize();
 168         void reset();
 169
 170         void write_data8(uint32_t addr, uint32_t data);
 171         uint32_t read_data8(uint32_t addr);
 172         // Using [read|write]_data[16|32] to be faster memory access.
 173         void write_data16(uint32_t addr, uint32_t data);
 174         uint32_t read_data16(uint32_t addr);
 175         void write_data32(uint32_t addr, uint32_t data);
 176         uint32_t read_data32(uint32_t addr);
 177         // With Wait
 178         void write_data8w(uint32_t addr, uint32_t data, int* wait);
 179         uint32_t write_data8w(uint32_t addr, int* wait);
 180         void write_data16w(uint32_t addr, uint32_t data, int* wait);
 181         uint32_t write_data16w(uint32_t addr, int* wait);
 182         void write_data32w(uint32_t addr, uint32_t data, int* wait);
 183         uint32_t write_data32w(uint32_t addr, int* wait);
 184
 185         void write_dma_data8(uint32_t addr, uint32_t data);
 186         uint32_t read_dma_data8(uint32_t addr);
 187         // Using [read|write]_dma_data16 for DMAC 16bit mode (SCSI/CDROM?).
 188         void write_dma_data16(uint32_t addr, uint32_t data);
 189         uint32_t read_dma_data16(uint32_t addr);
 190
 191         virtual void     write_io8(uint32_t addr, uint32_t data);
 192         virtual uint32_t read_io8(uint32_t addr);
 193         void write_signal(int id, uint32_t data, uint32_t mask);
 194         void event_frame();
 195         bool process_state(FILEIO* state_fio, bool loading);
 196
 197         // unique functions
 198         void set_context_cpu(I386* device)
 199         {
 200                 d_cpu = device;
 201         }
 202         void set_machine_id(uint8_t id)
 203         {
 204                 machine_id = id;
 205         }
 206         void set_context_vram(TOWNS_VRAM* device)
 207         {
 208                 d_vram = device;
 209         }
 210         void set_context_beep(DEVICE* device)
 211         {
 212                 d_beep = device;
 213         }
 214         void set_context_sprite(DEVICE* device)
 215         {
 216                 d_sprite = device;
 217         }
 218         void set_context_romcard(DEVICE* device, int num)
 219         {
 220                 d_romcard[num & 1] = device;
 221         }
 222         void set_context_pcm(DEVICE* device)
 223         {
 224                 d_pcm = device;
 225         }
 226
 227 };
 228
 229 }
 230 #endif
 231