source/src/vm/j3100/dmareg.cpp

   1 /*
   2         TOSHIBA J-3100GT Emulator 'eJ-3100GT'
   3         TOSHIBA J-3100SL Emulator 'eJ-3100SL'
   4
   5         Author : Takeda.Toshiya
   6         Date   : 2011.08.28-
   7
   8         [ dma bank register ]
   9 */
  10
  11 #include "../vm.h"
  12 #include "../../emu.h"
  13 #include "dmareg.h"
  14 #include "../i8237.h"
  15
  16 namespace J3100 {
  17
  18 void DMAREG::write_io8(uint32_t addr, uint32_t data)
  19 {
  20         switch(addr & 0xffff) {
  21 #ifdef TYPE_SL
  22         case 0x81:
  23                 d_dma->write_signal(SIG_I8237_BANK2, data, 0x0f);
  24                 break;
  25         case 0x82:
  26                 d_dma->write_signal(SIG_I8237_BANK3, data, 0x0f);
  27                 break;
  28         case 0x83:
  29                 d_dma->write_signal(SIG_I8237_BANK1, data, 0x0f);
  30                 break;
  31 #else
  32         case 0x81:
  33                 d_dma->write_signal(SIG_I8237_BANK2, data, 0xff);
  34                 break;
  35         case 0x82:
  36                 d_dma->write_signal(SIG_I8237_BANK3, data, 0xff);
  37                 break;
  38         case 0x83:
  39                 d_dma->write_signal(SIG_I8237_BANK1, data, 0xff);
  40                 break;
  41         case 0x87:
  42                 d_dma->write_signal(SIG_I8237_BANK0, data, 0xff);
  43                 break;
  44         case 0x89:
  45                 d_dma2->write_signal(SIG_I8237_BANK2, data >> 1, 0x7f);
  46                 break;
  47         case 0x8a:
  48                 d_dma2->write_signal(SIG_I8237_BANK3, data >> 1, 0x7f);
  49                 break;
  50         case 0x8b:
  51                 d_dma2->write_signal(SIG_I8237_BANK1, data >> 1, 0x7f);
  52                 break;
  53         case 0x8f:
  54                 d_dma2->write_signal(SIG_I8237_BANK0, data >> 1, 0x7f);
  55                 break;
  56 #endif
  57         }
  58 }
  59
  60 }