2 Skelton for retropc emulator
5 Author : Takeda.Toshiya
19 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
20 #define SIG_MC6801_PORT_1 0
21 #define SIG_MC6801_PORT_2 1
22 #define SIG_MC6801_PORT_3 2
23 #define SIG_MC6801_PORT_4 3
24 #define SIG_MC6801_PORT_3_SC1 4
25 #define SIG_MC6801_PORT_3_SC2 5
26 #define SIG_MC6801_SIO_RECV 6
31 class MC6801 : public MC6800
35 const int RMCR_SS[4] = { 16, 128, 1024, 4096 };
36 #define XX 5 // invalid opcode unknown cc
37 const uint8_t cycles[256] = {
38 //#elif defined(HAS_MC6801)
39 XX, 2,XX,XX, 3, 3, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2,
40 2, 2,XX,XX,XX,XX, 2, 2,XX, 2,XX, 2,XX,XX,XX,XX,
41 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
42 3, 3, 4, 4, 3, 3, 3, 3, 5, 5, 3,10, 4,10, 9,12,
43 2,XX,XX, 2, 2,XX, 2, 2, 2, 2, 2,XX, 2, 2,XX, 2,
44 2,XX,XX, 2, 2,XX, 2, 2, 2, 2, 2,XX, 2, 2,XX, 2,
45 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 6, 3, 6,
46 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 6, 3, 6,
47 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 4, 6, 3, 3,
48 3, 3, 3, 5, 3, 3, 3, 3, 3, 3, 3, 3, 5, 5, 4, 4,
49 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 6, 5, 5,
50 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 6, 5, 5,
51 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 3,XX, 3, 3,
52 3, 3, 3, 5, 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4,
53 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
54 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5
57 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
71 bool p3csr_is3_flag_read;
77 pair_t output_compare;
81 uint16_t input_capture;
88 outputs_t outputs_sio;
90 uint8_t trcsr, rdr, tdr;
91 bool trcsr_read_tdre, trcsr_read_orfe, trcsr_read_rdrf;
100 uint32_t mc6801_io_r(uint32_t offset);
101 virtual void mc6801_io_w(uint32_t offset, uint32_t data);
102 void increment_counter(int amount);
104 uint32_t RM(uint32_t Addr) override;
105 void WM(uint32_t Addr, uint32_t Value) override;
107 void run_one_opecode() override;
109 void insn(uint8_t code) override;
139 MC6801(VM_TEMPLATE* parent_vm, EMU* parent_emu) : MC6800(parent_vm, parent_emu)
141 for(int i = 0; i < 4; i++) {
142 initialize_output_signals(&port[i].outputs);
143 port[i].wreg = port[i].rreg = 0;//0xff;
145 initialize_output_signals(&outputs_sio);
146 set_device_name(_T("MC6801 MPU"));
149 void initialize() override;
151 void reset() override;
152 int run(int clock) override;
153 void write_signal(int id, uint32_t data, uint32_t mask) override;
154 bool process_state(FILEIO* state_fio, bool loading);
157 int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len) override;
158 //#if defined(HAS_MC6801) || defined(HAS_HD6301)
159 void set_context_port1(DEVICE* device, int id, uint32_t mask, int shift)
161 register_output_signal(&port[0].outputs, device, id, mask, shift);
163 void set_context_port2(DEVICE* device, int id, uint32_t mask, int shift)
165 register_output_signal(&port[1].outputs, device, id, mask, shift);
167 void set_context_port3(DEVICE* device, int id, uint32_t mask, int shift)
169 register_output_signal(&port[2].outputs, device, id, mask, shift);
171 void set_context_port4(DEVICE* device, int id, uint32_t mask, int shift)
173 register_output_signal(&port[2].outputs, device, id, mask, shift);
175 void set_context_sio(DEVICE* device, int id)
177 register_output_signal(&outputs_sio, device, id, 0xff);