source/src/vm/multi8/memory.cpp

   1 /*
   2         MITSUBISHI Electric MULTI8 Emulator 'EmuLTI8'
   3
   4         Author : Takeda.Toshiya
   5         Date   : 2006.09.15 -
   6
   7         [ memory ]
   8 */
   9
  10 #include "memory.h"
  11 #include "../i8255.h"
  12
  13 namespace MULTI8 {
  14
  15 #define SET_BANK(s, e, w, r) { \
  16         int sb = (s) >> 12, eb = (e) >> 12; \
  17         for(int i = sb; i <= eb; i++) { \
  18                 if((w) == wdmy) { \
  19                         wbank[i] = wdmy; \
  20                 } else { \
  21                         wbank[i] = (w) + 0x1000 * (i - sb); \
  22                 } \
  23                 if((r) == rdmy) { \
  24                         rbank[i] = rdmy; \
  25                 } else { \
  26                         rbank[i] = (r) + 0x1000 * (i - sb); \
  27                 } \
  28         } \
  29 }
  30
  31 void MEMORY::initialize()
  32 {
  33         // init memory
  34         memset(rom, 0xff, sizeof(rom));
  35         memset(fdc, 0xff, sizeof(fdc));
  36         memset(ram0, 0, sizeof(ram0));
  37         memset(ram1, 0, sizeof(ram1));
  38         memset(vram, 0, sizeof(vram));
  39         memset(rdmy, 0xff, sizeof(rdmy));
  40
  41         // load ipl
  42         FILEIO* fio = new FILEIO();
  43         if(fio->Fopen(create_local_path(_T("BASIC.ROM")), FILEIO_READ_BINARY)) {
  44                 fio->Fread(rom, sizeof(rom), 1);
  45                 fio->Fclose();
  46         }
  47         if(fio->Fopen(create_local_path(_T("FDC.ROM")), FILEIO_READ_BINARY)) {
  48                 fio->Fread(fdc, sizeof(fdc), 1);
  49                 fio->Fclose();
  50
  51                 // 8255 Port A, bit1 = 0 (fdc rom exists)
  52                 d_pio->write_signal(SIG_I8255_PORT_A, 0, 2);
  53         } else {
  54                 // 8255 Port A, bit1 = 1 (fdc rom does not exist)
  55                 d_pio->write_signal(SIG_I8255_PORT_A, 2, 2);
  56         }
  57         delete fio;
  58 }
  59
  60 void MEMORY::reset()
  61 {
  62         map1 = 0xf;
  63         map2 = 0;
  64         update_map();
  65 }
  66
  67 void MEMORY::write_data8(uint32_t addr, uint32_t data)
  68 {
  69         addr &= 0xffff;
  70         if((addr & 0xc000) == 0x8000 && (map1 & 0x10)) {
  71                 uint32_t ptr = addr & 0x3fff;
  72                 // select vram
  73                 if(!(map1 & 1)) {
  74                         vram[0x0000 | ptr] = data;
  75                 }
  76                 if(!(map1 & 2)) {
  77                         vram[0x4000 | ptr] = data;
  78                 }
  79                 if(!(map1 & 4)) {
  80                         vram[0x8000 | ptr] = data;
  81                 }
  82                 if(!(map1 & 8)) {
  83                         vram[0xc000 | ptr] = data;
  84                 }
  85                 return;
  86         }
  87         wbank[addr >> 12][addr & 0xfff] = data;
  88 }
  89
  90 uint32_t MEMORY::read_data8(uint32_t addr)
  91 {
  92         addr &= 0xffff;
  93         if((addr & 0xc000) == 0x8000 && (map1 & 0x10)) {
  94                 uint32_t ptr = addr & 0x3fff;
  95                 // select vram
  96                 uint32_t val = 0xff;
  97                 if(!(map1 & 1)) {
  98                         val &= vram[0x0000 | ptr];
  99                 }
 100                 if(!(map1 & 2)) {
 101                         val &= vram[0x4000 | ptr];
 102                 }
 103                 if(!(map1 & 4)) {
 104                         val &= vram[0x8000 | ptr];
 105                 }
 106                 if(!(map1 & 8)) {
 107                         val &= vram[0xc000 | ptr];
 108                 }
 109                 return val;
 110         }
 111         return rbank[addr >> 12][addr & 0xfff];
 112 }
 113
 114 void MEMORY::write_io8(uint32_t addr, uint32_t data)
 115 {
 116         map2 = data;
 117         update_map();
 118 }
 119
 120 void MEMORY::write_signal(int id, uint32_t data, uint32_t mask)
 121 {
 122         if(id == SIG_MEMORY_I8255_C) {
 123                 map1 = data & mask;
 124                 update_map();
 125         }
 126 }
 127
 128 void MEMORY::update_map()
 129 {
 130         if(map1 & 0x20) {
 131                 SET_BANK(0x0000, 0x7fff, ram0, ram0);
 132                 SET_BANK(0x8000, 0xffff, ram1, ram1);
 133         } else {
 134                 SET_BANK(0x0000, 0x7fff, wdmy, rom);
 135                 if(map2 & 1) {
 136                         SET_BANK(0x6000, 0x6fff, wdmy, fdc);
 137                 }
 138                 SET_BANK(0x8000, 0xffff, ram1, ram1);
 139         }
 140 }
 141
 142 #define STATE_VERSION   1
 143
 144 bool MEMORY::process_state(FILEIO* state_fio, bool loading)
 145 {
 146         if(!state_fio->StateCheckUint32(STATE_VERSION)) {
 147                 return false;
 148         }
 149         if(!state_fio->StateCheckInt32(this_device_id)) {
 150                 return false;
 151         }
 152         state_fio->StateBuffer(ram0, sizeof(ram0), 1);
 153         state_fio->StateBuffer(ram1, sizeof(ram1), 1);
 154         state_fio->StateBuffer(vram, sizeof(vram), 1);
 155         state_fio->StateUint8(map1);
 156         state_fio->StateUint8(map2);
 157
 158         // post process
 159         if(loading) {
 160                 update_map();
 161         }
 162         return true;
 163 }
 164
 165 }