source/src/vm/mz5500/memory.cpp

   1 /*
   2         SHARP MZ-5500 Emulator 'EmuZ-5500'
   3
   4         Author : Takeda.Toshiya
   5         Date   : 2008.04.10 -
   6
   7         [ memory ]
   8 */
   9
  10 #include "memory.h"
  11
  12 #define SET_BANK(s, e, w, r) { \
  13         int sb = (s) >> 14, eb = (e) >> 14; \
  14         for(int i = sb; i <= eb; i++) { \
  15                 if((w) == wdmy) { \
  16                         wbank[i] = wdmy; \
  17                 } else { \
  18                         wbank[i] = (w) + 0x4000 * (i - sb); \
  19                 } \
  20                 if((r) == rdmy) { \
  21                         rbank[i] = rdmy; \
  22                 } else { \
  23                         rbank[i] = (r) + 0x4000 * (i - sb); \
  24                 } \
  25         } \
  26 }
  27
  28 void MEMORY::initialize()
  29 {
  30         // init memory
  31         memset(ram, 0, sizeof(ram));
  32         memset(vram, 0, sizeof(vram));
  33         memset(ipl, 0xff, sizeof(ipl));
  34         memset(kanji, 0xff, sizeof(kanji));
  35         memset(dic, 0xff, sizeof(dic));
  36 #ifdef _MZ6550
  37         memset(dic2, 0xff, sizeof(dic2));
  38 #endif
  39 #if defined(_MZ6500) || defined(_MZ6550)
  40         memset(mz1r32, 0, sizeof(mz1r32));
  41 #endif
  42         memset(rdmy, 0xff, sizeof(rdmy));
  43
  44         // load rom images
  45         FILEIO* fio = new FILEIO();
  46         if(fio->Fopen(create_local_path(_T("IPL.ROM")), FILEIO_READ_BINARY)) {
  47                 fio->Fread(ipl, sizeof(ipl), 1);
  48                 fio->Fclose();
  49         }
  50         if(fio->Fopen(create_local_path(_T("KANJI.ROM")), FILEIO_READ_BINARY)) {
  51                 fio->Fread(kanji, sizeof(kanji), 1);
  52                 fio->Fclose();
  53         }
  54         if(fio->Fopen(create_local_path(_T("DICT.ROM")), FILEIO_READ_BINARY)) {
  55                 fio->Fread(dic, sizeof(dic), 1);
  56                 fio->Fclose();
  57         }
  58 #ifdef _MZ6550
  59         if(fio->Fopen(create_local_path(_T("DICT2.ROM")), FILEIO_READ_BINARY)) {
  60                 fio->Fread(dic2, sizeof(dic2), 1);
  61                 fio->Fclose();
  62         }
  63 #endif
  64         delete fio;
  65
  66         // set memory bank
  67 #if defined(_MZ6500) || defined(_MZ6550)
  68         SET_BANK(0x00000, 0x9ffff, ram, ram);
  69 #else
  70         SET_BANK(0x00000, 0x7ffff, ram, ram);
  71         SET_BANK(0x80000, 0x9ffff, wdmy, rdmy); // aux
  72 #endif
  73         SET_BANK(0xa0000, 0xbffff, wdmy, kanji);
  74         SET_BANK(0xc0000, 0xeffff, vram, vram);
  75 #ifdef _MZ6550
  76         SET_BANK(0xf0000, 0xf7fff, wdmy, rdmy); // aux
  77         SET_BANK(0xf8000, 0xfffff, wdmy, ipl);
  78 #else
  79         SET_BANK(0xf0000, 0xfbfff, wdmy, rdmy); // aux
  80         SET_BANK(0xfc000, 0xfffff, wdmy, ipl);
  81 #endif
  82
  83         // init dmac
  84         haddr = 0;
  85 }
  86
  87 void MEMORY::reset()
  88 {
  89         bank1 = 0xe0;
  90         bank2 = 0;
  91         update_bank();
  92 }
  93
  94 void MEMORY::write_data8(uint32_t addr, uint32_t data)
  95 {
  96         addr &= 0xfffff;
  97 //      if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
  98 //              d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
  99 //      }
 100         wbank[addr >> 14][addr & 0x3fff] = data;
 101 }
 102
 103 uint32_t MEMORY::read_data8(uint32_t addr)
 104 {
 105         addr &= 0xfffff;
 106 //      if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
 107 //              d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
 108 //      }
 109         return rbank[addr >> 14][addr & 0x3fff];
 110 }
 111
 112 void MEMORY::write_dma_data8(uint32_t addr, uint32_t data)
 113 {
 114         addr = (addr & 0xffff) | haddr;
 115 //      if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
 116 //              d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
 117 //      }
 118         wbank[addr >> 14][addr & 0x3fff] = data;
 119 }
 120
 121 uint32_t MEMORY::read_dma_data8(uint32_t addr)
 122 {
 123         addr = (addr & 0xffff) | haddr;
 124 //      if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
 125 //              d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
 126 //      }
 127         return rbank[addr >> 14][addr & 0x3fff];
 128 }
 129
 130 void MEMORY::write_io8(uint32_t addr, uint32_t data)
 131 {
 132         switch(addr & 0xff) {
 133         case 0x50:
 134                 haddr = (data & 0xf0) << 12;
 135                 break;
 136 #if defined(_MZ6500) || defined(_MZ6550)
 137         case 0xcd:
 138                 // MZ-1R32
 139                 if(bank2 != (data & 0x0f)) {
 140                         bank2 = data & 0x0f;
 141                         update_bank();
 142                 }
 143                 break;
 144 #endif
 145         }
 146 }
 147
 148 uint32_t MEMORY::read_io8(uint32_t addr)
 149 {
 150         return 0xf0 | bank2;    // ???
 151 }
 152
 153 void MEMORY::write_signal(int id, uint32_t data, uint32_t mask)
 154 {
 155         if(bank1 != data) {
 156                 bank1 = data;
 157                 update_bank();
 158         }
 159 }
 160
 161 void MEMORY::update_bank()
 162 {
 163         switch(bank1 & 0xe0) {
 164         case 0xe0:
 165                 SET_BANK(0x0a0000, 0x0bffff, wdmy, kanji);
 166                 break;
 167         case 0xc0:
 168                 SET_BANK(0x0a0000, 0x0bffff, wdmy, kanji + 0x20000);
 169                 break;
 170         case 0xa0:
 171                 SET_BANK(0x0a0000, 0x0bffff, wdmy, dic);
 172                 break;
 173         case 0x80:
 174                 SET_BANK(0x0a0000, 0x0bffff, wdmy, dic + 0x20000);
 175                 break;
 176 #if defined(_MZ6500) || defined(_MZ6550)
 177         case 0x60:
 178                 // MZ-1R32
 179                 {
 180                         int ofs = 0x20000 * ((bank2 >> 1) & 7);
 181                         SET_BANK(0x0a0000, 0x0bffff, mz1r32 + ofs, mz1r32 + ofs);
 182                 }
 183                 break;
 184 #endif
 185         default:
 186                 SET_BANK(0x0a0000, 0x0bffff, wdmy, rdmy);
 187                 break;
 188         }
 189 }
 190
 191 #define STATE_VERSION   1
 192
 193 #include "../../statesub.h"
 194
 195 void MEMORY::decl_state()
 196 {
 197         enter_decl_state(STATE_VERSION);
 198
 199         DECL_STATE_ENTRY_1D_ARRAY(ram, sizeof(ram));
 200         DECL_STATE_ENTRY_1D_ARRAY(vram, sizeof(vram));
 201 #if defined(_MZ6500) || defined(_MZ6550)
 202         DECL_STATE_ENTRY_1D_ARRAY(mz1r32, sizeof(mz1r32));
 203 #endif
 204         DECL_STATE_ENTRY_UINT8(bank1);
 205         DECL_STATE_ENTRY_UINT8(bank2);
 206         DECL_STATE_ENTRY_UINT32(haddr);
 207
 208         leave_decl_state();
 209 }
 210
 211 void MEMORY::save_state(FILEIO* state_fio)
 212 {
 213         if(state_entry != NULL) {
 214                 state_entry->save_state(state_fio);
 215         }
 216 //      state_fio->FputUint32(STATE_VERSION);
 217 //      state_fio->FputInt32(this_device_id);
 218
 219 //      state_fio->Fwrite(ram, sizeof(ram), 1);
 220 //      state_fio->Fwrite(vram, sizeof(vram), 1);
 221 //#if defined(_MZ6500) || defined(_MZ6550)
 222 //      state_fio->Fwrite(mz1r32, sizeof(mz1r32), 1);
 223 //#endif
 224 //      state_fio->FputUint8(bank1);
 225 //      state_fio->FputUint8(bank2);
 226 //      state_fio->FputUint32(haddr);
 227 }
 228
 229 bool MEMORY::load_state(FILEIO* state_fio)
 230 {
 231         bool mb = false;
 232         if(state_entry != NULL) {
 233                 mb = state_entry->load_state(state_fio);
 234         }
 235         if(!mb) {
 236                 return false;
 237         }
 238 //      if(state_fio->FgetUint32() != STATE_VERSION) {
 239 //              return false;
 240 //      }
 241 //      if(state_fio->FgetInt32() != this_device_id) {
 242 //              return false;
 243 //      }
 244 //      state_fio->Fread(ram, sizeof(ram), 1);
 245 //      state_fio->Fread(vram, sizeof(vram), 1);
 246 //#if defined(_MZ6500) || defined(_MZ6550)
 247 //      state_fio->Fread(mz1r32, sizeof(mz1r32), 1);
 248 //#endif
 249 //      bank1 = state_fio->FgetUint8();
 250 //      bank2 = state_fio->FgetUint8();
 251 //      haddr = state_fio->FgetUint32();
 252
 253         // post process
 254          update_bank();
 255         return true;
 256 }
 257
 258 bool MEMORY::process_state(FILEIO* state_fio, bool loading)
 259 {
 260         if(!state_fio->StateCheckUint32(STATE_VERSION)) {
 261                 return false;
 262         }
 263         if(!state_fio->StateCheckInt32(this_device_id)) {
 264                 return false;
 265         }
 266         state_fio->StateBuffer(ram, sizeof(ram), 1);
 267         state_fio->StateBuffer(vram, sizeof(vram), 1);
 268 #if defined(_MZ6500) || defined(_MZ6550)
 269         state_fio->StateBuffer(mz1r32, sizeof(mz1r32), 1);
 270 #endif
 271         state_fio->StateUint8(bank1);
 272         state_fio->StateUint8(bank2);
 273         state_fio->StateUint32(haddr);
 274
 275         // post process
 276         if(loading) {
 277                  update_bank();
 278                 }
 279         return true;
 280 }