2 SHARP MZ-5500 Emulator 'EmuZ-5500'
4 Author : Takeda.Toshiya
12 #define SET_BANK(s, e, w, r) { \
13 int sb = (s) >> 14, eb = (e) >> 14; \
14 for(int i = sb; i <= eb; i++) { \
18 wbank[i] = (w) + 0x4000 * (i - sb); \
23 rbank[i] = (r) + 0x4000 * (i - sb); \
28 void MZ5500_MEMORY::initialize()
31 memset(ram, 0, sizeof(ram));
32 memset(vram, 0, sizeof(vram));
33 memset(ipl, 0xff, sizeof(ipl));
34 memset(kanji, 0xff, sizeof(kanji));
35 memset(dic, 0xff, sizeof(dic));
37 memset(dic2, 0xff, sizeof(dic2));
39 #if defined(_MZ6500) || defined(_MZ6550)
40 memset(mz1r32, 0, sizeof(mz1r32));
42 memset(rdmy, 0xff, sizeof(rdmy));
45 FILEIO* fio = new FILEIO();
46 if(fio->Fopen(create_local_path(_T("IPL.ROM")), FILEIO_READ_BINARY)) {
47 fio->Fread(ipl, sizeof(ipl), 1);
50 if(fio->Fopen(create_local_path(_T("KANJI.ROM")), FILEIO_READ_BINARY)) {
51 fio->Fread(kanji, sizeof(kanji), 1);
54 if(fio->Fopen(create_local_path(_T("DICT.ROM")), FILEIO_READ_BINARY)) {
55 fio->Fread(dic, sizeof(dic), 1);
59 if(fio->Fopen(create_local_path(_T("DICT2.ROM")), FILEIO_READ_BINARY)) {
60 fio->Fread(dic2, sizeof(dic2), 1);
67 #if defined(_MZ6500) || defined(_MZ6550)
68 SET_BANK(0x00000, 0x9ffff, ram, ram);
70 SET_BANK(0x00000, 0x7ffff, ram, ram);
71 SET_BANK(0x80000, 0x9ffff, wdmy, rdmy); // aux
73 SET_BANK(0xa0000, 0xbffff, wdmy, kanji);
74 SET_BANK(0xc0000, 0xeffff, vram, vram);
76 SET_BANK(0xf0000, 0xf7fff, wdmy, rdmy); // aux
77 SET_BANK(0xf8000, 0xfffff, wdmy, ipl);
79 SET_BANK(0xf0000, 0xfbfff, wdmy, rdmy); // aux
80 SET_BANK(0xfc000, 0xfffff, wdmy, ipl);
87 void MZ5500_MEMORY::reset()
94 void MZ5500_MEMORY::write_data8(uint32_t addr, uint32_t data)
97 // if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
98 // d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
100 wbank[addr >> 14][addr & 0x3fff] = data;
103 uint32_t MZ5500_MEMORY::read_data8(uint32_t addr)
106 // if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
107 // d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
109 return rbank[addr >> 14][addr & 0x3fff];
112 void MZ5500_MEMORY::write_dma_data8(uint32_t addr, uint32_t data)
114 addr = (addr & 0xffff) | haddr;
115 // if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
116 // d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
118 wbank[addr >> 14][addr & 0x3fff] = data;
121 uint32_t MZ5500_MEMORY::read_dma_data8(uint32_t addr)
123 addr = (addr & 0xffff) | haddr;
124 // if((0x80000 <= addr && addr < 0xa0000) || (0xf0000 <= addr && addr < 0xfc000)) {
125 // d_cpu->write_signal(SIG_CPU_NMI, 1, 1);
127 return rbank[addr >> 14][addr & 0x3fff];
130 void MZ5500_MEMORY::write_io8(uint32_t addr, uint32_t data)
132 switch(addr & 0xff) {
134 haddr = (data & 0xf0) << 12;
136 #if defined(_MZ6500) || defined(_MZ6550)
139 if(bank2 != (data & 0x0f)) {
148 uint32_t MZ5500_MEMORY::read_io8(uint32_t addr)
150 return 0xf0 | bank2; // ???
153 void MZ5500_MEMORY::write_signal(int id, uint32_t data, uint32_t mask)
161 void MZ5500_MEMORY::update_bank()
163 switch(bank1 & 0xe0) {
165 SET_BANK(0x0a0000, 0x0bffff, wdmy, kanji);
168 SET_BANK(0x0a0000, 0x0bffff, wdmy, kanji + 0x20000);
171 SET_BANK(0x0a0000, 0x0bffff, wdmy, dic);
174 SET_BANK(0x0a0000, 0x0bffff, wdmy, dic + 0x20000);
176 #if defined(_MZ6500) || defined(_MZ6550)
180 int ofs = 0x20000 * ((bank2 >> 1) & 7);
181 SET_BANK(0x0a0000, 0x0bffff, mz1r32 + ofs, mz1r32 + ofs);
186 SET_BANK(0x0a0000, 0x0bffff, wdmy, rdmy);
191 #define STATE_VERSION 1
193 bool MZ5500_MEMORY::process_state(FILEIO* state_fio, bool loading)
195 if(!state_fio->StateCheckUint32(STATE_VERSION)) {
198 if(!state_fio->StateCheckInt32(this_device_id)) {
201 state_fio->StateBuffer(ram, sizeof(ram), 1);
202 state_fio->StateBuffer(vram, sizeof(vram), 1);
203 #if defined(_MZ6500) || defined(_MZ6550)
204 state_fio->StateBuffer(mz1r32, sizeof(mz1r32), 1);
206 state_fio->StateUint8(bank1);
207 state_fio->StateUint8(bank2);
208 state_fio->StateUint32(haddr);