source/src/vm/pc6001/memory.cpp

   1 /** iP6: PC-6000/6600 series emualtor ************************/
   2 /**                                                         **/
   3 /**                         Refresh.c                       **/
   4 /**                                                         **/
   5 /** modified by Windy 2002-2004                             **/
   6 /** by ISHIOKA Hiroshi 1998,1999                            **/
   7 /** This code is based on fMSX written by Marat Fayzullin   **/
   8 /** and Adaptions for any X-terminal by Arnold Metselaar    **/
   9 /*************************************************************/
  10
  11 /*
  12         NEC PC-6001 Emulator 'yaPC-6001'
  13         NEC PC-6001mkII Emulator 'yaPC-6201'
  14         NEC PC-6001mkIISR Emulator 'yaPC-6401'
  15         NEC PC-6601 Emulator 'yaPC-6601'
  16         NEC PC-6601SR Emulator 'yaPC-6801'
  17
  18         Author : tanam
  19         Date   : 2013.07.15-
  20
  21         [ memory ]
  22 */
  23
  24 #include "./memory.h"
  25 #include "timer.h"
  26
  27 #define RAM             (MEMORY_BASE + RAM_BASE)
  28 #define BASICROM        (MEMORY_BASE + BASICROM_BASE)
  29 #define EXTROM          (MEMORY_BASE + EXTROM_BASE)
  30 #define CGROM1          (MEMORY_BASE + CGROM1_BASE)
  31 #define EmptyRAM        (MEMORY_BASE + EmptyRAM_BASE)
  32 // PC-6001mkII, PC-6601
  33 #define VOICEROM        (MEMORY_BASE + VOICEROM_BASE)
  34 #define KANJIROM        (MEMORY_BASE + KANJIROM_BASE)
  35 #define CGROM5          (MEMORY_BASE + CGROM5_BASE)
  36 // PC-6001mkIISR, PC-6601SR
  37 #define EXTRAM          (MEMORY_BASE + EXTRAM_BASE)
  38 #define SYSTEMROM1      (MEMORY_BASE + SYSTEMROM1_BASE)
  39 #define SYSTEMROM2      (MEMORY_BASE + SYSTEMROM2_BASE)
  40 #define CGROM6          (MEMORY_BASE + CGROM6_BASE)
  41
  42 namespace PC6001 {
  43
  44 void MEMORY::initialize()
  45 {
  46         FILEIO* fio = new FILEIO();
  47 #if defined(_PC6001)
  48         if(fio->Fopen(create_local_path(_T("BASICROM.60")), FILEIO_READ_BINARY)) {
  49                 fio->Fread(BASICROM, 0x4000, 1);
  50                 fio->Fclose();
  51         }
  52         if(fio->Fopen(create_local_path(_T("CGROM60.60")), FILEIO_READ_BINARY)) {
  53                 fio->Fread(CGROM1, 0x1000, 1);
  54                 fio->Fclose();
  55         }
  56 #elif defined(_PC6001MK2)
  57         if (fio->Fopen(create_local_path(_T("CGROM62.62")), FILEIO_READ_BINARY)) {
  58                 fio->Fread(CGROM5, 0x2000, 1);
  59                 fio->Fclose();
  60         }
  61         else if (fio->Fopen(create_local_path(_T("CGROM60m.62")), FILEIO_READ_BINARY)) {
  62                 fio->Fread(CGROM5, 0x2000, 1);
  63                 fio->Fclose();
  64         }
  65         if (fio->Fopen(create_local_path(_T("BASICROM.62")), FILEIO_READ_BINARY)) {
  66                 fio->Fread(BASICROM, 0x8000, 1);
  67                 fio->Fclose();
  68         }
  69         if (fio->Fopen(create_local_path(_T("CGROM60.62")), FILEIO_READ_BINARY)) {
  70                 fio->Fread(CGROM1, 0x2000, 1);
  71                 fio->Fclose();
  72         }
  73         if (fio->Fopen(create_local_path(_T("KANJIROM.62")), FILEIO_READ_BINARY)) {
  74                 fio->Fread(KANJIROM, 0x8000, 1);
  75                 fio->Fclose();
  76         }
  77         if (fio->Fopen(create_local_path(_T("VOICEROM.62")), FILEIO_READ_BINARY)) {
  78                 fio->Fread(VOICEROM, 0x4000, 1);
  79                 fio->Fclose();
  80         }
  81 #elif defined(_PC6601)
  82         if (fio->Fopen(create_local_path(_T("CGROM66.66")), FILEIO_READ_BINARY)) {
  83                 fio->Fread(CGROM5, 0x2000, 1);
  84                 fio->Fclose();
  85         }
  86         if (fio->Fopen(create_local_path(_T("BASICROM.66")), FILEIO_READ_BINARY)) {
  87                 fio->Fread(BASICROM, 0x8000, 1);
  88                 fio->Fclose();
  89         }
  90         if (fio->Fopen(create_local_path(_T("CGROM60.66")), FILEIO_READ_BINARY)) {
  91                 fio->Fread(CGROM1, 0x2000, 1);
  92                 fio->Fclose();
  93         }
  94         if (fio->Fopen(create_local_path(_T("KANJIROM.66")), FILEIO_READ_BINARY)) {
  95                 fio->Fread(KANJIROM, 0x8000, 1);
  96                 fio->Fclose();
  97         }
  98         if (fio->Fopen(create_local_path(_T("VOICEROM.66")), FILEIO_READ_BINARY)) {
  99                 fio->Fread(VOICEROM, 0x4000, 1);
 100                 fio->Fclose();
 101         }
 102 #elif defined(_PC6601SR) || defined(_PC6001MK2SR)
 103         if (fio->Fopen(create_local_path(_T("CGROM68.68")), FILEIO_READ_BINARY)) {
 104                 fio->Fread(CGROM6, 0x4000, 1);
 105                 fio->Fclose();
 106         }
 107         memcpy(CGROM1, CGROM6, 0x2400);
 108         memcpy(CGROM5, CGROM6+0x2000, 0x2000);
 109         if (fio->Fopen(create_local_path(_T("SYSTEMROM1.68")), FILEIO_READ_BINARY)) {
 110                 fio->Fread(SYSTEMROM1, 0x10000, 1);
 111                 fio->Fclose();
 112         }
 113         memcpy(BASICROM, SYSTEMROM1, 0x8000);
 114         if (fio->Fopen(create_local_path(_T("SYSTEMROM2.68")), FILEIO_READ_BINARY)) {
 115                 fio->Fread(SYSTEMROM2, 0x10000, 1);
 116                 fio->Fclose();
 117         }
 118         memcpy(VOICEROM, SYSTEMROM2+0x4000, 0x4000);
 119         memcpy(KANJIROM, SYSTEMROM2+0x8000, 0x8000);
 120 #endif
 121         delete fio;
 122
 123 #ifndef _PC6001
 124         int i;
 125         // for mkII/66
 126         int Pal11[ 4] = { 15, 8,10, 8 };
 127         int Pal12[ 8] = { 10,11,12, 9,15,14,13, 1 };
 128         int Pal13[ 8] = { 10,11,12, 9,15,14,13, 1 };
 129         int Pal14[ 4] = {  8,10, 8,15 };
 130         int Pal15[ 8] = {  8,9,11,14, 8,9,14,15 };
 131         int Pal53[32] = {  0, 4, 1, 5, 2, 6, 3, 7, 8,12, 9,13,10,14,11,15,
 132                 10,11,12, 9,15,14,13, 1,10,11,12, 9,15,14,13, 1 };
 133
 134         for(i=0;i<32;i++) {
 135                 BPal53[i]=Pal53[i];
 136                 if (i>15) continue;
 137                 BPal[i]=i;
 138                 if (i>7) continue;
 139                 BPal12[i]=Pal12[i];
 140                 BPal13[i]=Pal13[i];
 141                 BPal15[i]=Pal15[i];
 142                 if (i>3) continue;
 143                 BPal11[i]=Pal11[i];
 144                 BPal14[i]=Pal14[i];
 145         }
 146         for (i=0;i<32;i++) BPal62[i] = BPal53[i];       // for RefreshScr62/63
 147         for (i=0;i<16;i++) BPal61[i] = BPal[i];         // for RefreshScr61
 148
 149         // mk2\81` palette
 150         palette_pc[ 0] = RGB_COLOR(0x14,0x14,0x14); // COL065                   = 141414                        ;mk2\81` \93§\96¾(\8d\95)
 151         palette_pc[ 1] = RGB_COLOR(0xFF,0xAC,0x00); // COL066                   = FFAC00                        ;mk2\81` \9eò
 152         palette_pc[ 2] = RGB_COLOR(0x00,0xFF,0xAC); // COL067                   = 00FFAC                        ;mk2\81` \90Â\97Î
 153         palette_pc[ 3] = RGB_COLOR(0xAC,0xFF,0x00); // COL068                   = ACFF00                        ;mk2\81` \89©\97Î
 154         palette_pc[ 4] = RGB_COLOR(0xAC,0x00,0xFF); // COL069                   = AC00FF                        ;mk2\81` \90Â\8e\87
 155         palette_pc[ 5] = RGB_COLOR(0xFF,0x00,0xAC); // COL070                   = FF00AC                        ;mk2\81` \90Ô\8e\87
 156         palette_pc[ 6] = RGB_COLOR(0x00,0xAC,0xFF); // COL071                   = 00ACFF                        ;mk2\81` \8bó\90F
 157         palette_pc[ 7] = RGB_COLOR(0xAC,0xAC,0xAC); // COL072                   = ACACAC                        ;mk2\81` \8aD\90F
 158         palette_pc[ 8] = RGB_COLOR(0x14,0x14,0x14); // COL073                   = 141414                        ;mk2\81` \8d\95
 159         palette_pc[ 9] = RGB_COLOR(0xFF,0x00,0x00); // COL074                   = FF0000                        ;mk2\81` \90Ô
 160         palette_pc[10] = RGB_COLOR(0x00,0xFF,0x00); // COL075                   = 00FF00                        ;mk2\81` \97Î
 161         palette_pc[11] = RGB_COLOR(0xFF,0xFF,0x00); // COL076                   = FFFF00                        ;mk2\81` \89©
 162         palette_pc[12] = RGB_COLOR(0x00,0x00,0xFF); // COL077                   = 0000FF                        ;mk2\81` \90Â
 163         palette_pc[13] = RGB_COLOR(0xFF,0x00,0xFF); // COL078                   = FF00FF                        ;mk2\81` \83}\83[\83\93\83^
 164         palette_pc[14] = RGB_COLOR(0x00,0xFF,0xFF); // COL079                   = 00FFFF                        ;mk2\81` \83V\83A\83\93
 165         palette_pc[15] = RGB_COLOR(0xFF,0xFF,0xFF); // COL080                   = FFFFFF                        ;mk2\81` \94\92
 166
 167         // register event
 168         register_vline_event(this);
 169 #endif
 170 }
 171
 172 void MEMORY::reset()
 173 {
 174 #ifdef _PC6001
 175         int J;
 176         if (!inserted) {
 177 ///             EXTROM1 = EXTROM2 = EmptyRAM;
 178                 EXTROM1 = RAM + 0x4000;
 179                 EXTROM2 = RAM + 0x6000;
 180                 FILEIO* fio = new FILEIO();
 181                 if (fio->Fopen(create_local_path(_T("EXTROM.60")), FILEIO_READ_BINARY)) {
 182                         fio->Fread(EXTROM, 0x4000, 1);
 183                         fio->Fclose();
 184                         EXTROM1 = EXTROM;
 185                         EXTROM2 = EXTROM + 0x2000;
 186                         inserted = true;
 187                 }
 188                 delete fio;
 189         }
 190         memset(RAM ,0,0x10000);
 191         memset(EmptyRAM, 0, 0x2000);
 192         CGROM = CGROM1;
 193         CGSW93 = 0;
 194         VRAM = RAM;
 195         for(J=0;J<4;J++) {RdMem[J]=BASICROM+0x2000*J;WrMem[J]=RAM+0x2000*J;};
 196         RdMem[2] = EXTROM1; RdMem[3] = EXTROM2;
 197         for(J=4;J<8;J++) {RdMem[J]=RAM+0x2000*J;WrMem[J]=RAM+0x2000*J;};
 198         EnWrite[0]=0; EnWrite[1]=EnWrite[2]=EnWrite[3]=1;
 199 #else
 200         int I, J;
 201         uint8_t *addr=RAM;
 202         memset(RAM ,0,0x10000);
 203         memset(EmptyRAM, 0, 0x2000);
 204         for(I=0; I<256; I++ ){
 205                 for( J=0; J<64; J++ ){
 206                         *addr++ = 0x00;
 207                         *addr++ = 0xff;
 208                 }
 209                 for( J=0; J<64; J++ ){
 210                         *addr++ = 0xff;
 211                         *addr++ = 0x00;
 212                 }
 213         }
 214         if (!inserted) {
 215                 EXTROM1 = EXTROM2 = EmptyRAM;
 216         }
 217 #if defined(_PC6001MK2) || defined(_PC6601)
 218         static_cast<VM *>(vm)->sr_mode=0;
 219         CGROM = CGROM1;
 220         VRAM = RAM+0xE000;
 221         for (I=0; I<0x200; I++ ) *(VRAM+I)=0xde;
 222         for(J=0;J<4;J++) {RdMem[J]=BASICROM+0x2000*J;WrMem[J]=RAM+0x2000*J;};
 223         for(J=4;J<8;J++) {RdMem[J]=RAM+0x2000*J;WrMem[J]=RAM+0x2000*J;};
 224         EnWrite[0]=EnWrite[1]=0; EnWrite[2]=EnWrite[3]=1;
 225 #elif defined(_PC6601SR) || defined(_PC6001MK2SR)
 226         static_cast<VM *>(vm)->sr_mode=1;
 227         bitmap=1;
 228         cols=40;
 229         rows=20;
 230         lines=200;
 231         memset(EXTRAM ,0,0x10000);
 232         for (int i=0; i<16; i++) palet[i] = i;
 233         port60[0]= 0xf8;                                        //I/O[60..67] READ  MEMORY MAPPING
 234         for (I=1; I<15; I++) port60[I]=0;       //I/O[68-6f]  WRITE MEMORY MAPPING
 235         portC1 = 0x00;                                          //I/O[C1]     CRT CONTROLLER MODE
 236         portC8 = 0x00;                                          //I/O[C8]     CRT CONTROLLER TYPE
 237         portCA = 0x00;                                          //I/O[CA]     X GEOMETORY low  HARDWARE SCROLL
 238         portCB = 0x00;                                          //I/O[CB]     X GEOMETORY high HARDWARE SCROLL
 239         portCC = 0x00;                                          //I/O[CC]     Y GEOMETORY      HARDWARE SCROLL
 240         portCE = 0x00;                                          //I/O[CE]     LINE SETTING  BITMAP (low) */
 241         portCF = 0x00;                                          //I/O[CF]     LINE SETTING  BITMAP (High) */
 242         CGROM=CGROM6;
 243         make_semigraph();
 244         for(J=0;J<4;J++) {RdMem[J]=SYSTEMROM1+0x2000*J+0x8000;WrMem[J]=RAM+0x2000*J;};
 245         RdMem[2] = EXTROM1; RdMem[3] = EXTROM2;
 246         for(J=4;J<8;J++) {RdMem[J]=RAM+0x2000*J;WrMem[J]=RAM+0x2000*J;};
 247         EnWrite[0]=EnWrite[1]=0; EnWrite[2]=EnWrite[3]=1;
 248         VRAM=RAM;
 249         TEXTVRAM=RAM;
 250         SYSROM2=EmptyRAM;
 251 #endif
 252         portF0 = 0x11;
 253         portF1 = 0xdd;
 254         CRTMode1 = CRTMode2 = CRTMode3 = 0;
 255         CSS3=CSS2=CSS1=0;
 256         CGSW93 = CRTKILL = 0;
 257         CurKANJIROM = KANJIROM;
 258 #endif
 259 }
 260
 261 void MEMORY::write_data8(uint32_t addr, uint32_t data)
 262 {
 263 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 264         /* Graphics Vram Write (SR basic) */
 265         if(static_cast<VM *>(vm)->sr_mode && chk_gvram(addr ,8))
 266                 gvram_write(addr, data);
 267         else
 268 #endif
 269         /* normal memory write */
 270         if(EnWrite[addr >> 14])
 271                 WrMem[addr >> 13][addr & 0x1FFF] = data;
 272 }
 273
 274 uint32_t MEMORY::read_data8(uint32_t addr)
 275 {
 276 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 277         /* Graphics Vram Read (SR basic) */
 278         if(static_cast<VM *>(vm)->sr_mode && chk_gvram(addr, 0))
 279                 return(gvram_read(addr));
 280 #endif
 281         return(RdMem[addr >> 13][addr & 0x1FFF]);
 282 }
 283
 284 void MEMORY::write_io8(uint32_t addr, uint32_t data)
 285 {
 286         unsigned int VRAMHead[2][4] = {
 287                 { 0xc000, 0xe000, 0x8000, 0xa000 },
 288                 { 0x8000, 0xc000, 0x0000, 0x4000 }
 289         };
 290         uint16_t port=(addr & 0x00ff);
 291         uint8_t Value=data;
 292         switch(port)
 293         {
 294 #ifdef _PC6001
 295         /// 64K RAM ///
 296         case 0x00:
 297                 if (Value & 1) {
 298                         RdMem[0]=RAM;
 299                         RdMem[1]=RAM+0x2000;
 300                         EnWrite[0]=1;
 301                 } else {
 302                         RdMem[0]=BASICROM;
 303                         RdMem[1]=BASICROM+0x2000;
 304                         EnWrite[0]=0;
 305                 }
 306                 break;
 307         /// CP/M ///
 308         case 0xf0:
 309                 if (Value ==0xdd) {
 310                         RdMem[0]=RAM;
 311                         RdMem[1]=RAM+0x2000;
 312                         RdMem[2]=RAM+0x4000;
 313                         RdMem[3]=RAM+0x6000;
 314                         EnWrite[0]=EnWrite[1]=1;
 315                 } else {
 316                         RdMem[0]=BASICROM;
 317                         RdMem[1]=BASICROM+0x2000;
 318                         RdMem[2]=EXTROM1;
 319                         RdMem[3]=EXTROM2;
 320                         EnWrite[0]=EnWrite[1]=0;
 321                 }
 322                 break;
 323 #else
 324 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 325         case 0x40:
 326         case 0x41:
 327         case 0x42:
 328         case 0x43:
 329                 int reg,val;
 330                 reg= 15-(port-0x40);
 331                 val= 15-Value;
 332                 palet[ reg]= val;
 333                 do_palet( reg,val);
 334                 break;
 335         case 0x60:
 336         case 0x61:
 337         case 0x62:
 338         case 0x63:
 339         case 0x64:
 340         case 0x65:
 341         case 0x66:
 342         case 0x67:
 343                 int start_adr;
 344                 start_adr= Value & 0xe;
 345                 port60[port-0x60]= Value;
 346                 switch( Value & 0xf0) {
 347                 case 0xf0: RdMem[(port& 0xf)]=SYSTEMROM1+(start_adr)*0x1000;break;
 348                 case 0xe0: RdMem[(port& 0xf)]=SYSTEMROM2+(start_adr)*0x1000;break;
 349                 case 0xd0: RdMem[(port& 0xf)]=    CGROM6+(start_adr)*0x1000;break;
 350                 case 0xc0: RdMem[(port& 0xf)]=   EXTROM2; /*+(start_adr)*0x1000; */break;
 351                 case 0xb0: RdMem[(port& 0xf)]=   EXTROM1; /*+(start_adr)*0x1000; */break;
 352                 case 0x00: RdMem[(port& 0xf)]=       RAM+(start_adr)*0x1000;break;
 353                 case 0x20: if (EXTRAM) RdMem[ port & 0xf]=  EXTRAM+((start_adr)*0x1000); break;
 354                 }
 355                 return;
 356         case 0x68:
 357         case 0x69:
 358         case 0x6a:
 359         case 0x6b:
 360         case 0x6c:
 361         case 0x6d:
 362         case 0x6e:
 363         case 0x6f:
 364                 port60[port-0x60]= Value;
 365                 if ((Value & 0xf0)==0x00) {
 366                         WrMem[ (port& 0xf)-8]= RAM+((Value & 0xe)*0x1000);
 367                         EnWrite[ ((port & 0xe)-8)/2 ]= 1;
 368                 }
 369                 if (EXTRAM) {
 370                         if((Value & 0xf0)==0x20) {
 371                                 WrMem[ (port& 0xf)-8]= EXTRAM+((Value & 0xe)*0x1000);
 372                         }
 373                 }
 374                 break;
 375 #endif
 376         case 0xB0:
 377                 if (static_cast<VM *>(vm)->sr_mode) {
 378                         d_timer->set_portB0(Value);
 379                 } else {
 380                         VRAM=(RAM+VRAMHead[CRTMode1][(data&0x06)>>1]);
 381                         if (CRTMode1 && Value == 6) d_timer->set_portB0(Value | 0x01); /// Colony Oddysey
 382                         else d_timer->set_portB0(Value);
 383                 }
 384                 break;
 385         case 0xC0: // CSS
 386                 CSS3=(Value&0x04)<<2;CSS2=(Value&0x02)<<2;CSS1=(Value&0x01)<<2;
 387                 break;
 388         case 0xC1: // CRT controller mode
 389                 CRTMode1=(Value&0x02) ? 0 : 1;
 390                 CRTMode2=(Value&0x04) ? 0 : 1;
 391                 CRTMode3=(Value&0x08) ? 0 : 1;
 392 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 393                 portC1 = Value;
 394                 if (static_cast<VM *>(vm)->sr_mode)
 395                         lines=(Value&0x01) ? 200 : 204;
 396                 if (static_cast<VM *>(vm)->sr_mode)
 397                         CGROM = CGROM6;    // N66SR BASIC use CGROM6
 398                 else
 399                         CGROM = ((CRTMode1 == 0) ? CGROM1 : CGROM5);
 400                 if (static_cast<VM *>(vm)->sr_mode) {
 401                         if (CRTMode1==1 && CRTMode2==0 && !bitmap) { /* width 80 */
 402                                 cols=80;
 403                         } else if(CRTMode1==0 && CRTMode2==0 && !bitmap) { /* Width 40  */
 404                                 cols=40;
 405                         }
 406                 }
 407 #else
 408                 CGROM = ((CRTMode1 == 0) ? CGROM1 : CGROM5);
 409 #endif
 410                 break;
 411         case 0xC2: // ROM swtich
 412                 if (static_cast<VM *>(vm)->sr_mode) return;     /* sr_mode do nothing! */
 413                 if ((Value&0x02)==0x00) CurKANJIROM=KANJIROM;
 414                 else CurKANJIROM=KANJIROM+0x4000;
 415                 if ((Value&0x01)==0x00) {
 416 ///                     if(RdMem[0]!=BASICROM) RdMem[0]=VOICEROM;
 417 ///                     if(RdMem[1]!=BASICROM+0x2000) RdMem[1]=VOICEROM+0x2000;
 418 ///                     if(RdMem[0]!=BASICROM)        RdMem[0]=SYSTEMROM2;
 419 ///                     if(RdMem[1]!=BASICROM+0x2000) RdMem[1]=SYSTEMROM2+0x2000;
 420                         if(RdMem[2]!=BASICROM+0x4000) RdMem[2]=VOICEROM;
 421                         if(RdMem[3]!=BASICROM+0x6000) RdMem[3]=VOICEROM+0x2000;
 422                 }
 423                 else {
 424                         write_io8(0xF0,portF0);
 425                 };
 426                 break;
 427         case 0xC3: break; // C2H in/out switch
 428 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 429         case 0xC8:
 430                 portC8  = Value;
 431                 bitmap  = (Value & 8)? 0:1;
 432                 rows    = (Value & 4)? 20:25;
 433 ///             busreq  = (Value & 2)? 0:1;
 434                 static_cast<VM *>(vm)->sr_mode = ((Value & 1)==1) ? 0 : 1;
 435                 if (bitmap && static_cast<VM *>(vm)->sr_mode)
 436                 {
 437                         VRAM = (Value & 0x10) ? RAM+0x8000:RAM+0x0000;
 438                 }
 439                 if (static_cast<VM *>(vm)->sr_mode) {
 440                         CGROM=CGROM6;
 441                         portF0=0x11;
 442                 }
 443                 break;
 444         case 0xC9:
 445                 if (static_cast<VM *>(vm)->sr_mode && !bitmap )
 446                 {
 447                         TEXTVRAM=RAM+(Value & 0xf)*0x1000;
 448                 }
 449                 break;
 450         case 0xCA: portCA=Value; break; // Graphics scroll X low
 451         case 0xCB: portCB=Value; break;// Graphics scroll X high
 452         case 0xCC: portCC=Value; break; // Graphics scroll Y
 453         case 0xCE: portCE=Value; break; /* Graphics Y zahyou SR-BASIC add 2002/2 */
 454         case 0xCF: portCF=0; break;
 455 #endif
 456         case 0xF0: // read block set
 457                 if (static_cast<VM *>(vm)->sr_mode) return;     /* sr_mode do nothing! */
 458                 portF0 = Value;
 459                 switch(data & 0x0f)
 460                 {
 461                 case 0x00: RdMem[0]=RdMem[1]=EmptyRAM; break;
 462                 case 0x01: RdMem[0]=BASICROM;RdMem[1]=BASICROM+0x2000; break;
 463                 case 0x02: RdMem[0]=CurKANJIROM;RdMem[1]=CurKANJIROM+0x2000; break;
 464                 case 0x03: RdMem[0]=RdMem[1]=EXTROM2; break;
 465                 case 0x04: RdMem[0]=RdMem[1]=EXTROM1; break;
 466                 case 0x05: RdMem[0]=CurKANJIROM;RdMem[1]=BASICROM+0x2000; break;
 467 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 468                 case 0x06: RdMem[0]=BASICROM;RdMem[1]=(SYSROM2==EmptyRAM ? CurKANJIROM+0x2000 : SYSROM2); break;
 469 #else
 470                 case 0x06: RdMem[0]=BASICROM;RdMem[1]=CurKANJIROM+0x2000;break;
 471 #endif
 472                 case 0x07: RdMem[0]=EXTROM1;RdMem[1]=EXTROM2; break;
 473                 case 0x08: RdMem[0]=EXTROM2;RdMem[1]=EXTROM1; break;
 474                 case 0x09: RdMem[0]=EXTROM2;RdMem[1]=BASICROM+0x2000; break;
 475                 case 0x0a: RdMem[0]=BASICROM;RdMem[1]=EXTROM2; break;
 476                 case 0x0b: RdMem[0]=EXTROM1;RdMem[1]=CurKANJIROM+0x2000; break;
 477                 case 0x0c: RdMem[0]=CurKANJIROM;RdMem[1]=EXTROM1; break;
 478                 case 0x0d: RdMem[0]=RAM;RdMem[1]=RAM+0x2000; break;
 479 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 480                 case 0x0e: if (EXTRAM) {RdMem[0]=EXTRAM; RdMem[1]=EXTRAM+0x2000;break;}
 481 #else
 482                 case 0x0e: RdMem[0]=RdMem[1]=EmptyRAM; break;
 483 #endif
 484                 case 0x0f: RdMem[0]=RdMem[1]=EmptyRAM; break;
 485                 };
 486                 switch(data & 0xf0)
 487                 {
 488                 case 0x00: RdMem[2]=RdMem[3]=EmptyRAM; break;
 489                 case 0x10: RdMem[2]=BASICROM+0x4000;RdMem[3]=BASICROM+0x6000; break;
 490                 case 0x20: RdMem[2]=VOICEROM;RdMem[3]=VOICEROM+0x2000; break;
 491                 case 0x30: RdMem[2]=RdMem[3]=EXTROM2; break;
 492                 case 0x40: RdMem[2]=RdMem[3]=EXTROM1; break;
 493                 case 0x50: RdMem[2]=VOICEROM;RdMem[3]=BASICROM+0x6000; break;
 494                 case 0x60: RdMem[2]=BASICROM+0x4000;RdMem[3]=VOICEROM+0x2000; break;
 495                 case 0x70: RdMem[2]=EXTROM1;RdMem[3]=EXTROM2; break;
 496                 case 0x80: RdMem[2]=EXTROM2;RdMem[3]=EXTROM1; break;
 497                 case 0x90: RdMem[2]=EXTROM2;RdMem[3]=BASICROM+0x6000; break;
 498                 case 0xa0: RdMem[2]=BASICROM+0x4000;RdMem[3]=EXTROM2; break;
 499                 case 0xb0: RdMem[2]=EXTROM1;RdMem[3]=VOICEROM+0x2000; break;
 500                 case 0xc0: RdMem[2]=VOICEROM;RdMem[3]=EXTROM1; break;
 501                 case 0xd0: RdMem[2]=RAM+0x4000;RdMem[3]=RAM+0x6000; break;
 502 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 503                 case 0xe0: if (EXTRAM) {RdMem[2]=EXTRAM+0x4000; RdMem[3]=EXTRAM+0x6000; break;}
 504 #else
 505                 case 0xe0: RdMem[2]=RdMem[3]=EmptyRAM; break;
 506 #endif
 507                 case 0xf0: RdMem[2]=RdMem[3]=EmptyRAM; break;
 508                 };
 509                 if (CGSW93)     RdMem[3] = CGROM;
 510                 break;
 511         case 0xF1: // read block set
 512                 if (static_cast<VM *>(vm)->sr_mode) return;     /* sr_mode do nothing! */
 513                 portF1 = Value;
 514                 switch(data & 0x0f)
 515                 {
 516                 case 0x00: RdMem[4]=RdMem[5]=EmptyRAM; break;
 517                 case 0x01: RdMem[4]=BASICROM;RdMem[5]=BASICROM+0x2000; break;
 518                 case 0x02: RdMem[4]=CurKANJIROM;RdMem[5]=CurKANJIROM+0x2000; break;
 519                 case 0x03: RdMem[4]=RdMem[5]=EXTROM2; break;
 520                 case 0x04: RdMem[4]=RdMem[5]=EXTROM1; break;
 521                 case 0x05: RdMem[4]=CurKANJIROM;RdMem[5]=BASICROM+0x2000; break;
 522                 case 0x06: RdMem[4]=BASICROM;RdMem[5]=CurKANJIROM+0x2000; break;
 523                 case 0x07: RdMem[4]=EXTROM1;RdMem[5]=EXTROM2; break;
 524                 case 0x08: RdMem[4]=EXTROM2;RdMem[5]=EXTROM1; break;
 525                 case 0x09: RdMem[4]=EXTROM2;RdMem[5]=BASICROM+0x2000; break;
 526                 case 0x0a: RdMem[4]=BASICROM;RdMem[5]=EXTROM2; break;
 527                 case 0x0b: RdMem[4]=EXTROM1;RdMem[5]=CurKANJIROM+0x2000; break;
 528                 case 0x0c: RdMem[4]=CurKANJIROM;RdMem[5]=EXTROM1; break;
 529                 case 0x0d: RdMem[4]=RAM+0x8000;RdMem[5]=RAM+0xa000; break;
 530 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 531                 case 0x0e: if (EXTRAM) {RdMem[4]=EXTRAM+0x8000; RdMem[5]=EXTRAM+0xa000; break;}
 532 #else
 533                 case 0x0e: RdMem[4]=RdMem[5]=EmptyRAM; break;
 534 #endif
 535                 case 0x0f: RdMem[4]=RdMem[5]=EmptyRAM; break;
 536                 };
 537                 switch(data & 0xf0)
 538                 {
 539                 case 0x00: RdMem[6]=RdMem[7]=EmptyRAM; break;
 540                 case 0x10: RdMem[6]=BASICROM+0x4000;RdMem[7]=BASICROM+0x6000; break;
 541                 case 0x20: RdMem[6]=CurKANJIROM;RdMem[7]=CurKANJIROM+0x2000; break;
 542                 case 0x30: RdMem[6]=RdMem[7]=EXTROM2; break;
 543                 case 0x40: RdMem[6]=RdMem[7]=EXTROM1; break;
 544                 case 0x50: RdMem[6]=CurKANJIROM;RdMem[7]=BASICROM+0x6000; break;
 545                 case 0x60: RdMem[6]=BASICROM+0x4000;RdMem[7]=CurKANJIROM+0x2000; break;
 546                 case 0x70: RdMem[6]=EXTROM1;RdMem[7]=EXTROM2; break;
 547                 case 0x80: RdMem[6]=EXTROM2;RdMem[7]=EXTROM1; break;
 548                 case 0x90: RdMem[6]=EXTROM2;RdMem[7]=BASICROM+0x6000; break;
 549                 case 0xa0: RdMem[6]=BASICROM+0x4000;RdMem[7]=EXTROM2; break;
 550                 case 0xb0: RdMem[6]=EXTROM1;RdMem[7]=CurKANJIROM+0x2000; break;
 551                 case 0xc0: RdMem[6]=CurKANJIROM;RdMem[7]=EXTROM1; break;
 552                 case 0xd0: RdMem[6]=RAM+0xc000;RdMem[7]=RAM+0xe000; break;
 553 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 554                 case 0xe0: if (EXTRAM) {RdMem[6]=EXTRAM+0xc000;RdMem[7]=EXTRAM+0xe000; break;}
 555 #else
 556                 case 0xe0: RdMem[6]=RdMem[7]=EmptyRAM; break;
 557 #endif
 558                 case 0xf0: RdMem[6]=RdMem[7]=EmptyRAM; break;
 559                 };
 560                 break;
 561         case 0xF2: // write ram block set
 562                 if (static_cast<VM *>(vm)->sr_mode) return;     /* sr_mode do nothing! */
 563                 if (data & 0x40) {EnWrite[3]=1;WrMem[6]=RAM+0xc000;WrMem[7]=RAM+0xe000;}
 564                 else EnWrite[3]=0;
 565                 if (data & 0x010) {EnWrite[2]=1;WrMem[4]=RAM+0x8000;WrMem[5]=RAM+0xa000;}
 566                 else EnWrite[2]=0;
 567                 if (data & 0x04) {EnWrite[1]=1;WrMem[2]=RAM+0x4000;WrMem[3]=RAM+0x6000;}
 568                 else EnWrite[1]=0;
 569                 if (data & 0x01) {EnWrite[0]=1;WrMem[0]=RAM;WrMem[1]=RAM+0x2000;}
 570                 else EnWrite[0]=0;
 571 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 572                 if (EXTRAM) {
 573                         if (Value&0x80) {EnWrite[3]=2;WrMem[6]=EXTRAM+0xc000;WrMem[7]=EXTRAM+0xe000;}
 574                         if (Value&0x20) {EnWrite[2]=2;WrMem[4]=EXTRAM+0x8000;WrMem[5]=EXTRAM+0xa000;}
 575                         if (Value&0x08) {EnWrite[1]=2;WrMem[2]=EXTRAM+0x4000;WrMem[3]=EXTRAM+0x6000;}
 576                         if (Value&0x02) {EnWrite[0]=2;WrMem[0]=EXTRAM+0x0000;WrMem[1]=EXTRAM+0x2000;}
 577                 }
 578 #endif
 579                 break;
 580 #endif
 581         }
 582         return;
 583 }
 584
 585 #ifndef _PC6001
 586 uint32_t MEMORY::read_io8(uint32_t addr)
 587 {
 588         uint16_t port=(addr & 0x00ff);
 589         uint8_t Value=0xff;
 590
 591         switch(port)
 592         {
 593 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 594         case 0x60:case 0x61:case 0x62:case 0x63:case 0x64:case 0x65:case 0x66:case 0x67:
 595         case 0x68:case 0x69:case 0x6a:case 0x6b:case 0x6c:case 0x6d:case 0x6e:case 0x6f:
 596                 Value=port60[ port-0x60 ];
 597                 break;
 598         case 0xC0: Value=0xff;break;
 599         case 0xC2: Value=0xff;break;
 600 #endif
 601         case 0xF0: if (!static_cast<VM *>(vm)->sr_mode) Value=portF0;break;
 602         case 0xF1: if (!static_cast<VM *>(vm)->sr_mode) Value=portF1;break;
 603         }
 604         return(Value);
 605 }
 606
 607 #define EVENT_HBLANK    1
 608
 609 void MEMORY::event_vline(int v, int clock)
 610 {
 611 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 612         if(static_cast<VM *>(vm)->sr_mode) {
 613                 if(v == (CRTMode1 ? 200 : 192)) {
 614                         d_timer->write_signal(SIG_TIMER_IRQ_VRTC, 1, 1);
 615                 }
 616                 if(!CRTKILL) {
 617                         // SR\83\82\81[\83h\82ÌBUSRQ\82É\82Â\82¢\82Ä\82Í\81A\82¦\82Ñ\82·\97l\82Ì\8fî\95ñ\91Ò\82¿
 618                 }
 619         } else
 620 #endif
 621         {
 622                 if(!CRTKILL) {
 623                         if(v < (CRTMode1 ? 200 : 192)) {
 624                                 d_cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
 625                                 register_event_by_clock(this, EVENT_HBLANK, CPU_CLOCKS /  FRAMES_PER_SEC / LINES_PER_FRAME * 368 / 456, false, NULL);
 626                         }
 627                 }
 628         }
 629 }
 630
 631 void MEMORY::event_callback(int event_id, int err)
 632 {
 633         if(event_id == EVENT_HBLANK) {
 634                 d_cpu->write_signal(SIG_CPU_BUSREQ, 0, 0);
 635         }
 636 }
 637 #endif
 638
 639 void MEMORY::write_signal(int id, uint32_t data, uint32_t mask)
 640 {
 641         if(id == SIG_MEMORY_PIO_PORT_C) {
 642 #ifdef _PC6001
 643                 if(data & 4) {
 644                         CGSW93=0;RdMem[3]=EXTROM2;
 645                 } else {
 646                         CGSW93=1; RdMem[3]=CGROM1;
 647                 }
 648 #else
 649                 if(data & 4) {
 650                         CGSW93=0; if (!static_cast<VM *>(vm)->sr_mode) write_io8(0xf0, portF0);
 651                 } else {
 652                         CGSW93=1; RdMem[3]=CGROM;
 653                 }
 654                 CRTKILL = (data & 2) ? 0 : 1;
 655 #endif
 656         }
 657 }
 658
 659 void MEMORY::open_cart(const _TCHAR* file_path)
 660 {
 661         FILEIO* fio = new FILEIO();
 662         if(fio->Fopen(file_path, FILEIO_READ_BINARY)) {
 663                 fio->Fread(EXTROM, 0x4000, 1);
 664                 fio->Fclose();
 665                 EXTROM1 = EXTROM;
 666                 EXTROM2 = EXTROM + 0x2000;
 667                 EnWrite[1]=0;
 668                 inserted = true;
 669         } else {
 670 ///             EXTROM1 = EXTROM2 = EmptyRAM;
 671                 EXTROM1 = RAM + 0x4000;
 672                 EXTROM2 = RAM + 0x6000;
 673                 EnWrite[1]=1;
 674                 inserted = false;
 675         }
 676         delete fio;
 677 }
 678
 679 void MEMORY::close_cart()
 680 {
 681 ///     EXTROM1 = EXTROM2 = EmptyRAM;
 682         EXTROM1 = RAM + 0x4000;
 683         EXTROM2 = RAM + 0x6000;
 684         EnWrite[1]=1;
 685         inserted = false;
 686 }
 687
 688 #define STATE_VERSION   1
 689
 690 bool MEMORY::process_state(FILEIO* state_fio, bool loading)
 691 {
 692         if(!state_fio->StateCheckUint32(STATE_VERSION)) {
 693                 return false;
 694         }
 695         if(!state_fio->StateCheckInt32(this_device_id)) {
 696                 return false;
 697         }
 698         state_fio->StateBuffer(RAM, RAM_SIZE, 1);
 699         if(loading) {
 700                 CGROM = MEMORY_BASE + state_fio->FgetInt32_LE();
 701                 EXTROM1 = MEMORY_BASE + state_fio->FgetInt32_LE();
 702                 EXTROM2 = MEMORY_BASE + state_fio->FgetInt32_LE();
 703                 for(int i = 0; i < 8; i++) {
 704                         RdMem[i] = MEMORY_BASE + state_fio->FgetInt32_LE();
 705                         WrMem[i] = MEMORY_BASE + state_fio->FgetInt32_LE();
 706                 }
 707                 VRAM = MEMORY_BASE + state_fio->FgetInt32_LE();
 708         } else {
 709                 state_fio->FputInt32_LE((int)(CGROM - MEMORY_BASE));
 710                 state_fio->FputInt32_LE((int)(EXTROM1 - MEMORY_BASE));
 711                 state_fio->FputInt32_LE((int)(EXTROM2 - MEMORY_BASE));
 712                 for(int i = 0; i < 8; i++) {
 713                         state_fio->FputInt32_LE((int)(RdMem[i] - MEMORY_BASE));
 714                         state_fio->FputInt32_LE((int)(WrMem[i] - MEMORY_BASE));
 715                 }
 716                 state_fio->FputInt32_LE((int)(VRAM - MEMORY_BASE));
 717         }
 718         state_fio->StateBuffer(EnWrite, sizeof(EnWrite), 1);
 719         state_fio->StateUint8(CGSW93);
 720         state_fio->StateBool(inserted);
 721 #ifndef _PC6001
 722         state_fio->StateUint8(CRTKILL);
 723         if(loading) {
 724                 CurKANJIROM = MEMORY_BASE + state_fio->FgetInt32_LE();
 725         } else {
 726                 state_fio->FputInt32_LE((int)(CurKANJIROM - MEMORY_BASE));
 727         }
 728         state_fio->StateUint8(CRTMode1);
 729         state_fio->StateUint8(CRTMode2);
 730         state_fio->StateUint8(CRTMode3);
 731         state_fio->StateUint8(CSS1);
 732         state_fio->StateUint8(CSS2);
 733         state_fio->StateUint8(CSS3);
 734         state_fio->StateUint8(portF0);
 735         state_fio->StateUint8(portF1);
 736 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 737         state_fio->StateInt32(bitmap);
 738         state_fio->StateInt32(cols);
 739         state_fio->StateInt32(rows);
 740         state_fio->StateInt32(lines);
 741         if(loading) {
 742                 TEXTVRAM = MEMORY_BASE + state_fio->FgetInt32_LE();
 743                 SYSROM2 = MEMORY_BASE + state_fio->FgetInt32_LE();
 744         } else {
 745                 state_fio->FputInt32_LE((int)(TEXTVRAM - MEMORY_BASE));
 746                 state_fio->FputInt32_LE((int)(SYSROM2 - MEMORY_BASE));
 747         }
 748         state_fio->StateBuffer(EXTRAM, EXTRAM_SIZE, 1);
 749         state_fio->StateBuffer(port60, sizeof(port60), 1);
 750         state_fio->StateUint8(portC1);
 751         state_fio->StateUint8(portC8);
 752         state_fio->StateUint8(portCA);
 753         state_fio->StateUint8(portCB);
 754         state_fio->StateUint8(portCC);
 755         state_fio->StateUint8(portCE);
 756         state_fio->StateUint8(portCF);
 757         state_fio->StateBuffer(palet, sizeof(palet), 1);
 758 #endif
 759 #endif
 760         return true;
 761 }
 762
 763 }