source/src/vm/pc6001/memory.h

   1 //
   2 // refresh screen by Koichi Nishida 2006
   3 // based on Marat Fayzullin's fMSX
   4 // and Hiroshi Ishioka's iP6
   5 //
   6
   7 /*
   8         NEC PC-6001 Emulator 'yaPC-6001'
   9         NEC PC-6001mkII Emulator 'yaPC-6201'
  10         NEC PC-6001mkIISR Emulator 'yaPC-6401'
  11         NEC PC-6601 Emulator 'yaPC-6601'
  12         NEC PC-6601SR Emulator 'yaPC-6801'
  13
  14         Author : tanam
  15         Date   : 2013.07.15-
  16
  17         [ memory ]
  18 */
  19
  20 #ifndef _PC6001_MEMORY_H_
  21 #define _PC6001_MEMORY_H_
  22
  23 #include "../vm.h"
  24 #include "../../emu.h"
  25 #include "../device.h"
  26
  27 #define SIG_MEMORY_PIO_PORT_C   0
  28
  29 #ifndef _PC6001
  30 class TIMER;
  31 #endif
  32
  33 // memory offset
  34 #define RAM_BASE                0
  35 #define RAM_SIZE                0x10000
  36 #define BASICROM_BASE           (RAM_BASE + RAM_SIZE)
  37 #define BASICROM_SIZE           0x8000
  38 #define EXTROM_BASE             (BASICROM_BASE + BASICROM_SIZE)
  39 #define EXTROM_SIZE             0x4000
  40 #define CGROM1_BASE             (EXTROM_BASE + EXTROM_SIZE)
  41 #define CGROM1_SIZE             0x4000
  42 #define EmptyRAM_BASE           (CGROM1_BASE + CGROM1_SIZE)
  43 #define EmptyRAM_SIZE           0x2000
  44 #if defined(_PC6001)
  45 #define MEMORY_SIZE             (EmptyRAM_BASE + EmptyRAM_SIZE)
  46 #endif
  47 #define VOICEROM_BASE           (EmptyRAM_BASE + EmptyRAM_SIZE)
  48 #define VOICEROM_SIZE           0x4000
  49 #define KANJIROM_BASE           (VOICEROM_BASE + VOICEROM_SIZE)
  50 #define KANJIROM_SIZE           0x8000
  51 #define CGROM5_BASE             (KANJIROM_BASE + KANJIROM_SIZE)
  52 #define CGROM5_SIZE             0x2000
  53 #if defined(_PC6601) || defined(_PC6001MK2)
  54 #define MEMORY_SIZE             (CGROM5_BASE + CGROM5_SIZE)
  55 #endif
  56 #define EXTRAM_BASE             (CGROM5_BASE + CGROM5_SIZE)
  57 #define EXTRAM_SIZE             0x10000
  58 #define SYSTEMROM1_BASE         (EXTRAM_BASE + EXTRAM_SIZE)
  59 #define SYSTEMROM1_SIZE         0x10000
  60 #define SYSTEMROM2_BASE         (SYSTEMROM1_BASE + SYSTEMROM1_SIZE)
  61 #define SYSTEMROM2_SIZE         0x10000
  62 #define CGROM6_BASE             (SYSTEMROM2_BASE + SYSTEMROM2_SIZE)
  63 #define CGROM6_SIZE             0x8000
  64 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
  65 #define MEMORY_SIZE             (CGROM6_BASE + CGROM6_SIZE)
  66 #endif
  67
  68 class PC6001_MEMORY : public DEVICE
  69 {
  70 private:
  71         DEVICE *d_cpu;
  72 #ifndef _PC6001
  73         TIMER *d_timer;
  74 #endif
  75         uint8_t MEMORY_BASE[MEMORY_SIZE];
  76 //      uint8_t RAM[0x10000];
  77 //      uint8_t EXTROM[0x4000];         // CURRENT EXTEND ROM
  78 //      uint8_t BASICROM[0x8000];               // BASICROM
  79         uint8_t *CGROM;
  80 //      uint8_t CGROM1[0x4000];         // CGROM1
  81         uint8_t *EXTROM1;                               // EXTEND ROM 1
  82         uint8_t *EXTROM2;                               // EXTEND ROM 2
  83         uint8_t *RdMem[8];                      // READ  MEMORY MAPPING ADDRESS
  84         uint8_t *WrMem[8];                      // WRITE MEMORY MAPPING ADDRESS
  85         uint8_t *VRAM;
  86 //      uint8_t EmptyRAM[0x2000];
  87         uint8_t EnWrite[4];                     // MEMORY MAPPING WRITE ENABLE [N60/N66]
  88         uint8_t CGSW93;
  89         bool inserted;
  90 #ifndef _PC6001
  91         uint8_t CRTKILL;
  92 //      uint8_t VOICEROM[0x4000];
  93 //      uint8_t KANJIROM[0x8000];
  94         uint8_t *CurKANJIROM;
  95 //      uint8_t CGROM5[0x2000];         // CGROM5
  96         uint8_t CRTMode1,CRTMode2,CRTMode3;
  97         uint8_t CSS1,CSS2,CSS3;
  98         uint8_t portF0;
  99         uint8_t portF1;
 100         uint8_t* dest;
 101         scrntype_t palette_pc[16];
 102         int BPal[16],BPal11[4],BPal12[8],BPal13[8],BPal14[4],BPal15[8],BPal53[32],BPal61[16],BPal62[32];
 103         uint8_t W;
 104 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 105         int bitmap;
 106         int cols;                                       // text cols
 107         int rows;                                       // text rows
 108         int lines;
 109         uint8_t *TEXTVRAM;
 110         uint8_t *SYSROM2;
 111 //      uint8_t CGROM6[0x8000];         // CGROM6
 112 //      uint8_t SYSTEMROM1[0x10000];    // SYSTEMROM1
 113 //      uint8_t SYSTEMROM2[0x10000];    // SYSTEMROM2
 114 //      uint8_t EXTRAM[0x10000];
 115         uint8_t port60[16];
 116         uint8_t portC1;                                 //I/O[C1]     CRT CONTROLLER MODE
 117         uint8_t portC8;                                 //I/O[C8]     CRT CONTROLLER TYPE
 118         uint8_t portCA;                                 //I/O[CA]     X GEOMETORY low  HARDWARE SCROLL
 119         uint8_t portCB;                                 //I/O[CB]     X GEOMETORY high HARDWARE SCROLL
 120         uint8_t portCC;                                 //I/O[CC]     Y GEOMETORY      HARDWARE SCROLL
 121         uint8_t portCE;                                 //I/O[CE]     LINE SETTING  BITMAP (low) */
 122         uint8_t portCF;                                 //I/O[CF]     LINE SETTING  BITMAP (High) */
 123         int palet[16];                          // SR PALET
 124         uint8_t screen[204][640];
 125 #else
 126         uint8_t screen[200][320];
 127 #endif
 128
 129         void RefreshScr10();
 130         void RefreshScr11();
 131         void RefreshScr13();
 132         void RefreshScr13a();
 133         void RefreshScr13b();
 134         void RefreshScr13c();
 135         void RefreshScr13d();
 136         void RefreshScr13e();
 137         void RefreshScr51();
 138         void RefreshScr53();
 139         void RefreshScr54();
 140 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 141         void RefreshScr61();
 142         void RefreshScr62();
 143         void RefreshScr63();
 144         void do_palet(int dest,int src);
 145         void make_semigraph(void);
 146         int chk_gvram(uint32_t A,int flag);
 147         uint8_t gvram_read(uint32_t A);
 148         void gvram_write(uint32_t A, uint32_t V);
 149 #endif
 150 #endif
 151
 152         // Pointer Values
 153         int tmp_cgrom_ptr;
 154         int tmp_extrom1_ptr;
 155         int tmp_extrom2_ptr;
 156         int tmp_rdmem_ptr[8];
 157         int tmp_wrmem_ptr[8];
 158         int tmp_vram_ptr;
 159 #ifndef _PC6001
 160         int tmp_kanjirom_ptr;
 161 #if defined(_PC6601SR) || defined(_PC6001MK2SR)
 162         int tmp_textvram_ptr;
 163         int tmp_sysrom2_ptr;
 164 #endif
 165 #endif
 166
 167 public:
 168         PC6001_MEMORY(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
 169         {
 170                 inserted = false;
 171                 set_device_name(_T("Memory Bus"));
 172         }
 173         ~PC6001_MEMORY() {}
 174
 175         // common functions
 176         void initialize();
 177         void reset();
 178         void write_data8(uint32_t addr, uint32_t data);
 179         uint32_t read_data8(uint32_t addr);
 180         void write_io8(uint32_t addr, uint32_t data);
 181 #ifndef _PC6001
 182         uint32_t read_io8(uint32_t addr);
 183         void event_vline(int v, int clock);
 184         void event_callback(int event_id, int err);
 185 #endif
 186         void write_signal(int id, uint32_t data, uint32_t mask);
 187         bool process_state(FILEIO* state_fio, bool loading);
 188
 189         // unique functions
 190 #ifndef _PC6001
 191         void draw_screen();
 192 #endif
 193         void set_context_cpu(DEVICE* device)
 194         {
 195                 d_cpu = device;
 196         }
 197 #ifndef _PC6001
 198         void set_context_timer(TIMER* device)
 199         {
 200                 d_timer = device;
 201         }
 202 #endif
 203         void open_cart(const _TCHAR* file_path);
 204         void close_cart();
 205         bool is_cart_inserted()
 206         {
 207                 return inserted;
 208         }
 209         uint8_t* get_vram()
 210         {
 211                 return MEMORY_BASE + RAM_BASE;
 212         }
 213 #ifndef _PC6001
 214         int get_CRTMode2()
 215         {
 216                 return CRTMode2;
 217         }
 218 #endif
 219 };
 220 #endif