source/src/vm/pcengine/pce.h

   1 /*
   2         NEC-HE PC Engine Emulator 'ePCEngine'
   3         SHARP X1twin Emulator 'eX1twin'
   4
   5         Origin : Ootake (joypad/cdrom)
   6                : xpce (psg)
   7                : MESS (vdc/vce/vpc/cdrom)
   8         Author : Takeda.Toshiya
   9         Date   : 2009.03.11-
  10
  11         [ PC-Eninge ]
  12 */
  13
  14 #ifndef _PCE_H_
  15 #define _PCE_H_
  16
  17 #include "../vm.h"
  18 #include "../../emu.h"
  19 #include "../device.h"
  20
  21 #ifdef SUPPORT_CDROM
  22 #define SIG_PCE_SCSI_IRQ        0
  23 #define SIG_PCE_SCSI_DRQ        1
  24 #define SIG_PCE_SCSI_BSY        2
  25 #define SIG_PCE_CDDA_DONE       3
  26 #define SIG_PCE_ADPCM_VCLK      4
  27 #endif
  28
  29 #define VDC_WPF         684     /* width of a line in frame including blanking areas */
  30 #define VDC_LPF         262     /* number of lines in a single frame */
  31 #ifdef SUPPORT_CDROM
  32 #define ADPCM_CLOCK     9216000
  33 #endif
  34
  35 #define USE_CPU_HUC6280
  36
  37 class HUC6280;
  38 #ifdef SUPPORT_CDROM
  39 class MSM5205;
  40 class SCSI_HOST;
  41 class SCSI_CDROM;
  42 #endif
  43
  44 class PCE : public DEVICE
  45 {
  46 private:
  47         HUC6280* d_cpu;
  48 #ifdef SUPPORT_CDROM
  49         MSM5205* d_msm;
  50         SCSI_HOST* d_scsi_host;
  51         SCSI_CDROM* d_scsi_cdrom;
  52 #endif
  53
  54         bool support_6btn_pad;
  55         bool support_multi_tap;
  56 #ifdef SUPPORT_SUPER_GFX
  57         bool support_sgfx;
  58 #endif
  59 #ifdef SUPPORT_CDROM
  60         bool support_cdrom;
  61 #endif
  62
  63         // memory
  64         uint8_t cart[0x400000]; // max 4mb
  65 #ifdef SUPPORT_SUPER_GFX
  66         uint8_t ram[0x8000];    // ram 32kb
  67 #else
  68         uint8_t ram[0x2000];    // ram 8kb
  69 #endif
  70 #ifdef SUPPORT_BACKUP_RAM
  71         uint8_t backup[0x2000];
  72         uint32_t backup_crc32;
  73 #endif
  74         uint32_t bank;
  75         uint8_t buffer;
  76         int prev_width;
  77         bool inserted;
  78
  79         // vdc
  80         struct {
  81                 int dvssr_write;                /* Set when the DVSSR register has been written to */
  82                 int physical_width;             /* Width of the display */
  83                 int physical_height;            /* Height of the display */
  84                 uint16_t sprite_ram[64*4];      /* Sprite RAM */
  85                 int curline;                    /* the current scanline we're on */
  86                 int current_segment;            /* current segment of display */
  87                 int current_segment_line;       /* current line inside a segment of display */
  88                 int vblank_triggered;           /* to indicate whether vblank has been triggered */
  89                 int raster_count;               /* counter to compare RCR against */
  90                 int satb_countdown;             /* scanlines to wait to trigger the SATB irq */
  91                 uint8_t vram[0x10000];
  92                 uint8_t inc;
  93                 uint8_t vdc_register;
  94                 uint8_t vdc_latch;
  95                 pair_t vdc_data[32];
  96                 int status;
  97                 int y_scroll;
  98         } vdc[2];
  99
 100         struct {
 101                 uint8_t vce_control;            /* VCE control register */
 102                 pair_t vce_address;             /* Current address in the palette */
 103                 pair_t vce_data[512];           /* Palette data */
 104                 int current_bitmap_line;        /* The current line in the display we are on */
 105                 //bitmap_ind16 *bmp;
 106                 scrntype_t bmp[VDC_LPF][VDC_WPF];
 107                 scrntype_t palette[1024];
 108         } vce;
 109
 110         struct {
 111                 struct {
 112                         UINT8 prio;
 113                         UINT8 vdc0_enabled;
 114                         UINT8 vdc1_enabled;
 115                 } vpc_prio[4];
 116                 UINT8   prio_map[512];          /* Pre-calculated priority map */
 117                 pair_t  priority;                       /* Priority settings registers */
 118                 pair_t  window1;                        /* Window 1 setting */
 119                 pair_t  window2;                        /* Window 2 setting */
 120                 UINT8   vdc_select;                     /* Which VDC do the ST0, ST1, and ST2 instructions write to */
 121         } vpc;
 122
 123         void pce_interrupt();
 124 #ifdef SUPPORT_SUPER_GFX
 125         void sgx_interrupt();
 126 #endif
 127         void vdc_reset();
 128         void vdc_advance_line(int which);
 129         void draw_black_line(int line);
 130         void draw_overscan_line(int line);
 131 #ifdef SUPPORT_SUPER_GFX
 132         void draw_sgx_overscan_line(int line);
 133 #endif
 134         void vram_write(int which, uint32_t offset, uint8_t data);
 135         uint8_t vram_read(int which, uint32_t offset);
 136         void vdc_w(int which, uint16_t offset, uint8_t data);
 137         uint8_t vdc_r(int which, uint16_t offset);
 138         void vce_w(uint16_t offset, uint8_t data);
 139         uint8_t vce_r(uint16_t offset);
 140         void pce_refresh_line(int which, int line, int external_input, uint8_t *drawn, scrntype_t *line_buffer);
 141         void conv_obj(int which, int i, int l, int hf, int vf, char *buf);
 142         void pce_refresh_sprites(int which, int line, uint8_t *drawn, scrntype_t *line_buffer);
 143         void vdc_do_dma(int which);
 144         void vpc_update_prio_map();
 145         void vpc_w(uint16_t offset, uint8_t data);
 146         uint8_t vpc_r(uint16_t offset);
 147 #ifdef SUPPORT_SUPER_GFX
 148         void sgx_vdc_w(uint16_t offset, uint8_t data);
 149         uint8_t sgx_vdc_r(uint16_t offset);
 150 #endif
 151
 152         // psg
 153         typedef struct {
 154                 // registers
 155                 uint8_t regs[8];
 156                 uint8_t wav[32];
 157                 uint8_t wavptr;
 158                 // sound gen
 159                 uint32_t genptr;
 160                 uint32_t remain;
 161                 bool noise;
 162                 uint32_t randval;
 163         } psg_t;
 164         psg_t psg[8];
 165         uint8_t psg_ch, psg_vol, psg_lfo_freq, psg_lfo_ctrl;
 166         int sample_rate;
 167         int volume_l, volume_r;
 168         void psg_reset();
 169         void psg_write(uint16_t addr, uint8_t data);
 170         uint8_t psg_read(uint16_t addr);
 171
 172         // joypad
 173         const uint32_t *joy_stat;
 174         uint8_t joy_counter;
 175         bool joy_high_nibble, joy_second_byte;
 176
 177         void joy_reset();
 178         void joy_write(uint16_t addr, uint8_t data);
 179         uint8_t joy_read(uint16_t addr);
 180         uint8_t joy_2btn_pad_r(uint8_t index);
 181         uint8_t joy_6btn_pad_r(uint8_t index);
 182
 183 #ifdef SUPPORT_CDROM
 184         // cd-rom
 185         uint8_t cdrom_ram[0x40000];
 186         uint8_t cdrom_regs[16];
 187         bool backup_locked;
 188         bool irq_status, drq_status;
 189
 190         void cdrom_initialize();
 191         void cdrom_reset();
 192         void cdrom_write(uint16_t addr, uint8_t data);
 193         uint8_t cdrom_read(uint16_t addr);
 194         void write_cdrom_data(uint8_t data);
 195         uint8_t read_cdrom_data();
 196         void set_ack();
 197         void clear_ack();
 198         void set_cdrom_irq_line(int num, int state);
 199
 200         uint8_t adpcm_ram[0x10000];
 201         int adpcm_read_ptr, adpcm_write_ptr, adpcm_written;
 202         int adpcm_length, adpcm_clock_divider;
 203         uint8_t adpcm_read_buf, adpcm_write_buf;
 204         bool adpcm_dma_enabled;
 205         int msm_start_addr, msm_end_addr, msm_half_addr;
 206         uint8_t msm_nibble, msm_idle;
 207
 208         void reset_adpcm();
 209         void write_adpcm_ram(uint8_t data);
 210         uint8_t read_adpcm_ram();
 211         void adpcm_do_dma();
 212         void adpcm_play();
 213         void adpcm_stop();
 214
 215         double cdda_volume, adpcm_volume;
 216         int event_cdda_fader, event_adpcm_fader;
 217
 218         void cdda_fade_in(int time);
 219         void cdda_fade_out(int time);
 220         void adpcm_fade_in(int time);
 221         void adpcm_fade_out(int time);
 222 #endif
 223
 224 public:
 225         PCE(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
 226         {
 227                 volume_l = volume_r = 1024;
 228                 set_device_name(_T("PC-Engine Core"));
 229         }
 230         ~PCE() {}
 231
 232         // common functions
 233         void initialize();
 234         void release();
 235         void reset();
 236         void event_vline(int v, int clock);
 237         void write_data8(uint32_t addr, uint32_t data);
 238         uint32_t read_data8(uint32_t addr);
 239         void write_io8(uint32_t addr, uint32_t data);
 240         uint32_t read_io8(uint32_t addr);
 241 #ifdef SUPPORT_CDROM
 242         void write_signal(int id, uint32_t data, uint32_t mask);
 243         void event_callback(int event_id, int err);
 244 #endif
 245         void mix(int32_t* buffer, int cnt);
 246         void set_volume(int ch, int decibel_l, int decibel_r);
 247         void decl_state();
 248         void save_state(FILEIO* state_fio);
 249         bool load_state(FILEIO* state_fio);
 250
 251         // unique functions
 252         void set_context_cpu(HUC6280* device)
 253         {
 254                 d_cpu = device;
 255         }
 256 #ifdef SUPPORT_CDROM
 257         void set_context_adpcm(MSM5205* device)
 258         {
 259                 d_msm = device;
 260         }
 261         void set_context_scsi_host(SCSI_HOST* device)
 262         {
 263                 d_scsi_host = device;
 264         }
 265         void set_context_scsi_cdrom(SCSI_CDROM* device)
 266         {
 267                 d_scsi_cdrom = device;
 268         }
 269 #endif
 270         void initialize_sound(int rate)
 271         {
 272                 sample_rate = rate;
 273         }
 274         void open_cart(const _TCHAR* file_path);
 275         void close_cart();
 276         bool is_cart_inserted()
 277         {
 278                 return inserted;
 279         }
 280         void draw_screen();
 281 };
 282
 283 #endif