2 EPSON QC-10 Emulator 'eQC-10'
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4 Author : Takeda.Toshiya
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11 #include "../i8253.h"
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12 #include "../pcm1bit.h"
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13 #include "../upd765a.h"
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14 #include "../../fileio.h"
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16 #define SET_BANK(s, e, w, r) { \
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17 int sb = (s) >> 11, eb = (e) >> 11; \
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18 for(int i = sb; i <= eb; i++) { \
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19 wbank[i] = (w) + 0x800 * (i - sb); \
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20 rbank[i] = (r) + 0x800 * (i - sb); \
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24 void MEMORY::initialize()
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27 memset(ram, 0, sizeof(ram));
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28 memset(cmos, 0, sizeof(cmos));
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29 memset(ipl, 0xff, sizeof(ipl));
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30 memset(rdmy, 0xff, sizeof(rdmy));
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33 FILEIO* fio = new FILEIO();
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34 if(fio->Fopen(emu->bios_path(_T("IPL.ROM")), FILEIO_READ_BINARY)) {
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35 fio->Fread(ipl, sizeof(ipl), 1);
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38 if(fio->Fopen(emu->bios_path(_T("CMOS.BIN")), FILEIO_READ_BINARY)) {
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39 fio->Fread(cmos, sizeof(cmos), 1);
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44 cmos_crc32 = getcrc32(cmos, sizeof(cmos));
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47 void MEMORY::release()
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49 if(cmos_crc32 != getcrc32(cmos, sizeof(cmos))) {
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50 FILEIO* fio = new FILEIO();
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51 if(fio->Fopen(emu->bios_path(_T("CMOS.BIN")), FILEIO_WRITE_BINARY)) {
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52 fio->Fwrite(cmos, sizeof(cmos), 1);
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59 void MEMORY::reset()
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67 pcm_on = pcm_cont = pcm_pit = false;
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69 // init fdc/fdd status
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70 fdc_irq = motor = false;
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73 void MEMORY::write_data8(uint32 addr, uint32 data)
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76 wbank[addr >> 11][addr & 0x7ff] = data;
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79 uint32 MEMORY::read_data8(uint32 addr)
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82 return rbank[addr >> 11][addr & 0x7ff];
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85 void MEMORY::write_io8(uint32 addr, uint32 data)
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87 switch(addr & 0xff) {
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88 case 0x18: case 0x19: case 0x1a: case 0x1b:
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90 // timer gate signal
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91 d_pit->write_signal(SIG_I8253_GATE_0, data, 1);
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92 d_pit->write_signal(SIG_I8253_GATE_2, data, 2);
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94 pcm_cont = ((data & 4) != 0);
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97 case 0x1c: case 0x1d: case 0x1e: case 0x1f:
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100 case 0x20: case 0x21: case 0x22: case 0x23:
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107 uint32 MEMORY::read_io8(uint32 addr)
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109 switch(addr & 0xff) {
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110 case 0x18: case 0x19: case 0x1a: case 0x1b:
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111 return ~config.dipswitch & 0xff;
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112 case 0x30: case 0x31: case 0x32: case 0x33:
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113 return (bank & 0xf0) | (d_fdc->disk_inserted() ? 8 : 0) | (motor ? 0 : 2) | (fdc_irq ? 1 : 0);
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119 0000-DFFF : RAM * 4banks
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126 void MEMORY::write_signal(int id, uint32 data, uint32 mask)
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128 if(id == SIG_MEMORY_PCM) {
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130 pcm_pit = ((data & mask) != 0);
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132 } else if(id == SIG_MEMORY_FDC_IRQ) {
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133 fdc_irq = ((data & mask) != 0);
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134 } else if(id == SIG_MEMORY_MOTOR) {
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135 motor = ((data & mask) != 0);
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139 void MEMORY::update_map()
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142 SET_BANK(0x0000, 0x1fff, wdmy, ipl);
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143 SET_BANK(0x2000, 0xdfff, wdmy, rdmy);
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144 } else if(csel & 1) {
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146 SET_BANK(0x0000, 0x7fff, ram + 0x00000, ram + 0x00000);
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147 } else if(bank & 0x20) {
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148 SET_BANK(0x0000, 0x7fff, ram + 0x10000, ram + 0x10000);
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149 } else if(bank & 0x40) {
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150 SET_BANK(0x0000, 0x7fff, ram + 0x20000, ram + 0x20000);
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151 } else if(bank & 0x80) {
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152 SET_BANK(0x0000, 0x7fff, ram + 0x30000, ram + 0x30000);
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154 SET_BANK(0x0000, 0x7fff, wdmy, rdmy);
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156 SET_BANK(0x8000, 0x87ff, cmos, cmos);
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159 SET_BANK(0x0000, 0xdfff, ram + 0x00000, ram + 0x00000);
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160 } else if(bank & 0x20) {
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161 SET_BANK(0x0000, 0xdfff, ram + 0x10000, ram + 0x10000);
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162 } else if(bank & 0x40) {
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163 SET_BANK(0x0000, 0xdfff, ram + 0x20000, ram + 0x20000);
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164 } else if(bank & 0x80) {
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165 SET_BANK(0x0000, 0xdfff, ram + 0x30000, ram + 0x30000);
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167 SET_BANK(0x0000, 0xdfff, wdmy, rdmy);
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170 SET_BANK(0xe000, 0xffff, ram + 0xe000, ram + 0xe000);
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173 void MEMORY::update_pcm()
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175 if(!pcm_on && (pcm_cont || pcm_pit)) {
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176 d_pcm->write_signal(SIG_PCM1BIT_ON, 1, 1);
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178 } else if(pcm_on && !(pcm_cont || pcm_pit)) {
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179 d_pcm->write_signal(SIG_PCM1BIT_ON, 0, 1);
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184 #define STATE_VERSION 1
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186 void MEMORY::save_state(FILEIO* state_fio)
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188 state_fio->FputUint32(STATE_VERSION);
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189 state_fio->FputInt32(this_device_id);
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191 state_fio->Fwrite(ram, sizeof(ram), 1);
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192 state_fio->Fwrite(cmos, sizeof(cmos), 1);
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193 state_fio->FputUint32(cmos_crc32);
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194 state_fio->FputUint8(bank);
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195 state_fio->FputUint8(psel);
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196 state_fio->FputUint8(csel);
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197 state_fio->FputBool(pcm_on);
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198 state_fio->FputBool(pcm_cont);
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199 state_fio->FputBool(pcm_pit);
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200 state_fio->FputBool(fdc_irq);
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201 state_fio->FputBool(motor);
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204 bool MEMORY::load_state(FILEIO* state_fio)
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206 if(state_fio->FgetUint32() != STATE_VERSION) {
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209 if(state_fio->FgetInt32() != this_device_id) {
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212 state_fio->Fread(ram, sizeof(ram), 1);
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213 state_fio->Fread(cmos, sizeof(cmos), 1);
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214 cmos_crc32 = state_fio->FgetUint32();
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215 bank = state_fio->FgetUint8();
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216 psel = state_fio->FgetUint8();
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217 csel = state_fio->FgetUint8();
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218 pcm_on = state_fio->FgetBool();
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219 pcm_cont = state_fio->FgetBool();
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220 pcm_pit = state_fio->FgetBool();
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221 fdc_irq = state_fio->FgetBool();
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222 motor = state_fio->FgetBool();
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