2 Skelton for retropc emulator
4 Origin : MAME TMS99xx Core
5 Author : Takeda.Toshiya
18 #define SIG_TMS9995_NMI 0
19 #define SIG_TMS9995_INT1 1
20 #define SIG_TMS9995_INT4 2
26 class TMS9995 : public DEVICE
33 DEVICE *d_mem_tmp, *d_io_tmp;
39 uint64_t prev_total_count;
43 uint16_t WP, PC, prevPC, ST;
46 uint8_t irq_level, int_state, int_latch;
47 bool int_pending, int_enabled;
49 uint16_t dec_count, dec_interval;
58 uint16_t RM16(uint16_t addr);
59 void WM16(uint16_t addr, uint16_t val);
60 uint8_t RM8(uint16_t addr);
61 void WM8(uint32_t addr, uint8_t val);
62 inline uint16_t FETCH16();
65 uint16_t IN8(int addr);
66 void OUT8(uint16_t addr, uint16_t val);
67 inline void EXTOUT8(uint16_t addr);
68 uint16_t RCRU(uint16_t addr, int bits);
69 void WCRU(uint16_t addr, int bits, uint16_t val);
71 // cpu internal control
72 void set_irq_line(int irqline, bool state);
75 void contextswitch(uint16_t addr);
78 void run_one_opecode();
80 void run_one_opecode_tmp();
82 void execute(uint16_t op);
83 void h0040(uint16_t op);
84 void h0100(uint16_t op);
85 void h0200(uint16_t op);
86 void h0400(uint16_t op);
87 void h0800(uint16_t op);
88 void h1000(uint16_t op);
89 void h2000(uint16_t op);
90 void xop(uint16_t op);
91 void ldcr_stcr(uint16_t op);
92 void h4000w(uint16_t op);
93 void h4000b(uint16_t op);
94 void illegal(uint16_t op);
95 uint16_t decipheraddr(uint16_t op);
96 uint16_t decipheraddrbyte(uint16_t op);
99 inline void setstat();
100 inline void getstat();
101 inline uint16_t logical_right_shift(uint16_t val, int c);
102 inline int16_t arithmetic_right_shift(int16_t val, int c);
103 inline void setst_lae(int16_t val);
104 inline void setst_byte_laep(int8_t val);
105 inline void setst_e(uint16_t val, uint16_t to);
106 inline void setst_c_lae(uint16_t to, uint16_t val);
107 inline int16_t setst_add_laeco(int a, int b);
108 inline int16_t setst_sub_laeco(int a, int b);
109 inline int8_t setst_addbyte_laecop(int a, int b);
110 inline int8_t setst_subbyte_laecop(int a, int b);
111 inline void setst_laeo(int16_t val);
112 inline uint16_t setst_sra_laec(int16_t a, uint16_t c);
113 inline uint16_t setst_srl_laec(uint16_t a,uint16_t c);
114 inline uint16_t setst_src_laec(uint16_t a,uint16_t c);
115 inline uint16_t setst_sla_laeco(uint16_t a, uint16_t c);
118 TMS9995(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
122 total_count = prev_total_count = 0;
125 memset(RAM, 0, sizeof(RAM));
126 irq_level = int_state = int_latch = 0;
129 dec_count = dec_interval = 0;
134 nmi = mid = idle = false;
135 set_device_name(_T("TMS9995 CPU"));
143 void write_signal(int id, uint32_t data, uint32_t mask);
148 uint32_t get_next_pc()
157 uint32_t get_debug_prog_addr_mask()
161 uint32_t get_debug_data_addr_mask()
165 void write_data8(uint32_t addr, uint32_t data);
166 uint32_t read_data8(uint32_t addr);
167 void write_data16(uint32_t addr, uint32_t data);
168 uint32_t read_data16(uint32_t addr);
169 void write_io8(uint32_t addr, uint32_t data);
170 uint32_t read_io8(uint32_t addr);
171 void write_debug_data8(uint32_t addr, uint32_t data);
172 uint32_t read_debug_data8(uint32_t addr);
173 void write_debug_data16(uint32_t addr, uint32_t data);
174 uint32_t read_debug_data16(uint32_t addr);
175 void write_debug_io8(uint32_t addr, uint32_t data);
176 uint32_t read_debug_io8(uint32_t addr);
177 bool write_debug_reg(const _TCHAR *reg, uint32_t data);
178 void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
179 int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
181 bool process_state(FILEIO* state_fio, bool loading);
183 void set_context_mem(DEVICE* device)
187 void set_context_io(DEVICE* device)
192 void set_context_debugger(DEBUGGER* device)