OSDN Git Service

[General] Merge upstream 2018-05-24. Still not test to build, will test.
[csp-qt/common_source_project-fm7.git] / source / src / vm / x1 / iobus.h
1 /*
2         SHARP X1 Emulator 'eX1'
3         SHARP X1twin Emulator 'eX1twin'
4         SHARP X1turbo Emulator 'eX1turbo'
5         SHARP X1turboZ Emulator 'eX1turboZ'
6
7         Author : Takeda.Toshiya
8         Date   : 2009.03.14-
9
10         [ 8bit i/o bus ]
11 */
12
13 #ifndef _IOBUS_H_
14 #define _IOBUS_H_
15
16 #include "../vm.h"
17 #include "../../emu.h"
18 #include "../device.h"
19
20 #define SIG_IOBUS_MODE  0
21
22 class IOBUS : public DEVICE
23 {
24 private:
25         DEVICE *d_cpu, *d_display, *d_io;
26         
27         // vram
28 #ifdef _X1TURBO_FEATURE
29         uint8_t vram[0x18000];
30 #else
31         uint8_t vram[0xc000];
32 #endif
33         bool vram_mode, signal;
34         
35         uint8_t* vram_b;
36         uint8_t* vram_r;
37         uint8_t* vram_g;
38         
39         uint8_t vdisp;
40         
41         uint32_t prev_clock, vram_wait_index;
42         bool column40;
43 #ifdef _X1TURBO_FEATURE
44         uint8_t crtc_regs[18];
45         int crtc_ch;
46         bool hireso;
47 #ifdef _X1TURBOZ
48         uint8_t zmode1;
49         uint8_t zmode2;
50 #endif
51 #endif
52         void write_port8(uint32_t addr, uint32_t data, bool is_dma, int* wait);
53         uint32_t read_port8(uint32_t addr, bool is_dma, int* wait);
54         int get_vram_wait();
55         
56 public:
57         IOBUS(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
58         {
59                 set_device_name(_T("I/O Bus"));
60         }
61         ~IOBUS() {}
62         
63         // common functions
64         void initialize();
65         void reset();
66         void write_signal(int id, uint32_t data, uint32_t mask);
67         void write_io8w(uint32_t addr, uint32_t data, int* wait);
68         uint32_t read_io8w(uint32_t addr, int* wait);
69         void write_dma_io8w(uint32_t addr, uint32_t data, int* wait);
70         uint32_t read_dma_io8w(uint32_t addr, int* wait);
71         void save_state(FILEIO* state_fio);
72         bool load_state(FILEIO* state_fio);
73         
74         // unique functions
75         void set_context_cpu(DEVICE* device)
76         {
77                 d_cpu = device;
78         }
79         void set_context_display(DEVICE* device)
80         {
81                 d_display = device;
82         }
83         void set_context_io(DEVICE* device)
84         {
85                 d_io = device;
86         }
87         uint8_t* get_vram()
88         {
89                 return vram;
90         }
91 };
92
93 #endif
94