source/src/vm/x1/sasi.cpp

   1 /*
   2         SHARP X1 Emulator 'eX1'
   3         SHARP X1twin Emulator 'eX1twin'
   4         SHARP X1turbo Emulator 'eX1turbo'
   5         SHARP X1turboZ Emulator 'eX1turboZ'
   6
   7         Author : Takeda.Toshiya
   8         Date   : 2018.05.15-
   9
  10         [ SASI I/F ]
  11 */
  12
  13 #include "sasi.h"
  14 #ifdef _X1TURBO_FEATURE
  15 #include "../z80dma.h"
  16 #endif
  17
  18 #define STATUS_INT      0x00    // unknown
  19 #define STATUS_REQ      0x01
  20 #define STATUS_BSY      0x02
  21 #define STATUS_IXO      0x04
  22 #define STATUS_CXD      0x08
  23 #define STATUS_MSG      0x10
  24
  25 void SASI::reset()
  26 {
  27         irq_status = drq_status = false;
  28 }
  29
  30 void SASI::write_io8(uint32_t addr, uint32_t data)
  31 {
  32         switch(addr) {
  33         case 0xfd0:
  34                 #ifdef _SCSI_DEBUG_LOG
  35                         this->out_debug_log(_T("[SASI] out %04X %02X\n"), addr, data);
  36                 #endif
  37                 d_host->write_dma_io8(addr, data);
  38                 break;
  39         case 0xfd1:
  40                 #ifdef _SCSI_DEBUG_LOG
  41                         this->out_debug_log(_T("[SASI] out %04X %02X\n"), addr, data);
  42                 #endif
  43                 d_host->write_signal(SIG_SCSI_SEL, 0, 1);
  44                 break;
  45         case 0xfd2:
  46                 #ifdef _SCSI_DEBUG_LOG
  47                         this->out_debug_log(_T("[SASI] out %04X %02X\n"), addr, data);
  48                 #endif
  49                 d_host->write_signal(SIG_SCSI_RST, 0, 1);
  50                 d_host->write_signal(SIG_SCSI_RST, 1, 1);
  51                 d_host->write_signal(SIG_SCSI_RST, 0, 1);
  52                 break;
  53         case 0xfd3:
  54                 #ifdef _SCSI_DEBUG_LOG
  55                         this->out_debug_log(_T("[SASI] out %04X %02X\n"), addr, data);
  56                 #endif
  57                 d_host->write_dma_io8(addr, data);
  58                 d_host->write_signal(SIG_SCSI_SEL, 1, 1);
  59                 break;
  60         }
  61 }
  62
  63 uint32_t SASI::read_io8(uint32_t addr)
  64 {
  65         uint32_t val = 0;
  66
  67         switch(addr) {
  68         case 0xfd0:
  69                 val = d_host->read_dma_io8(addr);
  70                 #ifdef _SCSI_DEBUG_LOG
  71                         this->out_debug_log(_T("[SASI] in  %04X %02X\n"), addr, val);
  72                 #endif
  73                 return val;
  74         case 0xfd1:
  75                 val = (d_host->read_signal(SIG_SCSI_REQ) ? STATUS_REQ : 0) |
  76 //                    (d_host->read_signal(SIG_SCSI_ACK) ? STATUS_ACK : 0) |
  77                       (d_host->read_signal(SIG_SCSI_BSY) ? STATUS_BSY : 0) |
  78                       (d_host->read_signal(SIG_SCSI_MSG) ? STATUS_MSG : 0) |
  79                       (d_host->read_signal(SIG_SCSI_CD ) ? STATUS_CXD : 0) |
  80                       (d_host->read_signal(SIG_SCSI_IO ) ? STATUS_IXO : 0) |
  81                       (irq_status                        ? STATUS_INT : 0);
  82                 irq_status = false;
  83                 #ifdef _SCSI_DEBUG_LOG
  84                         this->out_debug_log(_T("[SASI] in  %04X %02X (REQ=%d,BSY=%d,MSG=%d,CxD=%d,IxO=%d)\n"), addr, val,
  85                                 (val & STATUS_REQ) ? 1 : 0,
  86                                 (val & STATUS_BSY) ? 1 : 0,
  87                                 (val & STATUS_MSG) ? 1 : 0,
  88                                 (val & STATUS_CXD) ? 1 : 0,
  89                                 (val & STATUS_IXO) ? 1 : 0);
  90                 #endif
  91                 return val;
  92         }
  93         return 0xff;
  94 }
  95
  96 void SASI::write_dma_io8(uint32_t addr, uint32_t data)
  97 {
  98         write_io8(0xfd0, data);
  99 }
 100
 101 uint32_t SASI::read_dma_io8(uint32_t addr)
 102 {
 103         return read_io8(0xfd0);
 104 }
 105
 106 void SASI::write_signal(int id, uint32_t data, uint32_t mask)
 107 {
 108         switch(id) {
 109         case SIG_SASI_IRQ:
 110 #ifdef _X1TURBO_FEATURE
 111                 d_dma->write_signal(SIG_Z80DMA_READY, data, mask);
 112 #endif
 113                 irq_status = ((data & mask) != 0);
 114                 break;
 115         case SIG_SASI_DRQ:
 116 #ifdef _X1TURBO_FEATURE
 117                 d_dma->write_signal(SIG_Z80DMA_READY, data, mask);
 118 #endif
 119                 drq_status = ((data & mask) != 0);
 120                 break;
 121         }
 122 }
 123
 124 #define STATE_VERSION   1
 125
 126 bool SASI::process_state(FILEIO* state_fio, bool loading)
 127 {
 128         if(!state_fio->StateCheckUint32(STATE_VERSION)) {
 129                 return false;
 130         }
 131         if(!state_fio->StateCheckInt32(this_device_id)) {
 132                 return false;
 133         }
 134         state_fio->StateBool(irq_status);
 135         state_fio->StateBool(drq_status);
 136         return true;
 137 }