2 Skelton for retropc emulator
5 Author : Takeda.Toshiya
17 #define SIG_NSC800_INT 0
18 #define SIG_NSC800_RSTA 1
19 #define SIG_NSC800_RSTB 2
20 #define SIG_NSC800_RSTC 3
22 //#if defined(USE_SHARED_DLL) || defined(USE_QT)
25 //#define Z80_INLINE inline
30 class csp_state_utils;
31 class Z80_BASE : public DEVICE
34 /* ---------------------------------------------------------------------------
36 --------------------------------------------------------------------------- */
38 DEVICE *d_mem, *d_io, *d_pic;
39 //#ifdef Z80_PSEUDO_BIOS
42 //#ifdef SINGLE_MODE_DMA
47 DEVICE *d_mem_stored, *d_io_stored;
49 outputs_t outputs_busack;
56 bool has_single_mode_dma;
57 bool flags_initialized;
60 /* ---------------------------------------------------------------------------
62 --------------------------------------------------------------------------- */
64 uint64_t total_icount;
65 uint64_t prev_total_icount;
69 pair_t pc, sp, af, bc, de, hl, ix, iy, wz;
70 pair_t af2, bc2, de2, hl2;
74 bool busreq, after_halt;
75 uint8_t im, iff1, iff2, icr;
76 bool after_ei, after_ldair;
77 uint32_t intr_req_bit, intr_pend_bit;
79 Z80_INLINE uint8_t RM8(uint32_t addr);
80 Z80_INLINE void WM8(uint32_t addr, uint8_t val);
81 Z80_INLINE void RM16(uint32_t addr, pair_t *r);
82 Z80_INLINE void WM16(uint32_t addr, pair_t *r);
83 Z80_INLINE uint8_t FETCHOP();
84 Z80_INLINE uint8_t FETCH8();
85 Z80_INLINE uint32_t FETCH16();
86 Z80_INLINE uint8_t IN8(uint32_t addr);
87 Z80_INLINE void OUT8(uint32_t addr, uint8_t val);
89 Z80_INLINE uint8_t INC(uint8_t value);
90 Z80_INLINE uint8_t DEC(uint8_t value);
92 Z80_INLINE uint8_t RLC(uint8_t value);
93 Z80_INLINE uint8_t RRC(uint8_t value);
94 Z80_INLINE uint8_t RL(uint8_t value);
95 Z80_INLINE uint8_t RR(uint8_t value);
96 Z80_INLINE uint8_t SLA(uint8_t value);
97 Z80_INLINE uint8_t SRA(uint8_t value);
98 Z80_INLINE uint8_t SLL(uint8_t value);
99 Z80_INLINE uint8_t SRL(uint8_t value);
101 Z80_INLINE uint8_t RES(uint8_t bit, uint8_t value);
102 Z80_INLINE uint8_t SET(uint8_t bit, uint8_t value);
104 void OP_CB(uint8_t code);
105 void OP_XY(uint8_t code);
106 void OP_DD(uint8_t code);
107 void OP_FD(uint8_t code);
108 void OP_ED(uint8_t code);
109 void OP(uint8_t code);
110 virtual void run_one_opecode();
111 virtual void debugger_hook(void);
113 uint8_t SZ[256]; /* zero and sign flags */
114 uint8_t SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
115 uint8_t SZP[256]; /* zero, sign and parity flags */
116 uint8_t SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
117 uint8_t SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
119 uint8_t SZHVC_add[2 * 256 * 256];
120 uint8_t SZHVC_sub[2 * 256 * 256];
122 const uint8_t cc_op[0x100] = {
123 4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4,
124 8,10, 7, 6, 4, 4, 7, 4,12,11, 7, 6, 4, 4, 7, 4,
125 7,10,16, 6, 4, 4, 7, 4, 7,11,16, 6, 4, 4, 7, 4,
126 7,10,13, 6,11,11,10, 4, 7,11,13, 6, 4, 4, 7, 4,
127 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
128 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
129 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
130 7, 7, 7, 7, 7, 7, 4, 7, 4, 4, 4, 4, 4, 4, 7, 4,
131 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
132 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
133 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
134 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
135 5,10,10,10,10,11, 7,11, 5,10,10, 0,10,17, 7,11,
136 5,10,10,11,10,11, 7,11, 5, 4,10,11,10, 0, 7,11,
137 5,10,10,19,10,11, 7,11, 5, 4,10, 4,10, 0, 7,11,
138 5,10,10, 4,10,11, 7,11, 5, 6,10, 4,10, 0, 7,11
141 const uint8_t cc_cb[0x100] = {
142 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
143 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
144 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
145 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
146 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
147 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
148 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
149 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
150 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
151 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
152 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
153 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
154 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
155 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
156 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
157 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8
160 const uint8_t cc_ed[0x100] = {
161 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
162 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
163 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
164 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
165 12,12,15,20, 8,14, 8, 9,12,12,15,20, 8,14, 8, 9,
166 12,12,15,20, 8,14, 8, 9,12,12,15,20, 8,14, 8, 9,
167 12,12,15,20, 8,14, 8,18,12,12,15,20, 8,14, 8,18,
168 12,12,15,20, 8,14, 8, 8,12,12,15,20, 8,14, 8, 8,
169 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
170 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
171 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
172 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
173 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
174 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
175 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
176 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8
179 const uint8_t cc_xy[0x100] = {
180 4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
181 4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
182 4,14,20,10, 9, 9,11, 4, 4,15,20,10, 9, 9,11, 4,
183 4, 4, 4, 4,23,23,19, 4, 4,15, 4, 4, 4, 4, 4, 4,
184 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
185 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
186 9, 9, 9, 9, 9, 9,19, 9, 9, 9, 9, 9, 9, 9,19, 9,
187 19,19,19,19,19,19, 4,19, 4, 4, 4, 4, 9, 9,19, 4,
188 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
189 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
190 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
191 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
192 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, 4, 4, 4,
193 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
194 4,14, 4,23, 4,15, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4,
195 4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4
198 const uint8_t cc_xycb[0x100] = {
199 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
200 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
201 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
202 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
203 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
204 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
205 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
206 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
207 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
208 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
209 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
210 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
211 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
212 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
213 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
214 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23
217 const uint8_t cc_ex[0x100] = {
218 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
219 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
220 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
221 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NC/JR C */
222 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
223 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
224 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
225 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
226 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
227 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
228 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
229 5, 5, 5, 5, 0, 0, 0, 0, 5, 5, 5, 5, 0, 0, 0, 0, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
230 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
231 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
232 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
233 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2
236 /* ---------------------------------------------------------------------------
238 --------------------------------------------------------------------------- */
240 uint64_t cycles_tmp_count;
241 uint64_t extra_tmp_count;
242 uint32_t insns_count;
246 int nsc800_int_count;
247 int nsc800_rsta_count;
248 int nsc800_rstb_count;
249 int nsc800_rstc_count;
252 Z80_BASE(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
254 flags_initialized = false;
256 //#ifdef Z80_PSEUDO_BIOS
259 //#ifdef SINGLE_MODE_DMA
268 has_memory_wait = false;
269 has_pseudo_bios = false;
270 has_ldair_quirk = false;
271 has_single_mode_dma = false;
272 total_icount = prev_total_icount = 0;
273 initialize_output_signals(&outputs_busack);
274 set_device_name(_T("Z80 CPU"));
280 virtual void initialize();
281 virtual void reset();
285 virtual void save_state(FILEIO* state_fio);
286 virtual bool load_state(FILEIO* state_fio);
287 virtual void decl_state(void);
289 void write_signal(int id, uint32_t data, uint32_t mask);
290 void set_intr_line(bool line, bool pending, uint32_t bit)
292 uint32_t mask = 1 << bit;
293 intr_req_bit = line ? (intr_req_bit | mask) : (intr_req_bit & ~mask);
294 intr_pend_bit = pending ? (intr_pend_bit | mask) : (intr_pend_bit & ~mask);
295 if(line) irq_count++;
297 void set_extra_clock(int clock)
299 extra_icount += clock;
301 int get_extra_clock()
309 uint32_t get_next_pc()
313 //#ifdef USE_DEBUGGER
318 uint32_t get_debug_prog_addr_mask()
322 uint32_t get_debug_data_addr_mask()
326 bool write_debug_reg(const _TCHAR *reg, uint32_t data);
327 void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
328 virtual int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
331 void set_context_mem(DEVICE* device)
335 void set_context_io(DEVICE* device)
339 void set_context_intr(DEVICE* device)
343 void set_context_busack(DEVICE* device, int id, uint32_t mask)
345 register_output_signal(&outputs_busack, device, id, mask);
347 void set_pc(uint16_t value)
351 void set_sp(uint16_t value)
357 class Z80 : public Z80_BASE
360 void check_interrupt();
361 void run_one_opecode() override;
362 void debugger_hook(void) override;
364 Z80(VM_TEMPLATE* parent_vm, EMU* parent_emu);
368 int run(int clock) override;
369 void save_state(FILEIO* state_fio) override;
370 bool load_state(FILEIO* state_fio) override;
371 void decl_state(void) override;
373 int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
375 void write_debug_data8(uint32_t addr, uint32_t data);
376 uint32_t read_debug_data8(uint32_t addr);
377 void write_debug_io8(uint32_t addr, uint32_t data);
378 uint32_t read_debug_io8(uint32_t addr);
380 #ifdef Z80_PSEUDO_BIOS
381 void set_context_bios(DEVICE* device)
386 #ifdef SINGLE_MODE_DMA
387 void set_context_dma(DEVICE* device)
393 void set_context_debugger(DEBUGGER* device)